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1 | /* |
1 | /* |
2 | * Copyright (c) 2005 Jakub Jermar |
2 | * Copyright (c) 2005 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup ia64 |
29 | /** @addtogroup ia64 |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <arch.h> |
35 | #include <arch.h> |
36 | #include <arch/ski/ski.h> |
36 | #include <arch/ski/ski.h> |
37 | #include <arch/drivers/it.h> |
37 | #include <arch/drivers/it.h> |
38 | #include <arch/interrupt.h> |
38 | #include <arch/interrupt.h> |
39 | #include <arch/barrier.h> |
39 | #include <arch/barrier.h> |
40 | #include <arch/asm.h> |
40 | #include <arch/asm.h> |
41 | #include <arch/register.h> |
41 | #include <arch/register.h> |
42 | #include <arch/types.h> |
42 | #include <arch/types.h> |
43 | #include <arch/context.h> |
43 | #include <arch/context.h> |
44 | #include <arch/stack.h> |
44 | #include <arch/stack.h> |
45 | #include <arch/mm/page.h> |
45 | #include <arch/mm/page.h> |
46 | #include <mm/as.h> |
46 | #include <mm/as.h> |
47 | #include <config.h> |
47 | #include <config.h> |
48 | #include <userspace.h> |
48 | #include <userspace.h> |
49 | #include <console/console.h> |
49 | #include <console/console.h> |
50 | #include <proc/uarg.h> |
50 | #include <proc/uarg.h> |
51 | #include <syscall/syscall.h> |
51 | #include <syscall/syscall.h> |
52 | #include <ddi/irq.h> |
52 | #include <ddi/irq.h> |
53 | #include <ddi/device.h> |
53 | #include <ddi/device.h> |
54 | #include <arch/drivers/ega.h> |
54 | #include <arch/drivers/ega.h> |
55 | #include <arch/bootinfo.h> |
55 | #include <arch/bootinfo.h> |
56 | #include <genarch/kbd/i8042.h> |
56 | #include <genarch/kbd/i8042.h> |
57 | #include <genarch/kbd/ns16550.h> |
57 | #include <genarch/kbd/ns16550.h> |
58 | #include <smp/smp.h> |
58 | #include <smp/smp.h> |
59 | #include <smp/ipi.h> |
59 | #include <smp/ipi.h> |
60 | #include <arch/atomic.h> |
60 | #include <arch/atomic.h> |
61 | #include <panic.h> |
61 | #include <panic.h> |
62 | #include <print.h> |
62 | #include <print.h> |
- | 63 | #include <sysinfo/sysinfo.h> |
|
63 | 64 | ||
64 | /*NS16550 as a COM 1*/ |
65 | /*NS16550 as a COM 1*/ |
65 | #define NS16550_IRQ 4 |
66 | #define NS16550_IRQ (4+LAGACY_INTERRUPT_BASE) |
66 | #define NS16550_PORT 0x3f8 |
67 | #define NS16550_PORT 0x3f8 |
67 | 68 | ||
68 | bootinfo_t *bootinfo; |
69 | bootinfo_t *bootinfo; |
69 | 70 | ||
- | 71 | static uint64_t iosapic_base=0xfec00000; |
|
- | 72 | ||
70 | void arch_pre_main(void) |
73 | void arch_pre_main(void) |
71 | { |
74 | { |
72 | /* Setup usermode init tasks. */ |
75 | /* Setup usermode init tasks. */ |
73 | 76 | ||
74 | //#ifdef I460GX |
77 | //#ifdef I460GX |
75 | unsigned int i; |
78 | unsigned int i; |
76 | 79 | ||
77 | init.cnt = bootinfo->taskmap.count; |
80 | init.cnt = bootinfo->taskmap.count; |
78 | 81 | ||
79 | for (i = 0; i < init.cnt; i++) { |
82 | for (i = 0; i < init.cnt; i++) { |
80 | init.tasks[i].addr = ((unsigned long) bootinfo->taskmap.tasks[i].addr) | VRN_MASK; |
83 | init.tasks[i].addr = ((unsigned long) bootinfo->taskmap.tasks[i].addr) | VRN_MASK; |
81 | init.tasks[i].size = bootinfo->taskmap.tasks[i].size; |
84 | init.tasks[i].size = bootinfo->taskmap.tasks[i].size; |
82 | } |
85 | } |
83 | /* |
86 | /* |
84 | #else |
87 | #else |
85 | init.cnt = 8; |
88 | init.cnt = 8; |
86 | init.tasks[0].addr = INIT0_ADDRESS; |
89 | init.tasks[0].addr = INIT0_ADDRESS; |
87 | init.tasks[0].size = INIT0_SIZE; |
90 | init.tasks[0].size = INIT0_SIZE; |
88 | init.tasks[1].addr = INIT0_ADDRESS + 0x400000; |
91 | init.tasks[1].addr = INIT0_ADDRESS + 0x400000; |
89 | init.tasks[1].size = INIT0_SIZE; |
92 | init.tasks[1].size = INIT0_SIZE; |
90 | init.tasks[2].addr = INIT0_ADDRESS + 0x800000; |
93 | init.tasks[2].addr = INIT0_ADDRESS + 0x800000; |
91 | init.tasks[2].size = INIT0_SIZE; |
94 | init.tasks[2].size = INIT0_SIZE; |
92 | init.tasks[3].addr = INIT0_ADDRESS + 0xc00000; |
95 | init.tasks[3].addr = INIT0_ADDRESS + 0xc00000; |
93 | init.tasks[3].size = INIT0_SIZE; |
96 | init.tasks[3].size = INIT0_SIZE; |
94 | init.tasks[4].addr = INIT0_ADDRESS + 0x1000000; |
97 | init.tasks[4].addr = INIT0_ADDRESS + 0x1000000; |
95 | init.tasks[4].size = INIT0_SIZE; |
98 | init.tasks[4].size = INIT0_SIZE; |
96 | init.tasks[5].addr = INIT0_ADDRESS + 0x1400000; |
99 | init.tasks[5].addr = INIT0_ADDRESS + 0x1400000; |
97 | init.tasks[5].size = INIT0_SIZE; |
100 | init.tasks[5].size = INIT0_SIZE; |
98 | init.tasks[6].addr = INIT0_ADDRESS + 0x1800000; |
101 | init.tasks[6].addr = INIT0_ADDRESS + 0x1800000; |
99 | init.tasks[6].size = INIT0_SIZE; |
102 | init.tasks[6].size = INIT0_SIZE; |
100 | init.tasks[7].addr = INIT0_ADDRESS + 0x1c00000; |
103 | init.tasks[7].addr = INIT0_ADDRESS + 0x1c00000; |
101 | init.tasks[7].size = INIT0_SIZE; |
104 | init.tasks[7].size = INIT0_SIZE; |
102 | #endif*/ |
105 | #endif*/ |
103 | } |
106 | } |
104 | 107 | ||
105 | void arch_pre_mm_init(void) |
108 | void arch_pre_mm_init(void) |
106 | { |
109 | { |
107 | /* Set Interruption Vector Address (i.e. location of interruption vector table). */ |
110 | /* Set Interruption Vector Address (i.e. location of interruption vector table). */ |
108 | iva_write((uintptr_t) &ivt); |
111 | iva_write((uintptr_t) &ivt); |
109 | srlz_d(); |
112 | srlz_d(); |
110 | 113 | ||
111 | } |
114 | } |
112 | 115 | ||
- | 116 | static void iosapic_init(void) |
|
- | 117 | { |
|
- | 118 | ||
- | 119 | uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base))|FW_OFFSET; |
|
- | 120 | int i; |
|
- | 121 | ||
- | 122 | int myid,myeid; |
|
- | 123 | ||
- | 124 | myid=ia64_get_cpu_id(); |
|
- | 125 | myeid=ia64_get_cpu_eid(); |
|
- | 126 | ||
- | 127 | for(i=0;i<16;i++) |
|
- | 128 | { |
|
- | 129 | ||
- | 130 | if(i==2) continue; //Disable Cascade interrupt |
|
- | 131 | ((uint32_t*)(IOSAPIC+0x00))[0]=0x10+2*i; |
|
- | 132 | srlz_d(); |
|
- | 133 | ((uint32_t*)(IOSAPIC+0x10))[0]=LAGACY_INTERRUPT_BASE+i; |
|
- | 134 | srlz_d(); |
|
- | 135 | ((uint32_t*)(IOSAPIC+0x00))[0]=0x10+2*i+1; |
|
- | 136 | srlz_d(); |
|
- | 137 | ((uint32_t*)(IOSAPIC+0x10))[0]=myid<<(56-32) | myeid<<(48-32); |
|
- | 138 | srlz_d(); |
|
- | 139 | } |
|
- | 140 | ||
- | 141 | } |
|
- | 142 | ||
- | 143 | ||
113 | void arch_post_mm_init(void) |
144 | void arch_post_mm_init(void) |
114 | { |
145 | { |
115 | if(config.cpu_active==1) |
146 | if(config.cpu_active==1) |
116 | { |
147 | { |
- | 148 | iosapic_init(); |
|
- | 149 | ||
117 | irq_init(INR_COUNT, INR_COUNT); |
150 | irq_init(INR_COUNT, INR_COUNT); |
118 | #ifdef SKI |
151 | #ifdef SKI |
119 | ski_init_console(); |
152 | ski_init_console(); |
120 | #else |
153 | #else |
121 | ega_init(); |
154 | ega_init(); |
122 | #endif |
155 | #endif |
123 | } |
156 | } |
124 | it_init(); |
157 | it_init(); |
- | 158 | ||
125 | } |
159 | } |
126 | 160 | ||
127 | void arch_post_cpu_init(void) |
161 | void arch_post_cpu_init(void) |
128 | { |
162 | { |
129 | } |
163 | } |
130 | 164 | ||
131 | void arch_pre_smp_init(void) |
165 | void arch_pre_smp_init(void) |
132 | { |
166 | { |
133 | } |
167 | } |
134 | 168 | ||
135 | 169 | ||
136 | #ifdef I460GX |
170 | #ifdef I460GX |
137 | #define POLL_INTERVAL 50000 /* 50 ms */ |
171 | #define POLL_INTERVAL 50000 /* 50 ms */ |
138 | /** Kernel thread for polling keyboard. */ |
172 | /** Kernel thread for polling keyboard. */ |
139 | static void i8042_kkbdpoll(void *arg) |
173 | static void i8042_kkbdpoll(void *arg) |
140 | { |
174 | { |
141 | while (1) { |
175 | while (1) { |
142 | i8042_poll(); |
- | |
143 | #ifdef CONFIG_NS16550 |
176 | #ifdef CONFIG_NS16550 |
- | 177 | #ifndef CONFIG_NS16550_INTERRUPT_DRIVEN |
|
144 | ns16550_poll(); |
178 | ns16550_poll(); |
- | 179 | #endif |
|
- | 180 | #else |
|
- | 181 | #ifndef CONFIG_I8042_INTERRUPT_DRIVEN |
|
- | 182 | i8042_poll(); |
|
- | 183 | #endif |
|
145 | #endif |
184 | #endif |
146 | thread_usleep(POLL_INTERVAL); |
185 | thread_usleep(POLL_INTERVAL); |
147 | } |
186 | } |
148 | } |
187 | } |
149 | #endif |
188 | #endif |
150 | 189 | ||
- | 190 | ||
- | 191 | void end_of_irq_void(void *cir_arg __attribute__((unused)),inr_t inr __attribute__((unused))); |
|
- | 192 | void end_of_irq_void(void *cir_arg __attribute__((unused)),inr_t inr __attribute__((unused))) |
|
- | 193 | { |
|
- | 194 | return; |
|
- | 195 | } |
|
- | 196 | ||
- | 197 | ||
151 | void arch_post_smp_init(void) |
198 | void arch_post_smp_init(void) |
152 | { |
199 | { |
153 | 200 | ||
154 | { |
201 | { |
155 | /* |
202 | /* |
156 | * Create thread that polls keyboard. |
203 | * Create thread that polls keyboard. |
157 | */ |
204 | */ |
158 | #ifdef SKI |
205 | #ifdef SKI |
159 | thread_t *t; |
206 | thread_t *t; |
160 | t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true); |
207 | t = thread_create(kkbdpoll, NULL, TASK, 0, "kkbdpoll", true); |
161 | if (!t) |
208 | if (!t) |
162 | panic("cannot create kkbdpoll\n"); |
209 | panic("cannot create kkbdpoll\n"); |
163 | thread_ready(t); |
210 | thread_ready(t); |
164 | #endif |
211 | #endif |
165 | 212 | ||
166 | #ifdef I460GX |
213 | #ifdef I460GX |
167 | devno_t kbd = device_assign_devno(); |
214 | devno_t kbd = device_assign_devno(); |
168 | devno_t mouse = device_assign_devno(); |
- | |
169 | /* keyboard controller */ |
215 | /* keyboard controller */ |
170 | i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE); |
- | |
171 | 216 | ||
172 | #ifdef CONFIG_NS16550 |
217 | #ifdef CONFIG_NS16550 |
173 | ns16550_init(kbd, NS16550_IRQ, NS16550_PORT); // as a COM 1 |
218 | ns16550_init(kbd, NS16550_PORT, NS16550_IRQ,end_of_irq_void,NULL); // as a COM 1 |
174 | #else |
219 | #else |
- | 220 | devno_t mouse = device_assign_devno(); |
|
- | 221 | i8042_init(kbd, IRQ_KBD, mouse, IRQ_MOUSE); |
|
175 | #endif |
222 | #endif |
176 | thread_t *t; |
223 | thread_t *t; |
177 | t = thread_create(i8042_kkbdpoll, NULL, TASK, 0, "kkbdpoll", true); |
224 | t = thread_create(i8042_kkbdpoll, NULL, TASK, 0, "kkbdpoll", true); |
178 | if (!t) |
225 | if (!t) |
179 | panic("cannot create kkbdpoll\n"); |
226 | panic("cannot create kkbdpoll\n"); |
180 | thread_ready(t); |
227 | thread_ready(t); |
181 | 228 | ||
182 | #endif |
229 | #endif |
183 | 230 | ||
184 | } |
231 | } |
- | 232 | ||
- | 233 | sysinfo_set_item_val("ia64_iospace", NULL, true); |
|
- | 234 | sysinfo_set_item_val("ia64_iospace.address", NULL, true); |
|
- | 235 | sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET); |
|
- | 236 | ||
- | 237 | ||
- | 238 | ||
- | 239 | ||
- | 240 | ||
185 | } |
241 | } |
186 | 242 | ||
187 | 243 | ||
188 | /** Enter userspace and never return. */ |
244 | /** Enter userspace and never return. */ |
189 | void userspace(uspace_arg_t *kernel_uarg) |
245 | void userspace(uspace_arg_t *kernel_uarg) |
190 | { |
246 | { |
191 | psr_t psr; |
247 | psr_t psr; |
192 | rsc_t rsc; |
248 | rsc_t rsc; |
193 | 249 | ||
194 | psr.value = psr_read(); |
250 | psr.value = psr_read(); |
195 | psr.cpl = PL_USER; |
251 | psr.cpl = PL_USER; |
196 | psr.i = true; /* start with interrupts enabled */ |
252 | psr.i = true; /* start with interrupts enabled */ |
197 | psr.ic = true; |
253 | psr.ic = true; |
198 | psr.ri = 0; /* start with instruction #0 */ |
254 | psr.ri = 0; /* start with instruction #0 */ |
199 | psr.bn = 1; /* start in bank 0 */ |
255 | psr.bn = 1; /* start in bank 0 */ |
200 | 256 | ||
201 | asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value)); |
257 | asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value)); |
202 | rsc.loadrs = 0; |
258 | rsc.loadrs = 0; |
203 | rsc.be = false; |
259 | rsc.be = false; |
204 | rsc.pl = PL_USER; |
260 | rsc.pl = PL_USER; |
205 | rsc.mode = 3; /* eager mode */ |
261 | rsc.mode = 3; /* eager mode */ |
206 | 262 | ||
207 | switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry, |
263 | switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry, |
208 | ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE-ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT), |
264 | ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE-ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT), |
209 | ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE, |
265 | ((uintptr_t) kernel_uarg->uspace_stack)+PAGE_SIZE, |
210 | (uintptr_t) kernel_uarg->uspace_uarg, |
266 | (uintptr_t) kernel_uarg->uspace_uarg, |
211 | psr.value, rsc.value); |
267 | psr.value, rsc.value); |
212 | 268 | ||
213 | while (1) { |
269 | while (1) { |
214 | ; |
270 | ; |
215 | } |
271 | } |
216 | } |
272 | } |
217 | 273 | ||
218 | /** Set thread-local-storage pointer. |
274 | /** Set thread-local-storage pointer. |
219 | * |
275 | * |
220 | * We use r13 (a.k.a. tp) for this purpose. |
276 | * We use r13 (a.k.a. tp) for this purpose. |
221 | */ |
277 | */ |
222 | unative_t sys_tls_set(unative_t addr) |
278 | unative_t sys_tls_set(unative_t addr) |
223 | { |
279 | { |
224 | return 0; |
280 | return 0; |
225 | } |
281 | } |
226 | 282 | ||
227 | /** Acquire console back for kernel |
283 | /** Acquire console back for kernel |
228 | * |
284 | * |
229 | */ |
285 | */ |
230 | void arch_grab_console(void) |
286 | void arch_grab_console(void) |
231 | { |
287 | { |
232 | #ifdef SKI |
288 | #ifdef SKI |
233 | ski_kbd_grab(); |
289 | ski_kbd_grab(); |
- | 290 | #else |
|
- | 291 | #ifdef CONFIG_NS16550 |
|
- | 292 | ns16550_grab(); |
|
- | 293 | #else |
|
- | 294 | i8042_grab(); |
|
- | 295 | #endif |
|
234 | #endif |
296 | #endif |
235 | } |
297 | } |
236 | /** Return console to userspace |
298 | /** Return console to userspace |
237 | * |
299 | * |
238 | */ |
300 | */ |
239 | void arch_release_console(void) |
301 | void arch_release_console(void) |
240 | { |
302 | { |
241 | #ifdef SKI |
303 | #ifdef SKI |
242 | ski_kbd_release(); |
304 | ski_kbd_release(); |
- | 305 | #else |
|
- | 306 | #ifdef CONFIG_NS16550 |
|
- | 307 | ns16550_release(); |
|
- | 308 | #else |
|
- | 309 | i8042_release(); |
|
- | 310 | #endif |
|
- | 311 | ||
243 | #endif |
312 | #endif |
244 | } |
313 | } |
245 | 314 | ||
246 | void arch_reboot(void) |
315 | void arch_reboot(void) |
247 | { |
316 | { |
248 | outb(0x64,0xfe); |
317 | outb(0x64,0xfe); |
249 | while (1); |
318 | while (1); |
250 | } |
319 | } |
251 | 320 | ||
252 | /** @} |
321 | /** @} |
253 | */ |
322 | */ |
254 | 323 |