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1 | /* |
1 | /* |
2 | * Copyright (c) 2005 - 2006 Jakub Jermar |
2 | * Copyright (c) 2005 - 2006 Jakub Jermar |
3 | * Copyright (c) 2006 Jakub Vana |
3 | * Copyright (c) 2006 Jakub Vana |
4 | * All rights reserved. |
4 | * All rights reserved. |
5 | * |
5 | * |
6 | * Redistribution and use in source and binary forms, with or without |
6 | * Redistribution and use in source and binary forms, with or without |
7 | * modification, are permitted provided that the following conditions |
7 | * modification, are permitted provided that the following conditions |
8 | * are met: |
8 | * are met: |
9 | * |
9 | * |
10 | * - Redistributions of source code must retain the above copyright |
10 | * - Redistributions of source code must retain the above copyright |
11 | * notice, this list of conditions and the following disclaimer. |
11 | * notice, this list of conditions and the following disclaimer. |
12 | * - Redistributions in binary form must reproduce the above copyright |
12 | * - Redistributions in binary form must reproduce the above copyright |
13 | * notice, this list of conditions and the following disclaimer in the |
13 | * notice, this list of conditions and the following disclaimer in the |
14 | * documentation and/or other materials provided with the distribution. |
14 | * documentation and/or other materials provided with the distribution. |
15 | * - The name of the author may not be used to endorse or promote products |
15 | * - The name of the author may not be used to endorse or promote products |
16 | * derived from this software without specific prior written permission. |
16 | * derived from this software without specific prior written permission. |
17 | * |
17 | * |
18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
28 | */ |
28 | */ |
29 | 29 | ||
30 | /** @addtogroup ia64mm |
30 | /** @addtogroup ia64mm |
31 | * @{ |
31 | * @{ |
32 | */ |
32 | */ |
33 | /** @file |
33 | /** @file |
34 | */ |
34 | */ |
35 | 35 | ||
36 | #ifndef KERN_ia64_PAGE_H_ |
36 | #ifndef KERN_ia64_PAGE_H_ |
37 | #define KERN_ia64_PAGE_H_ |
37 | #define KERN_ia64_PAGE_H_ |
38 | 38 | ||
39 | #include <arch/mm/frame.h> |
39 | #include <arch/mm/frame.h> |
40 | 40 | ||
41 | #define PAGE_SIZE FRAME_SIZE |
41 | #define PAGE_SIZE FRAME_SIZE |
42 | #define PAGE_WIDTH FRAME_WIDTH |
42 | #define PAGE_WIDTH FRAME_WIDTH |
43 | 43 | ||
44 | #define PAGE_COLOR_BITS 0 /* dummy */ |
44 | #define PAGE_COLOR_BITS 0 /* dummy */ |
45 | 45 | ||
46 | #ifdef KERNEL |
46 | #ifdef KERNEL |
47 | 47 | ||
48 | /** Bit width of the TLB-locked portion of kernel address space. */ |
48 | /** Bit width of the TLB-locked portion of kernel address space. */ |
49 | #define KERNEL_PAGE_WIDTH 28 /* 256M */ |
49 | #define KERNEL_PAGE_WIDTH 28 /* 256M */ |
50 | #define IO_PAGE_WIDTH 26 /* 64M */ |
50 | #define IO_PAGE_WIDTH 26 /* 64M */ |
51 | 51 | ||
52 | 52 | ||
53 | #define PPN_SHIFT 12 |
53 | #define PPN_SHIFT 12 |
54 | 54 | ||
55 | #define VRN_SHIFT 61 |
55 | #define VRN_SHIFT 61 |
56 | #define VRN_MASK (7LL << VRN_SHIFT) |
56 | #define VRN_MASK (7LL << VRN_SHIFT) |
57 | #define VA2VRN(va) ((va)>>VRN_SHIFT) |
57 | #define VA2VRN(va) ((va)>>VRN_SHIFT) |
58 | 58 | ||
59 | #ifdef __ASM__ |
59 | #ifdef __ASM__ |
60 | #define VRN_KERNEL 7 |
60 | #define VRN_KERNEL 7 |
61 | #else |
61 | #else |
62 | #define VRN_KERNEL 7LL |
62 | #define VRN_KERNEL 7LL |
63 | #endif |
63 | #endif |
64 | 64 | ||
65 | #define REGION_REGISTERS 8 |
65 | #define REGION_REGISTERS 8 |
66 | 66 | ||
67 | #define KA2PA(x) ((uintptr_t) (x-(VRN_KERNEL<<VRN_SHIFT))) |
67 | #define KA2PA(x) ((uintptr_t) (x-(VRN_KERNEL<<VRN_SHIFT))) |
68 | #define PA2KA(x) ((uintptr_t) (x+(VRN_KERNEL<<VRN_SHIFT))) |
68 | #define PA2KA(x) ((uintptr_t) (x+(VRN_KERNEL<<VRN_SHIFT))) |
69 | 69 | ||
70 | #define VHPT_WIDTH 20 /* 1M */ |
70 | #define VHPT_WIDTH 20 /* 1M */ |
71 | #define VHPT_SIZE (1 << VHPT_WIDTH) |
71 | #define VHPT_SIZE (1 << VHPT_WIDTH) |
72 | 72 | ||
73 | #define PTA_BASE_SHIFT 15 |
73 | #define PTA_BASE_SHIFT 15 |
74 | 74 | ||
75 | /** Memory Attributes. */ |
75 | /** Memory Attributes. */ |
76 | #define MA_WRITEBACK 0x0 |
76 | #define MA_WRITEBACK 0x0 |
77 | #define MA_UNCACHEABLE 0x4 |
77 | #define MA_UNCACHEABLE 0x4 |
78 | 78 | ||
79 | /** Privilege Levels. Only the most and the least privileged ones are ever used. */ |
79 | /** Privilege Levels. Only the most and the least privileged ones are ever used. */ |
80 | #define PL_KERNEL 0x0 |
80 | #define PL_KERNEL 0x0 |
81 | #define PL_USER 0x3 |
81 | #define PL_USER 0x3 |
82 | 82 | ||
83 | /* Access Rigths. Only certain combinations are used by the kernel. */ |
83 | /* Access Rigths. Only certain combinations are used by the kernel. */ |
84 | #define AR_READ 0x0 |
84 | #define AR_READ 0x0 |
85 | #define AR_EXECUTE 0x1 |
85 | #define AR_EXECUTE 0x1 |
86 | #define AR_WRITE 0x2 |
86 | #define AR_WRITE 0x2 |
87 | 87 | ||
88 | #ifndef __ASM__ |
88 | #ifndef __ASM__ |
89 | 89 | ||
90 | #include <arch/mm/as.h> |
90 | #include <arch/mm/as.h> |
91 | #include <arch/mm/frame.h> |
91 | #include <arch/mm/frame.h> |
92 | #include <arch/interrupt.h> |
92 | #include <arch/interrupt.h> |
93 | #include <arch/barrier.h> |
93 | #include <arch/barrier.h> |
94 | #include <arch/mm/asid.h> |
94 | #include <arch/mm/asid.h> |
95 | #include <arch/types.h> |
95 | #include <arch/types.h> |
96 | #include <debug.h> |
96 | #include <debug.h> |
97 | 97 | ||
98 | struct vhpt_tag_info { |
98 | struct vhpt_tag_info { |
99 | unsigned long long tag : 63; |
99 | unsigned long long tag : 63; |
100 | unsigned ti : 1; |
100 | unsigned ti : 1; |
101 | } __attribute__ ((packed)); |
101 | } __attribute__ ((packed)); |
102 | 102 | ||
103 | union vhpt_tag { |
103 | union vhpt_tag { |
104 | struct vhpt_tag_info tag_info; |
104 | struct vhpt_tag_info tag_info; |
105 | unsigned tag_word; |
105 | unsigned tag_word; |
106 | }; |
106 | }; |
107 | 107 | ||
108 | struct vhpt_entry_present { |
108 | struct vhpt_entry_present { |
109 | /* Word 0 */ |
109 | /* Word 0 */ |
110 | unsigned p : 1; |
110 | unsigned p : 1; |
111 | unsigned : 1; |
111 | unsigned : 1; |
112 | unsigned ma : 3; |
112 | unsigned ma : 3; |
113 | unsigned a : 1; |
113 | unsigned a : 1; |
114 | unsigned d : 1; |
114 | unsigned d : 1; |
115 | unsigned pl : 2; |
115 | unsigned pl : 2; |
116 | unsigned ar : 3; |
116 | unsigned ar : 3; |
117 | unsigned long long ppn : 38; |
117 | unsigned long long ppn : 38; |
118 | unsigned : 2; |
118 | unsigned : 2; |
119 | unsigned ed : 1; |
119 | unsigned ed : 1; |
120 | unsigned ig1 : 11; |
120 | unsigned ig1 : 11; |
121 | 121 | ||
122 | /* Word 1 */ |
122 | /* Word 1 */ |
123 | unsigned : 2; |
123 | unsigned : 2; |
124 | unsigned ps : 6; |
124 | unsigned ps : 6; |
125 | unsigned key : 24; |
125 | unsigned key : 24; |
126 | unsigned : 32; |
126 | unsigned : 32; |
127 | 127 | ||
128 | /* Word 2 */ |
128 | /* Word 2 */ |
129 | union vhpt_tag tag; |
129 | union vhpt_tag tag; |
130 | 130 | ||
131 | /* Word 3 */ |
131 | /* Word 3 */ |
132 | uint64_t ig3 : 64; |
132 | uint64_t ig3 : 64; |
133 | } __attribute__ ((packed)); |
133 | } __attribute__ ((packed)); |
134 | 134 | ||
135 | struct vhpt_entry_not_present { |
135 | struct vhpt_entry_not_present { |
136 | /* Word 0 */ |
136 | /* Word 0 */ |
137 | unsigned p : 1; |
137 | unsigned p : 1; |
138 | unsigned long long ig0 : 52; |
138 | unsigned long long ig0 : 52; |
139 | unsigned ig1 : 11; |
139 | unsigned ig1 : 11; |
140 | 140 | ||
141 | /* Word 1 */ |
141 | /* Word 1 */ |
142 | unsigned : 2; |
142 | unsigned : 2; |
143 | unsigned ps : 6; |
143 | unsigned ps : 6; |
144 | unsigned long long ig2 : 56; |
144 | unsigned long long ig2 : 56; |
145 | 145 | ||
146 | /* Word 2 */ |
146 | /* Word 2 */ |
147 | union vhpt_tag tag; |
147 | union vhpt_tag tag; |
148 | 148 | ||
149 | /* Word 3 */ |
149 | /* Word 3 */ |
150 | uint64_t ig3 : 64; |
150 | uint64_t ig3 : 64; |
151 | } __attribute__ ((packed)); |
151 | } __attribute__ ((packed)); |
152 | 152 | ||
153 | typedef union vhpt_entry { |
153 | typedef union vhpt_entry { |
154 | struct vhpt_entry_present present; |
154 | struct vhpt_entry_present present; |
155 | struct vhpt_entry_not_present not_present; |
155 | struct vhpt_entry_not_present not_present; |
156 | uint64_t word[4]; |
156 | uint64_t word[4]; |
157 | } vhpt_entry_t; |
157 | } vhpt_entry_t; |
158 | 158 | ||
159 | struct region_register_map { |
159 | struct region_register_map { |
160 | unsigned ve : 1; |
160 | unsigned ve : 1; |
161 | unsigned : 1; |
161 | unsigned : 1; |
162 | unsigned ps : 6; |
162 | unsigned ps : 6; |
163 | unsigned rid : 24; |
163 | unsigned rid : 24; |
164 | unsigned : 32; |
164 | unsigned : 32; |
165 | } __attribute__ ((packed)); |
165 | } __attribute__ ((packed)); |
166 | 166 | ||
167 | typedef union region_register { |
167 | typedef union region_register { |
168 | struct region_register_map map; |
168 | struct region_register_map map; |
169 | unsigned long long word; |
169 | unsigned long long word; |
170 | } region_register; |
170 | } region_register; |
171 | 171 | ||
172 | struct pta_register_map { |
172 | struct pta_register_map { |
173 | unsigned ve : 1; |
173 | unsigned ve : 1; |
174 | unsigned : 1; |
174 | unsigned : 1; |
175 | unsigned size : 6; |
175 | unsigned size : 6; |
176 | unsigned vf : 1; |
176 | unsigned vf : 1; |
177 | unsigned : 6; |
177 | unsigned : 6; |
178 | unsigned long long base : 49; |
178 | unsigned long long base : 49; |
179 | } __attribute__ ((packed)); |
179 | } __attribute__ ((packed)); |
180 | 180 | ||
181 | typedef union pta_register { |
181 | typedef union pta_register { |
182 | struct pta_register_map map; |
182 | struct pta_register_map map; |
183 | uint64_t word; |
183 | uint64_t word; |
184 | } pta_register; |
184 | } pta_register; |
185 | 185 | ||
186 | /** Return Translation Hashed Entry Address. |
186 | /** Return Translation Hashed Entry Address. |
187 | * |
187 | * |
188 | * VRN bits are used to read RID (ASID) from one |
188 | * VRN bits are used to read RID (ASID) from one |
189 | * of the eight region registers registers. |
189 | * of the eight region registers registers. |
190 | * |
190 | * |
191 | * @param va Virtual address including VRN bits. |
191 | * @param va Virtual address including VRN bits. |
192 | * |
192 | * |
193 | * @return Address of the head of VHPT collision chain. |
193 | * @return Address of the head of VHPT collision chain. |
194 | */ |
194 | */ |
195 | static inline uint64_t thash(uint64_t va) |
195 | static inline uint64_t thash(uint64_t va) |
196 | { |
196 | { |
197 | uint64_t ret; |
197 | uint64_t ret; |
198 | 198 | ||
199 | asm volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va)); |
199 | asm volatile ("thash %0 = %1\n" : "=r" (ret) : "r" (va)); |
200 | 200 | ||
201 | return ret; |
201 | return ret; |
202 | } |
202 | } |
203 | 203 | ||
204 | /** Return Translation Hashed Entry Tag. |
204 | /** Return Translation Hashed Entry Tag. |
205 | * |
205 | * |
206 | * VRN bits are used to read RID (ASID) from one |
206 | * VRN bits are used to read RID (ASID) from one |
207 | * of the eight region registers. |
207 | * of the eight region registers. |
208 | * |
208 | * |
209 | * @param va Virtual address including VRN bits. |
209 | * @param va Virtual address including VRN bits. |
210 | * |
210 | * |
211 | * @return The unique tag for VPN and RID in the collision chain returned by thash(). |
211 | * @return The unique tag for VPN and RID in the collision chain returned by thash(). |
212 | */ |
212 | */ |
213 | static inline uint64_t ttag(uint64_t va) |
213 | static inline uint64_t ttag(uint64_t va) |
214 | { |
214 | { |
215 | uint64_t ret; |
215 | uint64_t ret; |
216 | 216 | ||
217 | asm volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va)); |
217 | asm volatile ("ttag %0 = %1\n" : "=r" (ret) : "r" (va)); |
218 | 218 | ||
219 | return ret; |
219 | return ret; |
220 | } |
220 | } |
221 | 221 | ||
222 | /** Read Region Register. |
222 | /** Read Region Register. |
223 | * |
223 | * |
224 | * @param i Region register index. |
224 | * @param i Region register index. |
225 | * |
225 | * |
226 | * @return Current contents of rr[i]. |
226 | * @return Current contents of rr[i]. |
227 | */ |
227 | */ |
228 | static inline uint64_t rr_read(index_t i) |
228 | static inline uint64_t rr_read(index_t i) |
229 | { |
229 | { |
230 | uint64_t ret; |
230 | uint64_t ret; |
231 | ASSERT(i < REGION_REGISTERS); |
231 | ASSERT(i < REGION_REGISTERS); |
232 | asm volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i << VRN_SHIFT)); |
232 | asm volatile ("mov %0 = rr[%1]\n" : "=r" (ret) : "r" (i << VRN_SHIFT)); |
233 | return ret; |
233 | return ret; |
234 | } |
234 | } |
235 | 235 | ||
236 | /** Write Region Register. |
236 | /** Write Region Register. |
237 | * |
237 | * |
238 | * @param i Region register index. |
238 | * @param i Region register index. |
239 | * @param v Value to be written to rr[i]. |
239 | * @param v Value to be written to rr[i]. |
240 | */ |
240 | */ |
241 | static inline void rr_write(index_t i, uint64_t v) |
241 | static inline void rr_write(index_t i, uint64_t v) |
242 | { |
242 | { |
243 | ASSERT(i < REGION_REGISTERS); |
243 | ASSERT(i < REGION_REGISTERS); |
244 | asm volatile ( |
244 | asm volatile ( |
245 | "mov rr[%0] = %1\n" |
245 | "mov rr[%0] = %1\n" |
246 | : |
246 | : |
247 | : "r" (i << VRN_SHIFT), "r" (v) |
247 | : "r" (i << VRN_SHIFT), "r" (v) |
248 | ); |
248 | ); |
249 | } |
249 | } |
250 | 250 | ||
251 | /** Read Page Table Register. |
251 | /** Read Page Table Register. |
252 | * |
252 | * |
253 | * @return Current value stored in PTA. |
253 | * @return Current value stored in PTA. |
254 | */ |
254 | */ |
255 | static inline uint64_t pta_read(void) |
255 | static inline uint64_t pta_read(void) |
256 | { |
256 | { |
257 | uint64_t ret; |
257 | uint64_t ret; |
258 | 258 | ||
259 | asm volatile ("mov %0 = cr.pta\n" : "=r" (ret)); |
259 | asm volatile ("mov %0 = cr.pta\n" : "=r" (ret)); |
260 | 260 | ||
261 | return ret; |
261 | return ret; |
262 | } |
262 | } |
263 | 263 | ||
264 | /** Write Page Table Register. |
264 | /** Write Page Table Register. |
265 | * |
265 | * |
266 | * @param v New value to be stored in PTA. |
266 | * @param v New value to be stored in PTA. |
267 | */ |
267 | */ |
268 | static inline void pta_write(uint64_t v) |
268 | static inline void pta_write(uint64_t v) |
269 | { |
269 | { |
270 | asm volatile ("mov cr.pta = %0\n" : : "r" (v)); |
270 | asm volatile ("mov cr.pta = %0\n" : : "r" (v)); |
271 | } |
271 | } |
272 | 272 | ||
273 | extern void page_arch_init(void); |
273 | extern void page_arch_init(void); |
274 | 274 | ||
275 | extern vhpt_entry_t *vhpt_hash(uintptr_t page, asid_t asid); |
275 | extern vhpt_entry_t *vhpt_hash(uintptr_t page, asid_t asid); |
276 | extern bool vhpt_compare(uintptr_t page, asid_t asid, vhpt_entry_t *v); |
276 | extern bool vhpt_compare(uintptr_t page, asid_t asid, vhpt_entry_t *v); |
277 | extern void vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame, int flags); |
277 | extern void vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame, int flags); |
278 | 278 | ||
279 | #endif /* __ASM__ */ |
279 | #endif /* __ASM__ */ |
280 | 280 | ||
281 | #endif /* KERNEL */ |
281 | #endif /* KERNEL */ |
282 | 282 | ||
283 | #endif |
283 | #endif |
284 | 284 | ||
285 | /** @} |
285 | /** @} |
286 | */ |
286 | */ |
287 | 287 |