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1 | /* |
1 | /* |
2 | * Copyright (c) 2006 Martin Decky |
2 | * Copyright (c) 2006 Martin Decky |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup ia32xen |
29 | /** @addtogroup ia32xen |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <arch.h> |
35 | #include <arch.h> |
36 | #include <main/main.h> |
36 | #include <main/main.h> |
37 | 37 | ||
38 | #include <arch/types.h> |
38 | #include <arch/types.h> |
39 | #include <align.h> |
39 | #include <align.h> |
40 | 40 | ||
41 | #include <arch/pm.h> |
41 | #include <arch/pm.h> |
42 | 42 | ||
43 | #include <arch/drivers/xconsole.h> |
43 | #include <arch/drivers/xconsole.h> |
44 | #include <arch/mm/page.h> |
44 | #include <arch/mm/page.h> |
45 | 45 | ||
46 | #include <arch/context.h> |
46 | #include <arch/context.h> |
47 | 47 | ||
48 | #include <config.h> |
48 | #include <config.h> |
49 | 49 | ||
50 | #include <arch/interrupt.h> |
50 | #include <arch/interrupt.h> |
51 | #include <arch/asm.h> |
51 | #include <arch/asm.h> |
52 | #include <genarch/acpi/acpi.h> |
52 | #include <genarch/acpi/acpi.h> |
53 | 53 | ||
54 | #include <arch/bios/bios.h> |
54 | #include <arch/bios/bios.h> |
55 | 55 | ||
56 | #include <interrupt.h> |
56 | #include <interrupt.h> |
57 | #include <arch/debugger.h> |
57 | #include <arch/debugger.h> |
58 | #include <proc/thread.h> |
58 | #include <proc/thread.h> |
59 | #include <syscall/syscall.h> |
59 | #include <syscall/syscall.h> |
60 | #include <console/console.h> |
60 | #include <console/console.h> |
61 | #include <ddi/irq.h> |
61 | #include <ddi/irq.h> |
62 | 62 | ||
63 | start_info_t start_info; |
63 | start_info_t start_info; |
64 | memzone_t meminfo; |
64 | memzone_t meminfo; |
65 | 65 | ||
66 | extern void xen_callback(void); |
66 | extern void xen_callback(void); |
67 | extern void xen_failsafe_callback(void); |
67 | extern void xen_failsafe_callback(void); |
68 | 68 | ||
69 | void arch_pre_main(void) |
69 | void arch_pre_main(void) |
70 | { |
70 | { |
71 | pte_t pte; |
71 | pte_t pte; |
72 | memsetb((uintptr_t) &pte, sizeof(pte), 0); |
72 | memsetb(&pte, sizeof(pte), 0); |
73 | 73 | ||
74 | pte.present = 1; |
74 | pte.present = 1; |
75 | pte.writeable = 1; |
75 | pte.writeable = 1; |
76 | pte.frame_address = ADDR2PFN((uintptr_t) start_info.shared_info); |
76 | pte.frame_address = ADDR2PFN((uintptr_t) start_info.shared_info); |
77 | ASSERT(xen_update_va_mapping(&shared_info, pte, UVMF_INVLPG) == 0); |
77 | ASSERT(xen_update_va_mapping(&shared_info, pte, UVMF_INVLPG) == 0); |
78 | 78 | ||
79 | if (!(start_info.flags & SIF_INITDOMAIN)) { |
79 | if (!(start_info.flags & SIF_INITDOMAIN)) { |
80 | /* Map console frame */ |
80 | /* Map console frame */ |
81 | pte.present = 1; |
81 | pte.present = 1; |
82 | pte.writeable = 1; |
82 | pte.writeable = 1; |
83 | pte.frame_address = start_info.console.domU.mfn; |
83 | pte.frame_address = start_info.console.domU.mfn; |
84 | ASSERT(xen_update_va_mapping(&console_page, pte, UVMF_INVLPG) == 0); |
84 | ASSERT(xen_update_va_mapping(&console_page, pte, UVMF_INVLPG) == 0); |
85 | } else |
85 | } else |
86 | start_info.console.domU.evtchn = 0; |
86 | start_info.console.domU.evtchn = 0; |
87 | 87 | ||
88 | ASSERT(xen_set_callbacks(XEN_CS, xen_callback, XEN_CS, xen_failsafe_callback) == 0); |
88 | ASSERT(xen_set_callbacks(XEN_CS, xen_callback, XEN_CS, xen_failsafe_callback) == 0); |
89 | 89 | ||
90 | /* Create identity mapping */ |
90 | /* Create identity mapping */ |
91 | 91 | ||
92 | meminfo.start = ADDR2PFN(ALIGN_UP(KA2PA(start_info.ptl0), PAGE_SIZE)) + start_info.pt_frames; |
92 | meminfo.start = ADDR2PFN(ALIGN_UP(KA2PA(start_info.ptl0), PAGE_SIZE)) + start_info.pt_frames; |
93 | meminfo.size = start_info.frames - meminfo.start; |
93 | meminfo.size = start_info.frames - meminfo.start; |
94 | meminfo.reserved = 0; |
94 | meminfo.reserved = 0; |
95 | 95 | ||
96 | uintptr_t pa; |
96 | uintptr_t pa; |
97 | index_t last_ptl0 = 0; |
97 | index_t last_ptl0 = 0; |
98 | for (pa = PFN2ADDR(meminfo.start); pa < PFN2ADDR(meminfo.start + meminfo.size); pa += FRAME_SIZE) { |
98 | for (pa = PFN2ADDR(meminfo.start); pa < PFN2ADDR(meminfo.start + meminfo.size); pa += FRAME_SIZE) { |
99 | uintptr_t va = PA2KA(pa); |
99 | uintptr_t va = PA2KA(pa); |
100 | 100 | ||
101 | if ((PTL0_INDEX(va) != last_ptl0) && (GET_PTL1_FLAGS(start_info.ptl0, PTL0_INDEX(va)) & PAGE_NOT_PRESENT)) { |
101 | if ((PTL0_INDEX(va) != last_ptl0) && (GET_PTL1_FLAGS(start_info.ptl0, PTL0_INDEX(va)) & PAGE_NOT_PRESENT)) { |
102 | /* New page directory entry needed */ |
102 | /* New page directory entry needed */ |
103 | uintptr_t tpa = PFN2ADDR(meminfo.start + meminfo.reserved); |
103 | uintptr_t tpa = PFN2ADDR(meminfo.start + meminfo.reserved); |
104 | uintptr_t tva = PA2KA(tpa); |
104 | uintptr_t tva = PA2KA(tpa); |
105 | 105 | ||
106 | memsetb(tva, PAGE_SIZE, 0); |
106 | memsetb((void *) tva, PAGE_SIZE, 0); |
107 | 107 | ||
108 | pte_t *tptl3 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(start_info.ptl0, PTL0_INDEX(tva))); |
108 | pte_t *tptl3 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(start_info.ptl0, PTL0_INDEX(tva))); |
109 | SET_FRAME_ADDRESS(tptl3, PTL3_INDEX(tva), 0); |
109 | SET_FRAME_ADDRESS(tptl3, PTL3_INDEX(tva), 0); |
110 | SET_PTL1_ADDRESS(start_info.ptl0, PTL0_INDEX(va), tpa); |
110 | SET_PTL1_ADDRESS(start_info.ptl0, PTL0_INDEX(va), tpa); |
111 | SET_FRAME_ADDRESS(tptl3, PTL3_INDEX(tva), tpa); |
111 | SET_FRAME_ADDRESS(tptl3, PTL3_INDEX(tva), tpa); |
112 | 112 | ||
113 | last_ptl0 = PTL0_INDEX(va); |
113 | last_ptl0 = PTL0_INDEX(va); |
114 | meminfo.reserved++; |
114 | meminfo.reserved++; |
115 | } |
115 | } |
116 | 116 | ||
117 | pte_t *ptl3 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(start_info.ptl0, PTL0_INDEX(va))); |
117 | pte_t *ptl3 = (pte_t *) PA2KA(GET_PTL1_ADDRESS(start_info.ptl0, PTL0_INDEX(va))); |
118 | 118 | ||
119 | SET_FRAME_ADDRESS(ptl3, PTL3_INDEX(va), pa); |
119 | SET_FRAME_ADDRESS(ptl3, PTL3_INDEX(va), pa); |
120 | SET_FRAME_FLAGS(ptl3, PTL3_INDEX(va), PAGE_PRESENT | PAGE_WRITE); |
120 | SET_FRAME_FLAGS(ptl3, PTL3_INDEX(va), PAGE_PRESENT | PAGE_WRITE); |
121 | } |
121 | } |
122 | 122 | ||
123 | /* Put initial stack safely in the mapped area */ |
123 | /* Put initial stack safely in the mapped area */ |
124 | stack_safe = PA2KA(PFN2ADDR(meminfo.start + meminfo.reserved)); |
124 | stack_safe = PA2KA(PFN2ADDR(meminfo.start + meminfo.reserved)); |
125 | } |
125 | } |
126 | 126 | ||
127 | void arch_pre_mm_init(void) |
127 | void arch_pre_mm_init(void) |
128 | { |
128 | { |
129 | pm_init(); |
129 | pm_init(); |
130 | 130 | ||
131 | if (config.cpu_active == 1) { |
131 | if (config.cpu_active == 1) { |
132 | interrupt_init(); |
132 | interrupt_init(); |
133 | // bios_init(); |
133 | // bios_init(); |
134 | 134 | ||
135 | } |
135 | } |
136 | } |
136 | } |
137 | 137 | ||
138 | void arch_post_mm_init(void) |
138 | void arch_post_mm_init(void) |
139 | { |
139 | { |
140 | if (config.cpu_active == 1) { |
140 | if (config.cpu_active == 1) { |
141 | /* Initialize IRQ routing */ |
141 | /* Initialize IRQ routing */ |
142 | irq_init(IRQ_COUNT, IRQ_COUNT); |
142 | irq_init(IRQ_COUNT, IRQ_COUNT); |
143 | 143 | ||
144 | /* Video */ |
144 | /* Video */ |
145 | xen_console_init(); |
145 | xen_console_init(); |
146 | 146 | ||
147 | /* Enable debugger */ |
147 | /* Enable debugger */ |
148 | debugger_init(); |
148 | debugger_init(); |
149 | 149 | ||
150 | /* Merge all memory zones to 1 big zone */ |
150 | /* Merge all memory zones to 1 big zone */ |
151 | zone_merge_all(); |
151 | zone_merge_all(); |
152 | } |
152 | } |
153 | } |
153 | } |
154 | 154 | ||
155 | void arch_post_cpu_init(void) |
155 | void arch_post_cpu_init(void) |
156 | { |
156 | { |
157 | } |
157 | } |
158 | 158 | ||
159 | void arch_pre_smp_init(void) |
159 | void arch_pre_smp_init(void) |
160 | { |
160 | { |
161 | if (config.cpu_active == 1) { |
161 | if (config.cpu_active == 1) { |
162 | #ifdef CONFIG_SMP |
162 | #ifdef CONFIG_SMP |
163 | acpi_init(); |
163 | acpi_init(); |
164 | #endif /* CONFIG_SMP */ |
164 | #endif /* CONFIG_SMP */ |
165 | } |
165 | } |
166 | } |
166 | } |
167 | 167 | ||
168 | void arch_post_smp_init(void) |
168 | void arch_post_smp_init(void) |
169 | { |
169 | { |
170 | } |
170 | } |
171 | 171 | ||
172 | void calibrate_delay_loop(void) |
172 | void calibrate_delay_loop(void) |
173 | { |
173 | { |
174 | // i8254_calibrate_delay_loop(); |
174 | // i8254_calibrate_delay_loop(); |
175 | if (config.cpu_active == 1) { |
175 | if (config.cpu_active == 1) { |
176 | /* |
176 | /* |
177 | * This has to be done only on UP. |
177 | * This has to be done only on UP. |
178 | * On SMP, i8254 is not used for time keeping and its interrupt pin remains masked. |
178 | * On SMP, i8254 is not used for time keeping and its interrupt pin remains masked. |
179 | */ |
179 | */ |
180 | // i8254_normal_operation(); |
180 | // i8254_normal_operation(); |
181 | } |
181 | } |
182 | } |
182 | } |
183 | 183 | ||
184 | /** Set thread-local-storage pointer |
184 | /** Set thread-local-storage pointer |
185 | * |
185 | * |
186 | * TLS pointer is set in GS register. That means, the GS contains |
186 | * TLS pointer is set in GS register. That means, the GS contains |
187 | * selector, and the descriptor->base is the correct address. |
187 | * selector, and the descriptor->base is the correct address. |
188 | */ |
188 | */ |
189 | unative_t sys_tls_set(unative_t addr) |
189 | unative_t sys_tls_set(unative_t addr) |
190 | { |
190 | { |
191 | THREAD->arch.tls = addr; |
191 | THREAD->arch.tls = addr; |
192 | set_tls_desc(addr); |
192 | set_tls_desc(addr); |
193 | 193 | ||
194 | return 0; |
194 | return 0; |
195 | } |
195 | } |
196 | 196 | ||
197 | /** Acquire console back for kernel |
197 | /** Acquire console back for kernel |
198 | * |
198 | * |
199 | */ |
199 | */ |
200 | void arch_grab_console(void) |
200 | void arch_grab_console(void) |
201 | { |
201 | { |
202 | } |
202 | } |
203 | 203 | ||
204 | /** Return console to userspace |
204 | /** Return console to userspace |
205 | * |
205 | * |
206 | */ |
206 | */ |
207 | void arch_release_console(void) |
207 | void arch_release_console(void) |
208 | { |
208 | { |
209 | } |
209 | } |
210 | 210 | ||
211 | void arch_reboot(void) |
211 | void arch_reboot(void) |
212 | { |
212 | { |
213 | // TODO |
213 | // TODO |
214 | while (1); |
214 | while (1); |
215 | } |
215 | } |
216 | 216 | ||
217 | /** @} |
217 | /** @} |
218 | */ |
218 | */ |
219 | 219 |