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1 | /* |
1 | /* |
2 | * Copyright (c) 2001-2004 Jakub Jermar |
2 | * Copyright (c) 2001-2004 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup ia32mm |
29 | /** @addtogroup ia32mm |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #ifndef KERN_ia32_PAGE_H_ |
35 | #ifndef KERN_ia32_PAGE_H_ |
36 | #define KERN_ia32_PAGE_H_ |
36 | #define KERN_ia32_PAGE_H_ |
37 | 37 | ||
38 | #include <arch/mm/frame.h> |
38 | #include <arch/mm/frame.h> |
39 | 39 | ||
40 | #define PAGE_WIDTH FRAME_WIDTH |
40 | #define PAGE_WIDTH FRAME_WIDTH |
41 | #define PAGE_SIZE FRAME_SIZE |
41 | #define PAGE_SIZE FRAME_SIZE |
42 | 42 | ||
43 | #define PAGE_COLOR_BITS 0 /* dummy */ |
- | |
44 | - | ||
45 | #ifdef KERNEL |
43 | #ifdef KERNEL |
46 | 44 | ||
47 | #ifndef __ASM__ |
45 | #ifndef __ASM__ |
48 | # define KA2PA(x) (((uintptr_t) (x)) - 0x80000000) |
46 | # define KA2PA(x) (((uintptr_t) (x)) - 0x80000000) |
49 | # define PA2KA(x) (((uintptr_t) (x)) + 0x80000000) |
47 | # define PA2KA(x) (((uintptr_t) (x)) + 0x80000000) |
50 | #else |
48 | #else |
51 | # define KA2PA(x) ((x) - 0x80000000) |
49 | # define KA2PA(x) ((x) - 0x80000000) |
52 | # define PA2KA(x) ((x) + 0x80000000) |
50 | # define PA2KA(x) ((x) + 0x80000000) |
53 | #endif |
51 | #endif |
54 | 52 | ||
55 | /* |
53 | /* |
56 | * Implementation of generic 4-level page table interface. |
54 | * Implementation of generic 4-level page table interface. |
57 | * IA-32 has 2-level page tables, so PTL1 and PTL2 are left out. |
55 | * IA-32 has 2-level page tables, so PTL1 and PTL2 are left out. |
58 | */ |
56 | */ |
59 | 57 | ||
60 | /* Number of entries in each level. */ |
58 | /* Number of entries in each level. */ |
61 | #define PTL0_ENTRIES_ARCH 1024 |
59 | #define PTL0_ENTRIES_ARCH 1024 |
62 | #define PTL1_ENTRIES_ARCH 0 |
60 | #define PTL1_ENTRIES_ARCH 0 |
63 | #define PTL2_ENTRIES_ARCH 0 |
61 | #define PTL2_ENTRIES_ARCH 0 |
64 | #define PTL3_ENTRIES_ARCH 1024 |
62 | #define PTL3_ENTRIES_ARCH 1024 |
65 | 63 | ||
66 | /* Page table sizes for each level. */ |
64 | /* Page table sizes for each level. */ |
67 | #define PTL0_SIZE_ARCH ONE_FRAME |
65 | #define PTL0_SIZE_ARCH ONE_FRAME |
68 | #define PTL1_SIZE_ARCH 0 |
66 | #define PTL1_SIZE_ARCH 0 |
69 | #define PTL2_SIZE_ARCH 0 |
67 | #define PTL2_SIZE_ARCH 0 |
70 | #define PTL3_SIZE_ARCH ONE_FRAME |
68 | #define PTL3_SIZE_ARCH ONE_FRAME |
71 | 69 | ||
72 | /* Macros calculating indices for each level. */ |
70 | /* Macros calculating indices for each level. */ |
73 | #define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ff) |
71 | #define PTL0_INDEX_ARCH(vaddr) (((vaddr) >> 22) & 0x3ff) |
74 | #define PTL1_INDEX_ARCH(vaddr) 0 |
72 | #define PTL1_INDEX_ARCH(vaddr) 0 |
75 | #define PTL2_INDEX_ARCH(vaddr) 0 |
73 | #define PTL2_INDEX_ARCH(vaddr) 0 |
76 | #define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x3ff) |
74 | #define PTL3_INDEX_ARCH(vaddr) (((vaddr) >> 12) & 0x3ff) |
77 | 75 | ||
78 | /* Get PTE address accessors for each level. */ |
76 | /* Get PTE address accessors for each level. */ |
79 | #define GET_PTL1_ADDRESS_ARCH(ptl0, i) \ |
77 | #define GET_PTL1_ADDRESS_ARCH(ptl0, i) \ |
80 | ((pte_t *) ((((pte_t *) (ptl0))[(i)].frame_address) << 12)) |
78 | ((pte_t *) ((((pte_t *) (ptl0))[(i)].frame_address) << 12)) |
81 | #define GET_PTL2_ADDRESS_ARCH(ptl1, i) \ |
79 | #define GET_PTL2_ADDRESS_ARCH(ptl1, i) \ |
82 | (ptl1) |
80 | (ptl1) |
83 | #define GET_PTL3_ADDRESS_ARCH(ptl2, i) \ |
81 | #define GET_PTL3_ADDRESS_ARCH(ptl2, i) \ |
84 | (ptl2) |
82 | (ptl2) |
85 | #define GET_FRAME_ADDRESS_ARCH(ptl3, i) \ |
83 | #define GET_FRAME_ADDRESS_ARCH(ptl3, i) \ |
86 | ((uintptr_t) ((((pte_t *) (ptl3))[(i)].frame_address) << 12)) |
84 | ((uintptr_t) ((((pte_t *) (ptl3))[(i)].frame_address) << 12)) |
87 | 85 | ||
88 | /* Set PTE address accessors for each level. */ |
86 | /* Set PTE address accessors for each level. */ |
89 | #define SET_PTL0_ADDRESS_ARCH(ptl0) \ |
87 | #define SET_PTL0_ADDRESS_ARCH(ptl0) \ |
90 | (write_cr3((uintptr_t) (ptl0))) |
88 | (write_cr3((uintptr_t) (ptl0))) |
91 | #define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \ |
89 | #define SET_PTL1_ADDRESS_ARCH(ptl0, i, a) \ |
92 | (((pte_t *) (ptl0))[(i)].frame_address = (a) >> 12) |
90 | (((pte_t *) (ptl0))[(i)].frame_address = (a) >> 12) |
93 | #define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) |
91 | #define SET_PTL2_ADDRESS_ARCH(ptl1, i, a) |
94 | #define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) |
92 | #define SET_PTL3_ADDRESS_ARCH(ptl2, i, a) |
95 | #define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \ |
93 | #define SET_FRAME_ADDRESS_ARCH(ptl3, i, a) \ |
96 | (((pte_t *) (ptl3))[(i)].frame_address = (a) >> 12) |
94 | (((pte_t *) (ptl3))[(i)].frame_address = (a) >> 12) |
97 | 95 | ||
98 | /* Get PTE flags accessors for each level. */ |
96 | /* Get PTE flags accessors for each level. */ |
99 | #define GET_PTL1_FLAGS_ARCH(ptl0, i) \ |
97 | #define GET_PTL1_FLAGS_ARCH(ptl0, i) \ |
100 | get_pt_flags((pte_t *) (ptl0), (index_t) (i)) |
98 | get_pt_flags((pte_t *) (ptl0), (index_t) (i)) |
101 | #define GET_PTL2_FLAGS_ARCH(ptl1, i) \ |
99 | #define GET_PTL2_FLAGS_ARCH(ptl1, i) \ |
102 | PAGE_PRESENT |
100 | PAGE_PRESENT |
103 | #define GET_PTL3_FLAGS_ARCH(ptl2, i) \ |
101 | #define GET_PTL3_FLAGS_ARCH(ptl2, i) \ |
104 | PAGE_PRESENT |
102 | PAGE_PRESENT |
105 | #define GET_FRAME_FLAGS_ARCH(ptl3, i) \ |
103 | #define GET_FRAME_FLAGS_ARCH(ptl3, i) \ |
106 | get_pt_flags((pte_t *) (ptl3), (index_t) (i)) |
104 | get_pt_flags((pte_t *) (ptl3), (index_t) (i)) |
107 | 105 | ||
108 | /* Set PTE flags accessors for each level. */ |
106 | /* Set PTE flags accessors for each level. */ |
109 | #define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \ |
107 | #define SET_PTL1_FLAGS_ARCH(ptl0, i, x) \ |
110 | set_pt_flags((pte_t *) (ptl0), (index_t) (i), (x)) |
108 | set_pt_flags((pte_t *) (ptl0), (index_t) (i), (x)) |
111 | #define SET_PTL2_FLAGS_ARCH(ptl1, i, x) |
109 | #define SET_PTL2_FLAGS_ARCH(ptl1, i, x) |
112 | #define SET_PTL3_FLAGS_ARCH(ptl2, i, x) |
110 | #define SET_PTL3_FLAGS_ARCH(ptl2, i, x) |
113 | #define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \ |
111 | #define SET_FRAME_FLAGS_ARCH(ptl3, i, x) \ |
114 | set_pt_flags((pte_t *) (ptl3), (index_t) (i), (x)) |
112 | set_pt_flags((pte_t *) (ptl3), (index_t) (i), (x)) |
115 | 113 | ||
116 | /* Macros for querying the last level entries. */ |
114 | /* Macros for querying the last level entries. */ |
117 | #define PTE_VALID_ARCH(p) \ |
115 | #define PTE_VALID_ARCH(p) \ |
118 | (*((uint32_t *) (p)) != 0) |
116 | (*((uint32_t *) (p)) != 0) |
119 | #define PTE_PRESENT_ARCH(p) \ |
117 | #define PTE_PRESENT_ARCH(p) \ |
120 | ((p)->present != 0) |
118 | ((p)->present != 0) |
121 | #define PTE_GET_FRAME_ARCH(p) \ |
119 | #define PTE_GET_FRAME_ARCH(p) \ |
122 | ((p)->frame_address << FRAME_WIDTH) |
120 | ((p)->frame_address << FRAME_WIDTH) |
123 | #define PTE_WRITABLE_ARCH(p) \ |
121 | #define PTE_WRITABLE_ARCH(p) \ |
124 | ((p)->writeable != 0) |
122 | ((p)->writeable != 0) |
125 | #define PTE_EXECUTABLE_ARCH(p) 1 |
123 | #define PTE_EXECUTABLE_ARCH(p) 1 |
126 | 124 | ||
127 | #ifndef __ASM__ |
125 | #ifndef __ASM__ |
128 | 126 | ||
129 | #include <mm/mm.h> |
127 | #include <mm/mm.h> |
130 | #include <arch/interrupt.h> |
128 | #include <arch/interrupt.h> |
131 | #include <arch/types.h> |
129 | #include <arch/types.h> |
132 | #include <typedefs.h> |
130 | #include <typedefs.h> |
133 | 131 | ||
134 | /* Page fault error codes. */ |
132 | /* Page fault error codes. */ |
135 | 133 | ||
136 | /** When bit on this position is 0, the page fault was caused by a not-present |
134 | /** When bit on this position is 0, the page fault was caused by a not-present |
137 | * page. |
135 | * page. |
138 | */ |
136 | */ |
139 | #define PFERR_CODE_P (1 << 0) |
137 | #define PFERR_CODE_P (1 << 0) |
140 | 138 | ||
141 | /** When bit on this position is 1, the page fault was caused by a write. */ |
139 | /** When bit on this position is 1, the page fault was caused by a write. */ |
142 | #define PFERR_CODE_RW (1 << 1) |
140 | #define PFERR_CODE_RW (1 << 1) |
143 | 141 | ||
144 | /** When bit on this position is 1, the page fault was caused in user mode. */ |
142 | /** When bit on this position is 1, the page fault was caused in user mode. */ |
145 | #define PFERR_CODE_US (1 << 2) |
143 | #define PFERR_CODE_US (1 << 2) |
146 | 144 | ||
147 | /** When bit on this position is 1, a reserved bit was set in page directory. */ |
145 | /** When bit on this position is 1, a reserved bit was set in page directory. */ |
148 | #define PFERR_CODE_RSVD (1 << 3) |
146 | #define PFERR_CODE_RSVD (1 << 3) |
149 | 147 | ||
150 | static inline int get_pt_flags(pte_t *pt, index_t i) |
148 | static inline int get_pt_flags(pte_t *pt, index_t i) |
151 | { |
149 | { |
152 | pte_t *p = &pt[i]; |
150 | pte_t *p = &pt[i]; |
153 | 151 | ||
154 | return ((!p->page_cache_disable) << PAGE_CACHEABLE_SHIFT | |
152 | return ((!p->page_cache_disable) << PAGE_CACHEABLE_SHIFT | |
155 | (!p->present) << PAGE_PRESENT_SHIFT | |
153 | (!p->present) << PAGE_PRESENT_SHIFT | |
156 | p->uaccessible << PAGE_USER_SHIFT | |
154 | p->uaccessible << PAGE_USER_SHIFT | |
157 | 1 << PAGE_READ_SHIFT | |
155 | 1 << PAGE_READ_SHIFT | |
158 | p->writeable << PAGE_WRITE_SHIFT | |
156 | p->writeable << PAGE_WRITE_SHIFT | |
159 | 1 << PAGE_EXEC_SHIFT | |
157 | 1 << PAGE_EXEC_SHIFT | |
160 | p->global << PAGE_GLOBAL_SHIFT); |
158 | p->global << PAGE_GLOBAL_SHIFT); |
161 | } |
159 | } |
162 | 160 | ||
163 | static inline void set_pt_flags(pte_t *pt, index_t i, int flags) |
161 | static inline void set_pt_flags(pte_t *pt, index_t i, int flags) |
164 | { |
162 | { |
165 | pte_t *p = &pt[i]; |
163 | pte_t *p = &pt[i]; |
166 | 164 | ||
167 | p->page_cache_disable = !(flags & PAGE_CACHEABLE); |
165 | p->page_cache_disable = !(flags & PAGE_CACHEABLE); |
168 | p->present = !(flags & PAGE_NOT_PRESENT); |
166 | p->present = !(flags & PAGE_NOT_PRESENT); |
169 | p->uaccessible = (flags & PAGE_USER) != 0; |
167 | p->uaccessible = (flags & PAGE_USER) != 0; |
170 | p->writeable = (flags & PAGE_WRITE) != 0; |
168 | p->writeable = (flags & PAGE_WRITE) != 0; |
171 | p->global = (flags & PAGE_GLOBAL) != 0; |
169 | p->global = (flags & PAGE_GLOBAL) != 0; |
172 | 170 | ||
173 | /* |
171 | /* |
174 | * Ensure that there is at least one bit set even if the present bit is |
172 | * Ensure that there is at least one bit set even if the present bit is |
175 | * cleared. |
173 | * cleared. |
176 | */ |
174 | */ |
177 | p->soft_valid = true; |
175 | p->soft_valid = true; |
178 | } |
176 | } |
179 | 177 | ||
180 | extern void page_arch_init(void); |
178 | extern void page_arch_init(void); |
181 | extern void page_fault(int n, istate_t *istate); |
179 | extern void page_fault(int n, istate_t *istate); |
182 | 180 | ||
183 | #endif /* __ASM__ */ |
181 | #endif /* __ASM__ */ |
184 | 182 | ||
185 | #endif /* KERNEL */ |
183 | #endif /* KERNEL */ |
186 | 184 | ||
187 | #endif |
185 | #endif |
188 | 186 | ||
189 | /** @} |
187 | /** @} |
190 | */ |
188 | */ |
191 | 189 |