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1 | /* |
1 | /* |
2 | * Copyright (c) 2001-2004 Jakub Jermar |
2 | * Copyright (c) 2001-2004 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup ia32 |
29 | /** @addtogroup ia32 |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #ifndef KERN_ia32_CPUID_H_ |
35 | #ifndef KERN_ia32_CPUID_H_ |
36 | #define KERN_ia32_CPUID_H_ |
36 | #define KERN_ia32_CPUID_H_ |
37 | 37 | ||
38 | #include <arch/types.h> |
38 | #include <arch/types.h> |
39 | 39 | ||
40 | typedef struct { |
40 | typedef struct { |
41 | uint32_t cpuid_eax; |
41 | uint32_t cpuid_eax; |
42 | uint32_t cpuid_ebx; |
42 | uint32_t cpuid_ebx; |
43 | uint32_t cpuid_ecx; |
43 | uint32_t cpuid_ecx; |
44 | uint32_t cpuid_edx; |
44 | uint32_t cpuid_edx; |
45 | } __attribute__ ((packed)) cpu_info_t; |
45 | } __attribute__ ((packed)) cpu_info_t; |
46 | 46 | ||
47 | struct __cpuid_extended_feature_info { |
47 | struct __cpuid_extended_feature_info { |
48 | unsigned sse3 : 1; |
48 | unsigned sse3 : 1; |
49 | unsigned : 31; |
49 | unsigned : 31; |
50 | } __attribute__ ((packed)); |
50 | } __attribute__ ((packed)); |
51 | 51 | ||
52 | typedef union cpuid_extended_feature_info { |
52 | typedef union cpuid_extended_feature_info { |
53 | struct __cpuid_extended_feature_info bits; |
53 | struct __cpuid_extended_feature_info bits; |
54 | uint32_t word; |
54 | uint32_t word; |
55 | } cpuid_extended_feature_info; |
55 | } cpuid_extended_feature_info; |
56 | 56 | ||
57 | struct __cpuid_feature_info { |
57 | struct __cpuid_feature_info { |
58 | unsigned : 23; |
58 | unsigned : 23; |
59 | unsigned mmx : 1; |
59 | unsigned mmx : 1; |
60 | unsigned fxsr : 1; |
60 | unsigned fxsr : 1; |
61 | unsigned sse : 1; |
61 | unsigned sse : 1; |
62 | unsigned sse2 : 1; |
62 | unsigned sse2 : 1; |
63 | unsigned : 5; |
63 | unsigned : 5; |
64 | } __attribute__ ((packed)); |
64 | } __attribute__ ((packed)); |
65 | 65 | ||
66 | typedef union cpuid_feature_info { |
66 | typedef union cpuid_feature_info { |
67 | struct __cpuid_feature_info bits; |
67 | struct __cpuid_feature_info bits; |
68 | uint32_t word; |
68 | uint32_t word; |
69 | } cpuid_feature_info; |
69 | } cpuid_feature_info; |
70 | 70 | ||
71 | 71 | ||
72 | static inline uint32_t has_cpuid(void) |
72 | static inline uint32_t has_cpuid(void) |
73 | { |
73 | { |
74 | uint32_t val, ret; |
74 | uint32_t val, ret; |
75 | 75 | ||
76 | asm volatile ( |
76 | asm volatile ( |
77 | "pushf\n" /* read flags */ |
77 | "pushf\n" /* read flags */ |
78 | "popl %0\n" |
78 | "popl %[ret]\n" |
79 | "movl %0, %1\n" |
79 | "movl %[ret], %[val]\n" |
80 | 80 | ||
81 | "btcl $21, %1\n" /* swap the ID bit */ |
81 | "btcl $21, %[val]\n" /* swap the ID bit */ |
82 | 82 | ||
83 | "pushl %1\n" /* propagate the change into flags */ |
83 | "pushl %[val]\n" /* propagate the change into flags */ |
84 | "popf\n" |
84 | "popf\n" |
85 | "pushf\n" |
85 | "pushf\n" |
86 | "popl %1\n" |
86 | "popl %[val]\n" |
87 | 87 | ||
88 | "andl $(1 << 21), %0\n" /* interrested only in ID bit */ |
88 | "andl $(1 << 21), %[ret]\n" /* interrested only in ID bit */ |
89 | "andl $(1 << 21), %1\n" |
89 | "andl $(1 << 21), %[val]\n" |
90 | "xorl %1, %0\n" |
90 | "xorl %[val], %[ret]\n" |
91 | : "=r" (ret), "=r" (val) |
91 | : [ret] "=r" (ret), [val] "=r" (val) |
92 | ); |
92 | ); |
93 | 93 | ||
94 | return ret; |
94 | return ret; |
95 | } |
95 | } |
96 | 96 | ||
97 | static inline void cpuid(uint32_t cmd, cpu_info_t *info) |
97 | static inline void cpuid(uint32_t cmd, cpu_info_t *info) |
98 | { |
98 | { |
99 | asm volatile ( |
99 | asm volatile ( |
100 | "cpuid\n" |
100 | "cpuid\n" |
101 | : "=a" (info->cpuid_eax), "=b" (info->cpuid_ebx), "=c" (info->cpuid_ecx), "=d" (info->cpuid_edx) |
101 | : "=a" (info->cpuid_eax), "=b" (info->cpuid_ebx), |
- | 102 | "=c" (info->cpuid_ecx), "=d" (info->cpuid_edx) |
|
102 | : "a" (cmd) |
103 | : "a" (cmd) |
103 | ); |
104 | ); |
104 | } |
105 | } |
105 | 106 | ||
106 | #endif |
107 | #endif |
107 | 108 | ||
108 | /** @} |
109 | /** @} |
109 | */ |
110 | */ |
110 | 111 |