WebSVN – HelenOS – Diff – /branches/dynload/kernel/arch/arm32/src/drivers/gxemul.c


/*
 * Copyright (c) 2007 Michal Kebrt, Petr Stepan
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup arm32
 * @{
 */
/** @file
 */
 
#include <interrupt.h>
#include <ipc/irq.h>
#include <console/chardev.h>
#include <arch/drivers/gxemul.h>
#include <console/console.h>
#include <sysinfo/sysinfo.h>
#include <print.h>
#include <ddi/device.h>
#include <mm/page.h>
 
/** Address of devices. */
#define GXEMUL_VIDEORAM            0x10000000
#define GXEMUL_KBD                 0x10000000
#define GXEMUL_RTC                 0x15000000
#define GXEMUL_RTC_FREQ_OFFSET     0x100
#define GXEMUL_RTC_ACK_OFFSET      0x110
#define GXEMUL_IRQC                0x16000000
#define GXEMUL_IRQC_MASK_OFFSET    0x4
#define GXEMUL_IRQC_UNMASK_OFFSET  0x8
#define GXEMUL_MP                  0x11000000
#define GXEMUL_MP_MEMSIZE_OFFSET   0x0090
 
 
/** IRQs */
#define GXEMUL_KBD_IRQ      2
#define GXEMUL_TIMER_IRQ    4
 
static gxemul_hw_map_t gxemul_hw_map;
static chardev_t console;
static irq_t gxemul_irq;
static irq_t gxemul_timer_irq;
 
static void gxemul_write(chardev_t *dev, const char ch);
static void gxemul_enable(chardev_t *dev);
static void gxemul_disable(chardev_t *dev);
static char gxemul_do_read(chardev_t *dev);
 
static chardev_operations_t gxemul_ops = {
    .resume = gxemul_enable,
    .suspend = gxemul_disable,
    .write = gxemul_write,
    .read = gxemul_do_read,
};
 
 
/** Initializes #gxemul_hw_map. */
void gxemul_hw_map_init(void)
{
    gxemul_hw_map.videoram = hw_map(GXEMUL_VIDEORAM, PAGE_SIZE);
    gxemul_hw_map.kbd = hw_map(GXEMUL_KBD, PAGE_SIZE);
    gxemul_hw_map.rtc = hw_map(GXEMUL_RTC, PAGE_SIZE);
    gxemul_hw_map.irqc = hw_map(GXEMUL_IRQC, PAGE_SIZE);
 
    gxemul_hw_map.rtc_freq = gxemul_hw_map.rtc + GXEMUL_RTC_FREQ_OFFSET;
    gxemul_hw_map.rtc_ack = gxemul_hw_map.rtc + GXEMUL_RTC_ACK_OFFSET;
    gxemul_hw_map.irqc_mask = gxemul_hw_map.irqc + GXEMUL_IRQC_MASK_OFFSET;
    gxemul_hw_map.irqc_unmask = gxemul_hw_map.irqc + GXEMUL_IRQC_UNMASK_OFFSET;
}
 
/** Putchar that works with gxemul */
void gxemul_write(chardev_t *dev, const char ch)
{
    *((char *) gxemul_hw_map.videoram) = ch;
}
 
/* Called from getc(). */
void gxemul_enable(chardev_t *dev)
{
//  cp0_unmask_int(GXEMUL_KBD_IRQ);
    gxemul_irqc_unmask(GXEMUL_KBD_IRQ);
}
 
/* Called from getc(). */
void gxemul_disable(chardev_t *dev)
{
//  cp0_mask_int(GXEMUL_KBD_IRQ);
    gxemul_irqc_mask(GXEMUL_KBD_IRQ);
}
 
/** Read character using polling, assume interrupts disabled */
static char gxemul_do_read(chardev_t *dev)
{
    char ch;
 
    while (1) {
        ch = *((volatile char *) gxemul_hw_map.kbd);
        if (ch) {
            if (ch == '\r')
                return '\n';
            if (ch == 0x7f)
                return '\b';
            return ch;
        }
    }
}
 
/** Process keyboard interrupt. */
static void gxemul_irq_handler(irq_t *irq, void *arg, ...)
{
    if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox))
        ipc_irq_send_notif(irq);
    else {
        char ch = 0;
       
            ch = *((char *) gxemul_hw_map.kbd);
            if (ch =='\r')
                ch = '\n';
            if (ch == 0x7f)
                ch = '\b';
            //chardev_push_character(&console, ch);
            printf("%c", ch);
    }
}
 
static irq_ownership_t gxemul_claim(void)
{
    return IRQ_ACCEPT;
}
 
void gxemul_kbd_grab(void)
{
    ipl_t ipl = interrupts_disable();
    spinlock_lock(&gxemul_irq.lock);
    gxemul_irq.notif_cfg.notify = false;
    spinlock_unlock(&gxemul_irq.lock);
    interrupts_restore(ipl);
}
 
void gxemul_kbd_release(void)
{
    ipl_t ipl = interrupts_disable();
    spinlock_lock(&gxemul_irq.lock);
    if (gxemul_irq.notif_cfg.answerbox)
        gxemul_irq.notif_cfg.notify = true;
    spinlock_unlock(&gxemul_irq.lock);
    interrupts_restore(ipl);
}
 
 
/** Return console object representing gxemul console */
void gxemul_console(devno_t devno)
{
    chardev_initialize("gxemul_console", &console, &gxemul_ops);
    stdin = &console;
    stdout = &console;
   
    irq_initialize(&gxemul_irq);
    gxemul_irq.devno = devno;
    gxemul_irq.inr = GXEMUL_KBD_IRQ;
    gxemul_irq.claim = gxemul_claim;
    gxemul_irq.handler = gxemul_irq_handler;
    irq_register(&gxemul_irq);
   
//  cp0_unmask_int(GXEMUL_KBD_IRQ);
    gxemul_irqc_unmask(GXEMUL_KBD_IRQ);
   
    sysinfo_set_item_val("kbd", NULL, true);
    sysinfo_set_item_val("kbd.devno", NULL, devno);
    sysinfo_set_item_val("kbd.inr", NULL, GXEMUL_KBD_IRQ);
    sysinfo_set_item_val("kbd.address.virtual", NULL, gxemul_hw_map.kbd);
}
 
/** Return the mask of active interrupts. */
inline uint32_t gxemul_irqc_get_sources(void)
{
    return *(uint32_t*) gxemul_hw_map.irqc;
}
 
/** Masks interrupt.
 *
 * @param irq interrupt number
 */
inline void gxemul_irqc_mask(uint32_t irq)
{
    *(uint32_t*) gxemul_hw_map.irqc_mask = irq;
}
 
/** Unmasks interrupt.
 *
 * @param irq interrupt number
 */
inline void gxemul_irqc_unmask(uint32_t irq)
{
    *(uint32_t*) gxemul_hw_map.irqc_unmask = irq;
}
 
 
/** Starts gxemul Real Time Clock device, which asserts regular interrupts.
 *
 * @param frequency interrupts frequency (0 disables RTC)
 */
void gxemul_timer_start(uint32_t frequency)
{
    *(uint32_t*) gxemul_hw_map.rtc_freq = frequency;
}
 
static irq_ownership_t gxemul_timer_claim(void)
{
    return IRQ_ACCEPT;
}
 
static void gxemul_timer_irq_handler(irq_t *irq, void *arg, ...)
{
    /* TODO time drifts ??
    unsigned long drift;
 
    drift = cp0_count_read() - nextcount;
    while (drift > cp0_compare_value) {
        drift -= cp0_compare_value;
        CPU->missed_clock_ticks++;
    }
    nextcount = cp0_count_read() + cp0_compare_value - drift;
    cp0_compare_write(nextcount);
    */
 
    /*
    * We are holding a lock which prevents preemption.
    * Release the lock, call clock() and reacquire the lock again.
    */
    spinlock_unlock(&irq->lock);
    //clock();
    puts(" ");
    spinlock_lock(&irq->lock);
 
    /* acknowledge tick */
    *(uint32_t*) gxemul_hw_map.rtc_ack = 0;
   
    /* TODO what's that? *
    if (virtual_timer_fnc != NULL)
        virtual_timer_fnc();
    */
}
 
/**
 * Initializes and registers timer interrupt handler.
 */
void gxemul_timer_irq_init()
{
    irq_initialize(&gxemul_timer_irq);
    gxemul_timer_irq.devno = device_assign_devno();
    gxemul_timer_irq.inr = GXEMUL_TIMER_IRQ;
    gxemul_timer_irq.claim = gxemul_timer_claim;
    gxemul_timer_irq.handler = gxemul_timer_irq_handler;
 
    irq_register(&gxemul_timer_irq);
}
 
size_t gxemul_get_memory_size(void)
{
    return  *((int*)(GXEMUL_MP + GXEMUL_MP_MEMSIZE_OFFSET));
}
 
/** @}
 */
 

Rev 2261	Rev 2263
1	/*	1	/*
2	* Copyright (c) 2005-2007 Ondrej Palkovsky, Michal Kebrt, Petr Stepan	2	* Copyright (c) 2007 Michal Kebrt, Petr Stepan
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup arm32	29	/** @addtogroup arm32
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <interrupt.h>	35	#include <interrupt.h>
36	#include <ipc/irq.h>	36	#include <ipc/irq.h>
37	#include <console/chardev.h>	37	#include <console/chardev.h>
38	#include <arch/drivers/gxemul.h>	38	#include <arch/drivers/gxemul.h>
39	#include <console/console.h>	39	#include <console/console.h>
40	#include <sysinfo/sysinfo.h>	40	#include <sysinfo/sysinfo.h>
41	#include <print.h>	41	#include <print.h>
42	#include <ddi/device.h>	42	#include <ddi/device.h>
-		43	#include <mm/page.h>
43		44
44	/** Address of devices. */	45	/** Address of devices. */
45	#define GXEMUL_VIDEORAM 0x10000000	46	#define GXEMUL_VIDEORAM 0x10000000
46	#define GXEMUL_KBD_ADDRESS 0x10000000	47	#define GXEMUL_KBD 0x10000000
47	#define GXEMUL_RTC 0x15000000	48	#define GXEMUL_RTC 0x15000000
48	#define GXEMUL_RTC_FREQ 0x15000100	49	#define GXEMUL_RTC_FREQ_OFFSET 0x100
49	#define GXEMUL_RTC_ACK 0x15000110	50	#define GXEMUL_RTC_ACK_OFFSET 0x110
50	#define GXEMUL_IRQC 0x16000000	51	#define GXEMUL_IRQC 0x16000000
51	#define GXEMUL_IRQC_MASK 0x16000004	52	#define GXEMUL_IRQC_MASK_OFFSET 0x4
52	#define GXEMUL_IRQC_UNMASK 0x16000008	53	#define GXEMUL_IRQC_UNMASK_OFFSET 0x8
-		54	#define GXEMUL_MP 0x11000000
-		55	#define GXEMUL_MP_MEMSIZE_OFFSET 0x0090
-		56
53		57
54	/** IRQs */	58	/** IRQs */
55	#define GXEMUL_KBD_IRQ 2	59	#define GXEMUL_KBD_IRQ 2
56	#define GXEMUL_TIMER_IRQ 4	60	#define GXEMUL_TIMER_IRQ 4
57		61
-		62	static gxemul_hw_map_t gxemul_hw_map;
58	static chardev_t console;	63	static chardev_t console;
59	static irq_t gxemul_irq;	64	static irq_t gxemul_irq;
60	static irq_t gxemul_timer_irq;	65	static irq_t gxemul_timer_irq;
61		66
62	static void gxemul_write(chardev_t *dev, const char ch);	67	static void gxemul_write(chardev_t *dev, const char ch);
63	static void gxemul_enable(chardev_t *dev);	68	static void gxemul_enable(chardev_t *dev);
64	static void gxemul_disable(chardev_t *dev);	69	static void gxemul_disable(chardev_t *dev);
65	static char gxemul_do_read(chardev_t *dev);	70	static char gxemul_do_read(chardev_t *dev);
66		71
67	static chardev_operations_t gxemul_ops = {	72	static chardev_operations_t gxemul_ops = {
68	.resume = gxemul_enable,	73	.resume = gxemul_enable,
69	.suspend = gxemul_disable,	74	.suspend = gxemul_disable,
70	.write = gxemul_write,	75	.write = gxemul_write,
71	.read = gxemul_do_read,	76	.read = gxemul_do_read,
72	};	77	};
73		78
-		79
-		80	/** Initializes #gxemul_hw_map. */
-		81	void gxemul_hw_map_init(void)
-		82	{
-		83	gxemul_hw_map.videoram = hw_map(GXEMUL_VIDEORAM, PAGE_SIZE);
-		84	gxemul_hw_map.kbd = hw_map(GXEMUL_KBD, PAGE_SIZE);
-		85	gxemul_hw_map.rtc = hw_map(GXEMUL_RTC, PAGE_SIZE);
-		86	gxemul_hw_map.irqc = hw_map(GXEMUL_IRQC, PAGE_SIZE);
-		87
-		88	gxemul_hw_map.rtc_freq = gxemul_hw_map.rtc + GXEMUL_RTC_FREQ_OFFSET;
-		89	gxemul_hw_map.rtc_ack = gxemul_hw_map.rtc + GXEMUL_RTC_ACK_OFFSET;
-		90	gxemul_hw_map.irqc_mask = gxemul_hw_map.irqc + GXEMUL_IRQC_MASK_OFFSET;
-		91	gxemul_hw_map.irqc_unmask = gxemul_hw_map.irqc + GXEMUL_IRQC_UNMASK_OFFSET;
-		92	}
-		93
74	/** Putchar that works with gxemul */	94	/** Putchar that works with gxemul */
75	void gxemul_write(chardev_t *dev, const char ch)	95	void gxemul_write(chardev_t *dev, const char ch)
76	{	96	{
77	((char ) GXEMUL_VIDEORAM) = ch;	97	((char ) gxemul_hw_map.videoram) = ch;
78	}	98	}
79		99
80	/* Called from getc(). */	100	/* Called from getc(). */
81	void gxemul_enable(chardev_t *dev)	101	void gxemul_enable(chardev_t *dev)
82	{	102	{
83	// cp0_unmask_int(GXEMUL_KBD_IRQ);	103	// cp0_unmask_int(GXEMUL_KBD_IRQ);
84	gxemul_irqc_unmask(GXEMUL_KBD_IRQ);	104	gxemul_irqc_unmask(GXEMUL_KBD_IRQ);
85	}	105	}
86		106
87	/* Called from getc(). */	107	/* Called from getc(). */
88	void gxemul_disable(chardev_t *dev)	108	void gxemul_disable(chardev_t *dev)
89	{	109	{
90	// cp0_mask_int(GXEMUL_KBD_IRQ);	110	// cp0_mask_int(GXEMUL_KBD_IRQ);
91	gxemul_irqc_mask(GXEMUL_KBD_IRQ);	111	gxemul_irqc_mask(GXEMUL_KBD_IRQ);
92	}	112	}
93		113
94	/** Read character using polling, assume interrupts disabled */	114	/** Read character using polling, assume interrupts disabled */
95	static char gxemul_do_read(chardev_t *dev)	115	static char gxemul_do_read(chardev_t *dev)
96	{	116	{
97	char ch;	117	char ch;
98		118
99	while (1) {	119	while (1) {
100	ch = ((volatile char ) GXEMUL_KBD_ADDRESS);	120	ch = ((volatile char ) gxemul_hw_map.kbd);
101	if (ch) {	121	if (ch) {
102	if (ch == '\r')	122	if (ch == '\r')
103	return '\n';	123	return '\n';
104	if (ch == 0x7f)	124	if (ch == 0x7f)
105	return '\b';	125	return '\b';
106	return ch;	126	return ch;
107	}	127	}
108	}	128	}
109	}	129	}
110		130
111	/** Process keyboard interrupt. */	131	/** Process keyboard interrupt. */
112	static void gxemul_irq_handler(irq_t irq, void arg, ...)	132	static void gxemul_irq_handler(irq_t irq, void arg, ...)
113	{	133	{
114	if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox))	134	if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox))
115	ipc_irq_send_notif(irq);	135	ipc_irq_send_notif(irq);
116	else {	136	else {
117	char ch = 0;	137	char ch = 0;
118		138
119	ch = ((char ) GXEMUL_KBD_ADDRESS);	139	ch = ((char ) gxemul_hw_map.kbd);
120	if (ch =='\r')	140	if (ch =='\r')
121	ch = '\n';	141	ch = '\n';
122	if (ch == 0x7f)	142	if (ch == 0x7f)
123	ch = '\b';	143	ch = '\b';
124	//chardev_push_character(&console, ch);	144	//chardev_push_character(&console, ch);
125	printf("%c", ch);	145	printf("%c", ch);
126	}	146	}
127	}	147	}
128		148
129	static irq_ownership_t gxemul_claim(void)	149	static irq_ownership_t gxemul_claim(void)
130	{	150	{
131	return IRQ_ACCEPT;	151	return IRQ_ACCEPT;
132	}	152	}
133		153
134	void gxemul_kbd_grab(void)	154	void gxemul_kbd_grab(void)
135	{	155	{
136	ipl_t ipl = interrupts_disable();	156	ipl_t ipl = interrupts_disable();
137	spinlock_lock(&msim_irq.lock);	157	spinlock_lock(&gxemul_irq.lock);
138	gxemul_irq.notif_cfg.notify = false;	158	gxemul_irq.notif_cfg.notify = false;
139	spinlock_unlock(&gxemul_irq.lock);	159	spinlock_unlock(&gxemul_irq.lock);
140	interrupts_restore(ipl);	160	interrupts_restore(ipl);
141	}	161	}
142		162
143	void gxemul_kbd_release(void)	163	void gxemul_kbd_release(void)
144	{	164	{
145	ipl_t ipl = interrupts_disable();	165	ipl_t ipl = interrupts_disable();
146	spinlock_lock(&gxemul_irq.lock);	166	spinlock_lock(&gxemul_irq.lock);
147	if (gxemul_irq.notif_cfg.answerbox)	167	if (gxemul_irq.notif_cfg.answerbox)
148	gxemul_irq.notif_cfg.notify = true;	168	gxemul_irq.notif_cfg.notify = true;
149	spinlock_unlock(&gxemul_irq.lock);	169	spinlock_unlock(&gxemul_irq.lock);
150	interrupts_restore(ipl);	170	interrupts_restore(ipl);
151	}	171	}
152		172
153		173
154	/** Return console object representing msim console */	174	/** Return console object representing gxemul console */
155	void gxemul_console(devno_t devno)	175	void gxemul_console(devno_t devno)
156	{	176	{
157	chardev_initialize("msim_console", &console, &gxemul_ops);	177	chardev_initialize("gxemul_console", &console, &gxemul_ops);
158	stdin = &console;	178	stdin = &console;
159	stdout = &console;	179	stdout = &console;
160		180
161	irq_initialize(&gxemul_irq);	181	irq_initialize(&gxemul_irq);
162	gxemul_irq.devno = devno;	182	gxemul_irq.devno = devno;
163	gxemul_irq.inr = GXEMUL_KBD_IRQ;	183	gxemul_irq.inr = GXEMUL_KBD_IRQ;
164	gxemul_irq.claim = gxemul_claim;	184	gxemul_irq.claim = gxemul_claim;
165	gxemul_irq.handler = gxemul_irq_handler;	185	gxemul_irq.handler = gxemul_irq_handler;
166	irq_register(&gxemul_irq);	186	irq_register(&gxemul_irq);
167		187
168	// cp0_unmask_int(GXEMUL_KBD_IRQ);	188	// cp0_unmask_int(GXEMUL_KBD_IRQ);
169	gxemul_irqc_unmask(GXEMUL_KBD_IRQ);	189	gxemul_irqc_unmask(GXEMUL_KBD_IRQ);
170		190
171	sysinfo_set_item_val("kbd", NULL, true);	191	sysinfo_set_item_val("kbd", NULL, true);
172	sysinfo_set_item_val("kbd.devno", NULL, devno);	192	sysinfo_set_item_val("kbd.devno", NULL, devno);
173	sysinfo_set_item_val("kbd.inr", NULL, GXEMUL_KBD_IRQ);	193	sysinfo_set_item_val("kbd.inr", NULL, GXEMUL_KBD_IRQ);
174	sysinfo_set_item_val("kbd.address.virtual", NULL, GXEMUL_KBD_ADDRESS);	194	sysinfo_set_item_val("kbd.address.virtual", NULL, gxemul_hw_map.kbd);
175	}	195	}
176		196
177	/** Return the mask of active interrupts. */	197	/** Return the mask of active interrupts. */
178	inline uint32_t gxemul_irqc_get_sources(void)	198	inline uint32_t gxemul_irqc_get_sources(void)
179	{	199	{
180	return (uint32_t) GXEMUL_IRQC;	200	return (uint32_t) gxemul_hw_map.irqc;
181	}	201	}
182		202
183	/** Masks interrupt.	203	/** Masks interrupt.
184	*	204	*
185	* @param irq interrupt number	205	* @param irq interrupt number
186	*/	206	*/
187	inline void gxemul_irqc_mask(uint32_t irq)	207	inline void gxemul_irqc_mask(uint32_t irq)
188	{	208	{
189	(uint32_t) GXEMUL_IRQC_MASK = irq;	209	(uint32_t) gxemul_hw_map.irqc_mask = irq;
190	}	210	}
191		211
192	/** Unmasks interrupt.	212	/** Unmasks interrupt.
193	*	213	*
194	* @param irq interrupt number	214	* @param irq interrupt number
195	*/	215	*/
196	inline void gxemul_irqc_unmask(uint32_t irq)	216	inline void gxemul_irqc_unmask(uint32_t irq)
197	{	217	{
198	(uint32_t) GXEMUL_IRQC_UNMASK = irq;	218	(uint32_t) gxemul_hw_map.irqc_unmask = irq;
199	}	219	}
200		220
201		221
202	/** Starts gxemul Real Time Clock device, which asserts regular interrupts.	222	/** Starts gxemul Real Time Clock device, which asserts regular interrupts.
203	*	223	*
204	* @param frequency interrupts frequency (0 disables RTC)	224	* @param frequency interrupts frequency (0 disables RTC)
205	*/	225	*/
206	void gxemul_timer_start(uint32_t frequency)	226	void gxemul_timer_start(uint32_t frequency)
207	{	227	{
208	(uint32_t) GXEMUL_RTC_FREQ = frequency;	228	(uint32_t) gxemul_hw_map.rtc_freq = frequency;
209	}	229	}
210		230
211	static irq_ownership_t gxemul_timer_claim(void)	231	static irq_ownership_t gxemul_timer_claim(void)
212	{	232	{
213	return IRQ_ACCEPT;	233	return IRQ_ACCEPT;
214	}	234	}
215		235
216	static void gxemul_timer_irq_handler(irq_t irq, void arg, ...)	236	static void gxemul_timer_irq_handler(irq_t irq, void arg, ...)
217	{	237	{
218	/* TODO time drifts ??	238	/* TODO time drifts ??
219	unsigned long drift;	239	unsigned long drift;
220		240
221	drift = cp0_count_read() - nextcount;	241	drift = cp0_count_read() - nextcount;
222	while (drift > cp0_compare_value) {	242	while (drift > cp0_compare_value) {
223	drift -= cp0_compare_value;	243	drift -= cp0_compare_value;
224	CPU->missed_clock_ticks++;	244	CPU->missed_clock_ticks++;
225	}	245	}
226	nextcount = cp0_count_read() + cp0_compare_value - drift;	246	nextcount = cp0_count_read() + cp0_compare_value - drift;
227	cp0_compare_write(nextcount);	247	cp0_compare_write(nextcount);
228	*/	248	*/
229		249
230	/*	250	/*
231	* We are holding a lock which prevents preemption.	251	* We are holding a lock which prevents preemption.
232	* Release the lock, call clock() and reacquire the lock again.	252	* Release the lock, call clock() and reacquire the lock again.
233	*/	253	*/
234	spinlock_unlock(&irq->lock);	254	spinlock_unlock(&irq->lock);
235	//clock();	255	//clock();
236	puts(" ");	256	puts(" ");
237	spinlock_lock(&irq->lock);	257	spinlock_lock(&irq->lock);
238		258
239	/* acknowledge tick */	259	/* acknowledge tick */
240	(uint32_t) GXEMUL_RTC_ACK = 0;	260	(uint32_t) gxemul_hw_map.rtc_ack = 0;
241		261
242	/* TODO what's that? *	262	/* TODO what's that? *
243	if (virtual_timer_fnc != NULL)	263	if (virtual_timer_fnc != NULL)
244	virtual_timer_fnc();	264	virtual_timer_fnc();
245	*/	265	*/
246	}	266	}
247		267
248	/**	268	/**
249	* Initializes and registers timer interrupt handler.	269	* Initializes and registers timer interrupt handler.
250	*/	270	*/
251	void gxemul_timer_irq_init()	271	void gxemul_timer_irq_init()
252	{	272	{
253	irq_initialize(&gxemul_timer_irq);	273	irq_initialize(&gxemul_timer_irq);
254	gxemul_timer_irq.devno = device_assign_devno();	274	gxemul_timer_irq.devno = device_assign_devno();
255	gxemul_timer_irq.inr = GXEMUL_TIMER_IRQ;	275	gxemul_timer_irq.inr = GXEMUL_TIMER_IRQ;
256	gxemul_timer_irq.claim = gxemul_timer_claim;	276	gxemul_timer_irq.claim = gxemul_timer_claim;
257	gxemul_timer_irq.handler = gxemul_timer_irq_handler;	277	gxemul_timer_irq.handler = gxemul_timer_irq_handler;
258		278
259	irq_register(&gxemul_timer_irq);	279	irq_register(&gxemul_timer_irq);
260	}	280	}
261		281
-		282	size_t gxemul_get_memory_size(void)
-		283	{
-		284	return ((int)(GXEMUL_MP + GXEMUL_MP_MEMSIZE_OFFSET));
-		285	}
262		286
263	/** @}	287	/** @}
264	*/	288	*/
265		289

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(root)/branches/dynload/kernel/arch/arm32/src/drivers/gxemul.c @ 4346 – Rev 2261 → 2263