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/*
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/*
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 * Copyright (c) 2007 Michal Kebrt
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 * Copyright (c) 2007 Michal Kebrt
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 * All rights reserved.
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 * All rights reserved.
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 *
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 *
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 * Redistribution and use in source and binary forms, with or without
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 * Redistribution and use in source and binary forms, with or without
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 * modification, are permitted provided that the following conditions
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 * modification, are permitted provided that the following conditions
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 * are met:
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 * are met:
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 *
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 *
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 * - Redistributions of source code must retain the above copyright
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 * - Redistributions of source code must retain the above copyright
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 *   notice, this list of conditions and the following disclaimer.
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 *   notice, this list of conditions and the following disclaimer.
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 * - Redistributions in binary form must reproduce the above copyright
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 * - Redistributions in binary form must reproduce the above copyright
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 *   notice, this list of conditions and the following disclaimer in the
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 *   notice, this list of conditions and the following disclaimer in the
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 *   documentation and/or other materials provided with the distribution.
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 *   documentation and/or other materials provided with the distribution.
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 * - The name of the author may not be used to endorse or promote products
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 * - The name of the author may not be used to endorse or promote products
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 *   derived from this software without specific prior written permission.
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 *   derived from this software without specific prior written permission.
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 *
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 *
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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 */
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 */
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/** @addtogroup arm32  
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/** @addtogroup arm32  
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 * @{
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 * @{
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 */
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 */
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/** @file
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/** @file
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 *  @brief Declarations of functions implemented in assembly.
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 *  @brief Declarations of functions implemented in assembly.
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 */
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 */
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#ifndef KERN_arm32_ASM_H_
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#ifndef KERN_arm32_ASM_H_
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#define KERN_arm32_ASM_H_
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#define KERN_arm32_ASM_H_
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#include <arch/types.h>
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#include <arch/types.h>
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#include <arch/stack.h>
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#include <arch/stack.h>
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#include <config.h>
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#include <config.h>
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#include <arch/interrupt.h>
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#include <arch/interrupt.h>
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/** No such instruction on ARM to sleep CPU. */
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/** No such instruction on ARM to sleep CPU. */
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static inline void cpu_sleep(void)
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static inline void cpu_sleep(void)
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{
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{
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}
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}
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static inline void pio_write_8(ioport_t port, uint8_t v)
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static inline void pio_write_8(ioport8_t *port, uint8_t v)
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{
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{
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    /* XXX */
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    *port = v;
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}
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}
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static inline uint8_t pio_read_8(ioport_t port)
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static inline void pio_write_16(ioport16_t *port, uint16_t v)
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{
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{
- 
 
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    *port = v;
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}
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static inline void pio_write_32(ioport32_t *port, uint32_t v)
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{
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    *port = v;
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}
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static inline uint8_t pio_read_8(ioport8_t *port)
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{
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    return 0;   /* XXX */
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    return *port;
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}
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static inline uint16_t pio_read_16(ioport16_t *port)
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{
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    return *port;
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}
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static inline uint32_t pio_read_32(ioport32_t *port)
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{
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    return *port;
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}
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}
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/** Return base address of current stack.
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/** Return base address of current stack.
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 *
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 *
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 * Return the base address of the current stack.
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 * Return the base address of the current stack.
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 * The stack is assumed to be STACK_SIZE bytes long.
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 * The stack is assumed to be STACK_SIZE bytes long.
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 * The stack must start on page boundary.
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 * The stack must start on page boundary.
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 */
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 */
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static inline uintptr_t get_stack_base(void)
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static inline uintptr_t get_stack_base(void)
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{
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{
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    uintptr_t v;
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    uintptr_t v;
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    asm volatile (
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    asm volatile (
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        "and %0, sp, %1\n"
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        "and %0, sp, %1\n"
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        : "=r" (v)
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        : "=r" (v)
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        : "r" (~(STACK_SIZE - 1))
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        : "r" (~(STACK_SIZE - 1))
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    );
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    );
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    return v;
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    return v;
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}
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}
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extern void cpu_halt(void);
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extern void cpu_halt(void);
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extern void asm_delay_loop(uint32_t t);
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extern void asm_delay_loop(uint32_t t);
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extern void userspace_asm(uintptr_t ustack, uintptr_t uspace_uarg,
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extern void userspace_asm(uintptr_t ustack, uintptr_t uspace_uarg,
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    uintptr_t entry);
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    uintptr_t entry);
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#endif
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#endif
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/** @}
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/** @}
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 */
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 */
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