WebSVN – HelenOS – Diff – /branches/dynload/kernel/arch/amd64/src/amd64.c


/*
 * Copyright (c) 2005 Ondrej Palkovsky
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup amd64
 * @{
 */
/** @file
 */
 
#include <arch.h>
 
#include <arch/types.h>
 
#include <config.h>
 
#include <proc/thread.h>
#include <genarch/drivers/legacy/ia32/io.h>
#include <genarch/drivers/ega/ega.h>
#include <arch/drivers/vesa.h>
#include <genarch/kbd/i8042.h>
#include <arch/drivers/i8254.h>
#include <arch/drivers/i8259.h>
 
#ifdef CONFIG_SMP
#include <arch/smp/apic.h>
#endif
 
#include <arch/bios/bios.h>
#include <arch/cpu.h>
#include <print.h>
#include <arch/cpuid.h>
#include <genarch/acpi/acpi.h>
#include <panic.h>
#include <interrupt.h>
#include <arch/syscall.h>
#include <arch/debugger.h>
#include <syscall/syscall.h>
#include <console/console.h>
#include <ddi/irq.h>
#include <ddi/device.h>
#include <sysinfo/sysinfo.h>
 
 
/** Disable I/O on non-privileged levels
 *
 * Clean IOPL(12,13) and NT(14) flags in EFLAGS register
 */
static void clean_IOPL_NT_flags(void)
{
    asm (
        "pushfq\n"
        "pop %%rax\n"
        "and $~(0x7000), %%rax\n"
        "pushq %%rax\n"
        "popfq\n"
        :
        :
        : "%rax"
    );
}
 
/** Disable alignment check
 *
 * Clean AM(18) flag in CR0 register
 */
static void clean_AM_flag(void)
{
    asm (
        "mov %%cr0, %%rax\n"
        "and $~(0x40000), %%rax\n"
        "mov %%rax, %%cr0\n"
        :
        :
        : "%rax"
    );
}
 
void arch_pre_mm_init(void)
{
    /* Enable no-execute pages */
    set_efer_flag(AMD_NXE_FLAG);
    /* Enable FPU */
    cpu_setup_fpu();
 
    /* Initialize segmentation */
    pm_init();
   
    /* Disable I/O on nonprivileged levels
     * clear the NT (nested-thread) flag
     */
    clean_IOPL_NT_flags();
    /* Disable alignment check */
    clean_AM_flag();
 
    if (config.cpu_active == 1) {
        interrupt_init();
        bios_init();
       
        /* PIC */
        i8259_init();
    }
}
 
 
void arch_post_mm_init(void)
{
    if (config.cpu_active == 1) {
        /* Initialize IRQ routing */
        irq_init(IRQ_COUNT, IRQ_COUNT);
       
        /* hard clock */
        i8254_init();
               
#ifdef CONFIG_FB
        if (vesa_present())
            vesa_init();
        else
#endif
            ega_init(EGA_BASE, EGA_VIDEORAM);   /* video */
       
        /* Enable debugger */
        debugger_init();
        /* Merge all memory zones to 1 big zone */
        zone_merge_all();
    }
   
    /* Setup fast SYSCALL/SYSRET */
    syscall_setup_cpu();
}
 
void arch_post_cpu_init()
{
#ifdef CONFIG_SMP
    if (config.cpu_active > 1) {
        l_apic_init();
        l_apic_debug();
    }
#endif
}
 
void arch_pre_smp_init(void)
{
    if (config.cpu_active == 1) {
#ifdef CONFIG_SMP
        acpi_init();
#endif /* CONFIG_SMP */
    }
}
 
void arch_post_smp_init(void)
{
    devno_t devno = device_assign_devno();
    /* keyboard controller */
    (void) i8042_init((i8042_t *) I8042_BASE, devno, IRQ_KBD);
 
    /*
     * This is the necessary evil until the userspace driver is entirely
     * self-sufficient.
     */
    sysinfo_set_item_val("kbd", NULL, true);
    sysinfo_set_item_val("kbd.devno", NULL, devno);
    sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD);
}
 
void calibrate_delay_loop(void)
{
    i8254_calibrate_delay_loop();
    if (config.cpu_active == 1) {
        /*
         * This has to be done only on UP.
         * On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
         */
        i8254_normal_operation();
    }
}
 
/** Set thread-local-storage pointer
 *
 * TLS pointer is set in FS register. Unfortunately the 64-bit
 * part can be set only in CPL0 mode.
 *
 * The specs say, that on %fs:0 there is stored contents of %fs register,
 * we need not to go to CPL0 to read it.
 */
unative_t sys_tls_set(unative_t addr)
{
    THREAD->arch.tls = addr;
    write_msr(AMD_MSR_FS, addr);
    return 0;
}
 
/** Acquire console back for kernel
 *
 */
void arch_grab_console(void)
{
#ifdef CONFIG_FB
    vesa_redraw();
#else
    ega_redraw();
#endif
 
 
}
 
/** Return console to userspace
 *
 */
void arch_release_console(void)
{
 
}
 
/** Construct function pointer
 *
 * @param fptr   function pointer structure
 * @param addr   function address
 * @param caller calling function address
 *
 * @return address of the function pointer
 *
 */
void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller)
{
    return addr;
}
 
/** @}
 */
 

Rev 4342	Rev 4344
1	/*	1	/*
2	* Copyright (c) 2005 Ondrej Palkovsky	2	* Copyright (c) 2005 Ondrej Palkovsky
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup amd64	29	/** @addtogroup amd64
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <arch.h>	35	#include <arch.h>
36		36
37	#include <arch/types.h>	37	#include <arch/types.h>
38		38
39	#include <config.h>	39	#include <config.h>
40		40
41	#include <proc/thread.h>	41	#include <proc/thread.h>
42	#include <arch/drivers/ega.h>	42	#include <genarch/drivers/legacy/ia32/io.h>
43	#include <genarch/drivers/ega/ega.h>	43	#include <genarch/drivers/ega/ega.h>
44	#include <arch/drivers/vesa.h>	44	#include <arch/drivers/vesa.h>
45	#include <genarch/kbd/i8042.h>	45	#include <genarch/kbd/i8042.h>
46	#include <arch/drivers/i8254.h>	46	#include <arch/drivers/i8254.h>
47	#include <arch/drivers/i8259.h>	47	#include <arch/drivers/i8259.h>
48		48
49	#ifdef CONFIG_SMP	49	#ifdef CONFIG_SMP
50	#include <arch/smp/apic.h>	50	#include <arch/smp/apic.h>
51	#endif	51	#endif
52		52
53	#include <arch/bios/bios.h>	53	#include <arch/bios/bios.h>
54	#include <arch/cpu.h>	54	#include <arch/cpu.h>
55	#include <print.h>	55	#include <print.h>
56	#include <arch/cpuid.h>	56	#include <arch/cpuid.h>
57	#include <genarch/acpi/acpi.h>	57	#include <genarch/acpi/acpi.h>
58	#include <panic.h>	58	#include <panic.h>
59	#include <interrupt.h>	59	#include <interrupt.h>
60	#include <arch/syscall.h>	60	#include <arch/syscall.h>
61	#include <arch/debugger.h>	61	#include <arch/debugger.h>
62	#include <syscall/syscall.h>	62	#include <syscall/syscall.h>
63	#include <console/console.h>	63	#include <console/console.h>
64	#include <ddi/irq.h>	64	#include <ddi/irq.h>
65	#include <ddi/device.h>	65	#include <ddi/device.h>
-		66	#include <sysinfo/sysinfo.h>
66		67
67		68
68	/** Disable I/O on non-privileged levels	69	/** Disable I/O on non-privileged levels
69	*	70	*
70	* Clean IOPL(12,13) and NT(14) flags in EFLAGS register	71	* Clean IOPL(12,13) and NT(14) flags in EFLAGS register
71	*/	72	*/
72	static void clean_IOPL_NT_flags(void)	73	static void clean_IOPL_NT_flags(void)
73	{	74	{
74	asm (	75	asm (
75	"pushfq\n"	76	"pushfq\n"
76	"pop %%rax\n"	77	"pop %%rax\n"
77	"and $~(0x7000), %%rax\n"	78	"and $~(0x7000), %%rax\n"
78	"pushq %%rax\n"	79	"pushq %%rax\n"
79	"popfq\n"	80	"popfq\n"
80	:	81	:
81	:	82	:
82	: "%rax"	83	: "%rax"
83	);	84	);
84	}	85	}
85		86
86	/** Disable alignment check	87	/** Disable alignment check
87	*	88	*
88	* Clean AM(18) flag in CR0 register	89	* Clean AM(18) flag in CR0 register
89	*/	90	*/
90	static void clean_AM_flag(void)	91	static void clean_AM_flag(void)
91	{	92	{
92	asm (	93	asm (
93	"mov %%cr0, %%rax\n"	94	"mov %%cr0, %%rax\n"
94	"and $~(0x40000), %%rax\n"	95	"and $~(0x40000), %%rax\n"
95	"mov %%rax, %%cr0\n"	96	"mov %%rax, %%cr0\n"
96	:	97	:
97	:	98	:
98	: "%rax"	99	: "%rax"
99	);	100	);
100	}	101	}
101		102
102	void arch_pre_mm_init(void)	103	void arch_pre_mm_init(void)
103	{	104	{
104	/* Enable no-execute pages */	105	/* Enable no-execute pages */
105	set_efer_flag(AMD_NXE_FLAG);	106	set_efer_flag(AMD_NXE_FLAG);
106	/* Enable FPU */	107	/* Enable FPU */
107	cpu_setup_fpu();	108	cpu_setup_fpu();
108		109
109	/* Initialize segmentation */	110	/* Initialize segmentation */
110	pm_init();	111	pm_init();
111		112
112	/* Disable I/O on nonprivileged levels	113	/* Disable I/O on nonprivileged levels
113	* clear the NT (nested-thread) flag	114	* clear the NT (nested-thread) flag
114	*/	115	*/
115	clean_IOPL_NT_flags();	116	clean_IOPL_NT_flags();
116	/* Disable alignment check */	117	/* Disable alignment check */
117	clean_AM_flag();	118	clean_AM_flag();
118		119
119	if (config.cpu_active == 1) {	120	if (config.cpu_active == 1) {
120	interrupt_init();	121	interrupt_init();
121	bios_init();	122	bios_init();
122		123
123	/* PIC */	124	/* PIC */
124	i8259_init();	125	i8259_init();
125	}	126	}
126	}	127	}
127		128
128		129
129	void arch_post_mm_init(void)	130	void arch_post_mm_init(void)
130	{	131	{
131	if (config.cpu_active == 1) {	132	if (config.cpu_active == 1) {
132	/* Initialize IRQ routing */	133	/* Initialize IRQ routing */
133	irq_init(IRQ_COUNT, IRQ_COUNT);	134	irq_init(IRQ_COUNT, IRQ_COUNT);
134		135
135	/* hard clock */	136	/* hard clock */
136	i8254_init();	137	i8254_init();
137		138
138	#ifdef CONFIG_FB	139	#ifdef CONFIG_FB
139	if (vesa_present())	140	if (vesa_present())
140	vesa_init();	141	vesa_init();
141	else	142	else
142	#endif	143	#endif
143	ega_init(EGA_BASE, EGA_VIDEORAM); /* video */	144	ega_init(EGA_BASE, EGA_VIDEORAM); /* video */
144		145
145	/* Enable debugger */	146	/* Enable debugger */
146	debugger_init();	147	debugger_init();
147	/* Merge all memory zones to 1 big zone */	148	/* Merge all memory zones to 1 big zone */
148	zone_merge_all();	149	zone_merge_all();
149	}	150	}
150		151
151	/* Setup fast SYSCALL/SYSRET */	152	/* Setup fast SYSCALL/SYSRET */
152	syscall_setup_cpu();	153	syscall_setup_cpu();
153	}	154	}
154		155
155	void arch_post_cpu_init()	156	void arch_post_cpu_init()
156	{	157	{
157	#ifdef CONFIG_SMP	158	#ifdef CONFIG_SMP
158	if (config.cpu_active > 1) {	159	if (config.cpu_active > 1) {
159	l_apic_init();	160	l_apic_init();
160	l_apic_debug();	161	l_apic_debug();
161	}	162	}
162	#endif	163	#endif
163	}	164	}
164		165
165	void arch_pre_smp_init(void)	166	void arch_pre_smp_init(void)
166	{	167	{
167	if (config.cpu_active == 1) {	168	if (config.cpu_active == 1) {
168	#ifdef CONFIG_SMP	169	#ifdef CONFIG_SMP
169	acpi_init();	170	acpi_init();
170	#endif /* CONFIG_SMP */	171	#endif /* CONFIG_SMP */
171	}	172	}
172	}	173	}
173		174
174	void arch_post_smp_init(void)	175	void arch_post_smp_init(void)
175	{	176	{
-		177	devno_t devno = device_assign_devno();
176	/* keyboard controller */	178	/* keyboard controller */
177	i8042_init(device_assign_devno(), IRQ_KBD, device_assign_devno(), IRQ_MOUSE);	179	(void) i8042_init((i8042_t *) I8042_BASE, devno, IRQ_KBD);
-		180
-		181	/*
-		182	* This is the necessary evil until the userspace driver is entirely
-		183	* self-sufficient.
-		184	*/
-		185	sysinfo_set_item_val("kbd", NULL, true);
-		186	sysinfo_set_item_val("kbd.devno", NULL, devno);
-		187	sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD);
178	}	188	}
179		189
180	void calibrate_delay_loop(void)	190	void calibrate_delay_loop(void)
181	{	191	{
182	i8254_calibrate_delay_loop();	192	i8254_calibrate_delay_loop();
183	if (config.cpu_active == 1) {	193	if (config.cpu_active == 1) {
184	/*	194	/*
185	* This has to be done only on UP.	195	* This has to be done only on UP.
186	* On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.	196	* On SMP, i8254 is not used for time keeping and its interrupt pin remains masked.
187	*/	197	*/
188	i8254_normal_operation();	198	i8254_normal_operation();
189	}	199	}
190	}	200	}
191		201
192	/** Set thread-local-storage pointer	202	/** Set thread-local-storage pointer
193	*	203	*
194	* TLS pointer is set in FS register. Unfortunately the 64-bit	204	* TLS pointer is set in FS register. Unfortunately the 64-bit
195	* part can be set only in CPL0 mode.	205	* part can be set only in CPL0 mode.
196	*	206	*
197	* The specs say, that on %fs:0 there is stored contents of %fs register,	207	* The specs say, that on %fs:0 there is stored contents of %fs register,
198	* we need not to go to CPL0 to read it.	208	* we need not to go to CPL0 to read it.
199	*/	209	*/
200	unative_t sys_tls_set(unative_t addr)	210	unative_t sys_tls_set(unative_t addr)
201	{	211	{
202	THREAD->arch.tls = addr;	212	THREAD->arch.tls = addr;
203	write_msr(AMD_MSR_FS, addr);	213	write_msr(AMD_MSR_FS, addr);
204	return 0;	214	return 0;
205	}	215	}
206		216
207	/** Acquire console back for kernel	217	/** Acquire console back for kernel
208	*	218	*
209	*/	219	*/
210	void arch_grab_console(void)	220	void arch_grab_console(void)
211	{	221	{
212	#ifdef CONFIG_FB	222	#ifdef CONFIG_FB
213	vesa_redraw();	223	vesa_redraw();
214	#else	224	#else
215	ega_redraw();	225	ega_redraw();
216	#endif	226	#endif
217		-
218	i8042_grab();	-
219	}	227	}
220		228
221	/** Return console to userspace	229	/** Return console to userspace
222	*	230	*
223	*/	231	*/
224	void arch_release_console(void)	232	void arch_release_console(void)
225	{	233	{
226	i8042_release();	-
227	}	234	}
228		235
229	/** Construct function pointer	236	/** Construct function pointer
230	*	237	*
231	* @param fptr function pointer structure	238	* @param fptr function pointer structure
232	* @param addr function address	239	* @param addr function address
233	* @param caller calling function address	240	* @param caller calling function address
234	*	241	*
235	* @return address of the function pointer	242	* @return address of the function pointer
236	*	243	*
237	*/	244	*/
238	void arch_construct_function(fncptr_t fptr, void addr, void caller)	245	void arch_construct_function(fncptr_t fptr, void addr, void caller)
239	{	246	{
240	return addr;	247	return addr;
241	}	248	}
242		249
243	/** @}	250	/** @}
244	*/	251	*/
245		252

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(root)/branches/dynload/kernel/arch/amd64/src/amd64.c – Rev 4342 → 4344