WebSVN – HelenOS – Diff – /branches/dynload/boot/arch/sparc64/loader/asm.S


#
# Copyright (c) 2006 Martin Decky
# Copyright (c) 2006 Jakub Jermar 
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
#   notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
#   notice, this list of conditions and the following disclaimer in the
#   documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
#   derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#include <stack.h>
#include <register.h>
 
.text
 
.global halt
.global memcpy
.global jump_to_kernel
 
halt:
	b halt
	nop
	
memcpy:
	.register       %g2, #scratch
        .register       %g3, #scratch
	add	%o1, 7, %g1
	and	%g1, -8, %g1
	cmp	%o1, %g1
	be,pn	%xcc, 3f
	add	%o0, 7, %g1
	mov	0, %g3
0:
	brz,pn	%o2, 2f
	mov	0, %g2
1:
	ldub	[%g3 + %o1], %g1
	add	%g2, 1, %g2
	cmp	%o2, %g2
	stb	%g1, [%g3 + %o0]
	bne,pt	%xcc, 1b
	mov	%g2, %g3
2:
	jmp	%o7 + 8			! exit point
	mov	%o1, %o0
3:
	and	%g1, -8, %g1
	cmp	%o0, %g1
	bne,pt	%xcc, 0b
	mov	0, %g3
	srlx	%o2, 3, %g4
	brz,pn	%g4, 5f
	mov	0, %g5
4:
	sllx	%g3, 3, %g2
	add	%g5, 1, %g3
	ldx	[%o1 + %g2], %g1
	mov	%g3, %g5
	cmp	%g4, %g3
	bne,pt	%xcc, 4b
	stx	%g1, [%o0 + %g2]
5:
	and	%o2, 7, %o2
	brz,pn	%o2, 2b
	sllx	%g4, 3, %g1
	mov	0, %g2
	add	%g1, %o0, %o0
	add	%g1, %o1, %g4
	mov	0, %g3
6:
	ldub	[%g2 + %g4], %g1
	stb	%g1, [%g2 + %o0]
	add	%g3, 1, %g2
	cmp	%o2, %g2
	bne,pt	%xcc, 6b
	mov	%g2, %g3
 
	jmp	%o7 + 8			! exit point
	mov	%o1, %o0
 
jump_to_kernel:
	/*
	 * We have copied code and now we need to guarantee cache coherence.
	 * 1. Make sure that the code we have moved has drained to main memory.
	 * 2. Invalidate I-cache.
	 * 3. Flush instruction pipeline.
	 */ 
	call	icache_flush
	membar	#StoreStore
	flush	%i7
 
	mov %o0, %l1
	mov %o1, %o0
	mov %o2, %o1
	mov %o3, %o2
	jmp %l1				! jump to kernel
	nop
 
#define ICACHE_SIZE		8192
#define ICACHE_LINE_SIZE	32
#define ICACHE_SET_BIT		(1 << 13)
#define ASI_ICACHE_TAG		0x67
 
# Flush I-cache
icache_flush:
	set	((ICACHE_SIZE - ICACHE_LINE_SIZE) | ICACHE_SET_BIT), %g1
	stxa	%g0, [%g1] ASI_ICACHE_TAG
0:	membar	#Sync
	subcc	%g1, ICACHE_LINE_SIZE, %g1
	bnz,pt	%xcc, 0b
	stxa	%g0, [%g1] ASI_ICACHE_TAG
	membar	#Sync
	retl
	! SF Erratum #51
	nop
 
.global ofw
ofw:
	save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
	set ofw_cif, %l0
	ldx [%l0], %l0
 
	rdpr  %pstate, %l1
	and  %l1, ~PSTATE_AM_BIT, %l2
	wrpr  %l2, 0, %pstate
    
	jmpl %l0, %o7
	mov %i0, %o0
 
	wrpr %l1, 0, %pstate
 
	ret
	restore %o0, 0, %o0
 

Rev 2927	Rev 3153
1	#	1	#
2	# Copyright (c) 2006 Martin Decky	2	# Copyright (c) 2006 Martin Decky
3	# Copyright (c) 2006 Jakub Jermar	3	# Copyright (c) 2006 Jakub Jermar
4	# All rights reserved.	4	# All rights reserved.
5	#	5	#
6	# Redistribution and use in source and binary forms, with or without	6	# Redistribution and use in source and binary forms, with or without
7	# modification, are permitted provided that the following conditions	7	# modification, are permitted provided that the following conditions
8	# are met:	8	# are met:
9	#	9	#
10	# - Redistributions of source code must retain the above copyright	10	# - Redistributions of source code must retain the above copyright
11	# notice, this list of conditions and the following disclaimer.	11	# notice, this list of conditions and the following disclaimer.
12	# - Redistributions in binary form must reproduce the above copyright	12	# - Redistributions in binary form must reproduce the above copyright
13	# notice, this list of conditions and the following disclaimer in the	13	# notice, this list of conditions and the following disclaimer in the
14	# documentation and/or other materials provided with the distribution.	14	# documentation and/or other materials provided with the distribution.
15	# - The name of the author may not be used to endorse or promote products	15	# - The name of the author may not be used to endorse or promote products
16	# derived from this software without specific prior written permission.	16	# derived from this software without specific prior written permission.
17	#	17	#
18	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	18	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	19	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	20	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	21	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	22	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	23	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	24	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	25	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	26	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	27	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28	#	28	#
29		29
30	#include <stack.h>	30	#include <stack.h>
31	#include <register.h>	31	#include <register.h>
32		32
33	.text	33	.text
34		34
35	.global halt	35	.global halt
36	.global memcpy	36	.global memcpy
37	.global jump_to_kernel	37	.global jump_to_kernel
38		38
39	halt:	39	halt:
40	b halt	40	b halt
41	nop	41	nop
42		42
43	memcpy:	43	memcpy:
44	.register %g2, #scratch	44	.register %g2, #scratch
45	.register %g3, #scratch	45	.register %g3, #scratch
46	add %o1, 7, %g1	46	add %o1, 7, %g1
47	and %g1, -8, %g1	47	and %g1, -8, %g1
48	cmp %o1, %g1	48	cmp %o1, %g1
49	be,pn %xcc, 3f	49	be,pn %xcc, 3f
50	add %o0, 7, %g1	50	add %o0, 7, %g1
51	mov 0, %g3	51	mov 0, %g3
52	0:	52	0:
53	brz,pn %o2, 2f	53	brz,pn %o2, 2f
54	mov 0, %g2	54	mov 0, %g2
55	1:	55	1:
56	ldub [%g3 + %o1], %g1	56	ldub [%g3 + %o1], %g1
57	add %g2, 1, %g2	57	add %g2, 1, %g2
58	cmp %o2, %g2	58	cmp %o2, %g2
59	stb %g1, [%g3 + %o0]	59	stb %g1, [%g3 + %o0]
60	bne,pt %xcc, 1b	60	bne,pt %xcc, 1b
61	mov %g2, %g3	61	mov %g2, %g3
62	2:	62	2:
63	jmp %o7 + 8 ! exit point	63	jmp %o7 + 8 ! exit point
64	mov %o1, %o0	64	mov %o1, %o0
65	3:	65	3:
66	and %g1, -8, %g1	66	and %g1, -8, %g1
67	cmp %o0, %g1	67	cmp %o0, %g1
68	bne,pt %xcc, 0b	68	bne,pt %xcc, 0b
69	mov 0, %g3	69	mov 0, %g3
70	srlx %o2, 3, %g4	70	srlx %o2, 3, %g4
71	brz,pn %g4, 5f	71	brz,pn %g4, 5f
72	mov 0, %g5	72	mov 0, %g5
73	4:	73	4:
74	sllx %g3, 3, %g2	74	sllx %g3, 3, %g2
75	add %g5, 1, %g3	75	add %g5, 1, %g3
76	ldx [%o1 + %g2], %g1	76	ldx [%o1 + %g2], %g1
77	mov %g3, %g5	77	mov %g3, %g5
78	cmp %g4, %g3	78	cmp %g4, %g3
79	bne,pt %xcc, 4b	79	bne,pt %xcc, 4b
80	stx %g1, [%o0 + %g2]	80	stx %g1, [%o0 + %g2]
81	5:	81	5:
82	and %o2, 7, %o2	82	and %o2, 7, %o2
83	brz,pn %o2, 2b	83	brz,pn %o2, 2b
84	sllx %g4, 3, %g1	84	sllx %g4, 3, %g1
85	mov 0, %g2	85	mov 0, %g2
86	add %g1, %o0, %o0	86	add %g1, %o0, %o0
87	add %g1, %o1, %g4	87	add %g1, %o1, %g4
88	mov 0, %g3	88	mov 0, %g3
89	6:	89	6:
90	ldub [%g2 + %g4], %g1	90	ldub [%g2 + %g4], %g1
91	stb %g1, [%g2 + %o0]	91	stb %g1, [%g2 + %o0]
92	add %g3, 1, %g2	92	add %g3, 1, %g2
93	cmp %o2, %g2	93	cmp %o2, %g2
94	bne,pt %xcc, 6b	94	bne,pt %xcc, 6b
95	mov %g2, %g3	95	mov %g2, %g3
96		96
97	jmp %o7 + 8 ! exit point	97	jmp %o7 + 8 ! exit point
98	mov %o1, %o0	98	mov %o1, %o0
99		99
100	jump_to_kernel:	100	jump_to_kernel:
-		101	/*
-		102	* We have copied code and now we need to guarantee cache coherence.
-		103	* 1. Make sure that the code we have moved has drained to main memory.
-		104	* 2. Invalidate I-cache.
-		105	* 3. Flush instruction pipeline.
-		106	*/
-		107	call icache_flush
-		108	membar #StoreStore
-		109	flush %i7
-		110
101	mov %o0, %l1	111	mov %o0, %l1
102	mov %o1, %o0	112	mov %o1, %o0
103	mov %o2, %o1	113	mov %o2, %o1
104	mov %o3, %o2	114	mov %o3, %o2
105	jmp %l1 ! jump to kernel	115	jmp %l1 ! jump to kernel
106	nop	116	nop
-		117
-		118	#define ICACHE_SIZE 8192
-		119	#define ICACHE_LINE_SIZE 32
-		120	#define ICACHE_SET_BIT (1 << 13)
-		121	#define ASI_ICACHE_TAG 0x67
-		122
-		123	# Flush I-cache
-		124	icache_flush:
-		125	set ((ICACHE_SIZE - ICACHE_LINE_SIZE) \| ICACHE_SET_BIT), %g1
-		126	stxa %g0, [%g1] ASI_ICACHE_TAG
-		127	0: membar #Sync
-		128	subcc %g1, ICACHE_LINE_SIZE, %g1
-		129	bnz,pt %xcc, 0b
-		130	stxa %g0, [%g1] ASI_ICACHE_TAG
-		131	membar #Sync
-		132	retl
-		133	! SF Erratum #51
-		134	nop
107		135
108	.global ofw	136	.global ofw
109	ofw:	137	ofw:
110	save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp	138	save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp
111	set ofw_cif, %l0	139	set ofw_cif, %l0
112	ldx [%l0], %l0	140	ldx [%l0], %l0
113		141
114	rdpr %pstate, %l1	142	rdpr %pstate, %l1
115	and %l1, ~PSTATE_AM_BIT, %l2	143	and %l1, ~PSTATE_AM_BIT, %l2
116	wrpr %l2, 0, %pstate	144	wrpr %l2, 0, %pstate
117		145
118	jmpl %l0, %o7	146	jmpl %l0, %o7
119	mov %i0, %o0	147	mov %i0, %o0
120		148
121	wrpr %l1, 0, %pstate	149	wrpr %l1, 0, %pstate
122		150
123	ret	151	ret
124	restore %o0, 0, %o0	152	restore %o0, 0, %o0
125		153

Subversion Repositories HelenOS

(root)/branches/dynload/boot/arch/sparc64/loader/asm.S @ 3674 – Rev 2927 → 3153