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1 | # |
1 | # |
2 | # Copyright (C) 2005 Jakub Jermar |
2 | # Copyright (C) 2005 Jakub Jermar |
3 | # All rights reserved. |
3 | # All rights reserved. |
4 | # |
4 | # |
5 | # Redistribution and use in source and binary forms, with or without |
5 | # Redistribution and use in source and binary forms, with or without |
6 | # modification, are permitted provided that the following conditions |
6 | # modification, are permitted provided that the following conditions |
7 | # are met: |
7 | # are met: |
8 | # |
8 | # |
9 | # - Redistributions of source code must retain the above copyright |
9 | # - Redistributions of source code must retain the above copyright |
10 | # notice, this list of conditions and the following disclaimer. |
10 | # notice, this list of conditions and the following disclaimer. |
11 | # - Redistributions in binary form must reproduce the above copyright |
11 | # - Redistributions in binary form must reproduce the above copyright |
12 | # notice, this list of conditions and the following disclaimer in the |
12 | # notice, this list of conditions and the following disclaimer in the |
13 | # documentation and/or other materials provided with the distribution. |
13 | # documentation and/or other materials provided with the distribution. |
14 | # - The name of the author may not be used to endorse or promote products |
14 | # - The name of the author may not be used to endorse or promote products |
15 | # derived from this software without specific prior written permission. |
15 | # derived from this software without specific prior written permission. |
16 | # |
16 | # |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | # |
27 | # |
28 | 28 | ||
29 | /** |
29 | /** |
30 | * This file contains kernel trap table. |
30 | * This file contains kernel trap table. |
31 | */ |
31 | */ |
32 | 32 | ||
33 | .register %g2, #scratch |
33 | .register %g2, #scratch |
34 | .register %g3, #scratch |
34 | .register %g3, #scratch |
35 | .register %g6, #scratch |
- | |
36 | .register %g7, #scratch |
- | |
37 | 35 | ||
38 | .text |
36 | .text |
39 | 37 | ||
40 | #include <arch/trap/trap_table.h> |
38 | #include <arch/trap/trap_table.h> |
41 | #include <arch/trap/regwin.h> |
39 | #include <arch/trap/regwin.h> |
42 | #include <arch/trap/interrupt.h> |
40 | #include <arch/trap/interrupt.h> |
43 | #include <arch/trap/exception.h> |
41 | #include <arch/trap/exception.h> |
44 | #include <arch/trap/mmu.h> |
42 | #include <arch/trap/mmu.h> |
45 | #include <arch/stack.h> |
43 | #include <arch/stack.h> |
46 | #include <arch/regdef.h> |
44 | #include <arch/regdef.h> |
47 | 45 | ||
48 | #define TABLE_SIZE TRAP_TABLE_SIZE |
46 | #define TABLE_SIZE TRAP_TABLE_SIZE |
49 | #define ENTRY_SIZE TRAP_TABLE_ENTRY_SIZE |
47 | #define ENTRY_SIZE TRAP_TABLE_ENTRY_SIZE |
50 | 48 | ||
51 | /* |
49 | /* |
52 | * Kernel trap table. |
50 | * Kernel trap table. |
53 | */ |
51 | */ |
54 | .align TABLE_SIZE |
52 | .align TABLE_SIZE |
55 | .global trap_table |
53 | .global trap_table |
56 | trap_table: |
54 | trap_table: |
57 | 55 | ||
58 | /* TT = 0x08, TL = 0, instruction_access_exception */ |
56 | /* TT = 0x08, TL = 0, instruction_access_exception */ |
59 | .org trap_table + TT_INSTRUCTION_ACCESS_EXCEPTION*ENTRY_SIZE |
57 | .org trap_table + TT_INSTRUCTION_ACCESS_EXCEPTION*ENTRY_SIZE |
60 | .global instruction_access_exception |
58 | .global instruction_access_exception |
61 | instruction_access_exception: |
59 | instruction_access_exception: |
62 | SIMPLE_HANDLER do_instruction_access_exc |
60 | SIMPLE_HANDLER do_instruction_access_exc |
63 | 61 | ||
64 | /* TT = 0x10, TL = 0, illegal_instruction */ |
62 | /* TT = 0x10, TL = 0, illegal_instruction */ |
65 | .org trap_table + TT_ILLEGAL_INSTRUCTION*ENTRY_SIZE |
63 | .org trap_table + TT_ILLEGAL_INSTRUCTION*ENTRY_SIZE |
66 | .global illegal_instruction |
64 | .global illegal_instruction |
67 | illegal_instruction: |
65 | illegal_instruction: |
68 | SIMPLE_HANDLER do_illegal_instruction |
66 | SIMPLE_HANDLER do_illegal_instruction |
69 | 67 | ||
70 | /* TT = 0x24, TL = 0, clean_window handler */ |
68 | /* TT = 0x24, TL = 0, clean_window handler */ |
71 | .org trap_table + TT_CLEAN_WINDOW*ENTRY_SIZE |
69 | .org trap_table + TT_CLEAN_WINDOW*ENTRY_SIZE |
72 | .global clean_window_handler |
70 | .global clean_window_handler |
73 | clean_window_handler: |
71 | clean_window_handler: |
74 | CLEAN_WINDOW_HANDLER |
72 | CLEAN_WINDOW_HANDLER |
75 | 73 | ||
76 | /* TT = 0x32, TL = 0, data_access_error */ |
74 | /* TT = 0x32, TL = 0, data_access_error */ |
77 | .org trap_table + TT_DATA_ACCESS_ERROR*ENTRY_SIZE |
75 | .org trap_table + TT_DATA_ACCESS_ERROR*ENTRY_SIZE |
78 | .global data_access_error |
76 | .global data_access_error |
79 | data_access_error: |
77 | data_access_error: |
80 | SIMPLE_HANDLER do_data_access_error |
78 | SIMPLE_HANDLER do_data_access_error |
81 | 79 | ||
82 | /* TT = 0x34, TL = 0, mem_address_not_aligned */ |
80 | /* TT = 0x34, TL = 0, mem_address_not_aligned */ |
83 | .org trap_table + TT_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE |
81 | .org trap_table + TT_MEM_ADDRESS_NOT_ALIGNED*ENTRY_SIZE |
84 | .global mem_address_not_aligned |
82 | .global mem_address_not_aligned |
85 | mem_address_not_aligned: |
83 | mem_address_not_aligned: |
86 | SIMPLE_HANDLER do_mem_address_not_aligned |
84 | SIMPLE_HANDLER do_mem_address_not_aligned |
87 | 85 | ||
88 | /* TT = 0x41, TL = 0, interrupt_level_1 handler */ |
86 | /* TT = 0x41, TL = 0, interrupt_level_1 handler */ |
89 | .org trap_table + TT_INTERRUPT_LEVEL_1*ENTRY_SIZE |
87 | .org trap_table + TT_INTERRUPT_LEVEL_1*ENTRY_SIZE |
90 | .global interrupt_level_1_handler |
88 | .global interrupt_level_1_handler |
91 | interrupt_level_1_handler: |
89 | interrupt_level_1_handler: |
92 | INTERRUPT_LEVEL_N_HANDLER 1 |
90 | INTERRUPT_LEVEL_N_HANDLER 1 |
93 | 91 | ||
94 | /* TT = 0x42, TL = 0, interrupt_level_2 handler */ |
92 | /* TT = 0x42, TL = 0, interrupt_level_2 handler */ |
95 | .org trap_table + TT_INTERRUPT_LEVEL_2*ENTRY_SIZE |
93 | .org trap_table + TT_INTERRUPT_LEVEL_2*ENTRY_SIZE |
96 | .global interrupt_level_2_handler |
94 | .global interrupt_level_2_handler |
97 | interrupt_level_2_handler: |
95 | interrupt_level_2_handler: |
98 | INTERRUPT_LEVEL_N_HANDLER 2 |
96 | INTERRUPT_LEVEL_N_HANDLER 2 |
99 | 97 | ||
100 | /* TT = 0x43, TL = 0, interrupt_level_3 handler */ |
98 | /* TT = 0x43, TL = 0, interrupt_level_3 handler */ |
101 | .org trap_table + TT_INTERRUPT_LEVEL_3*ENTRY_SIZE |
99 | .org trap_table + TT_INTERRUPT_LEVEL_3*ENTRY_SIZE |
102 | .global interrupt_level_3_handler |
100 | .global interrupt_level_3_handler |
103 | interrupt_level_3_handler: |
101 | interrupt_level_3_handler: |
104 | INTERRUPT_LEVEL_N_HANDLER 3 |
102 | INTERRUPT_LEVEL_N_HANDLER 3 |
105 | 103 | ||
106 | /* TT = 0x44, TL = 0, interrupt_level_4 handler */ |
104 | /* TT = 0x44, TL = 0, interrupt_level_4 handler */ |
107 | .org trap_table + TT_INTERRUPT_LEVEL_4*ENTRY_SIZE |
105 | .org trap_table + TT_INTERRUPT_LEVEL_4*ENTRY_SIZE |
108 | .global interrupt_level_4_handler |
106 | .global interrupt_level_4_handler |
109 | interrupt_level_4_handler: |
107 | interrupt_level_4_handler: |
110 | INTERRUPT_LEVEL_N_HANDLER 4 |
108 | INTERRUPT_LEVEL_N_HANDLER 4 |
111 | 109 | ||
112 | /* TT = 0x45, TL = 0, interrupt_level_5 handler */ |
110 | /* TT = 0x45, TL = 0, interrupt_level_5 handler */ |
113 | .org trap_table + TT_INTERRUPT_LEVEL_5*ENTRY_SIZE |
111 | .org trap_table + TT_INTERRUPT_LEVEL_5*ENTRY_SIZE |
114 | .global interrupt_level_5_handler |
112 | .global interrupt_level_5_handler |
115 | interrupt_level_5_handler: |
113 | interrupt_level_5_handler: |
116 | INTERRUPT_LEVEL_N_HANDLER 5 |
114 | INTERRUPT_LEVEL_N_HANDLER 5 |
117 | 115 | ||
118 | /* TT = 0x46, TL = 0, interrupt_level_6 handler */ |
116 | /* TT = 0x46, TL = 0, interrupt_level_6 handler */ |
119 | .org trap_table + TT_INTERRUPT_LEVEL_6*ENTRY_SIZE |
117 | .org trap_table + TT_INTERRUPT_LEVEL_6*ENTRY_SIZE |
120 | .global interrupt_level_6_handler |
118 | .global interrupt_level_6_handler |
121 | interrupt_level_6_handler: |
119 | interrupt_level_6_handler: |
122 | INTERRUPT_LEVEL_N_HANDLER 6 |
120 | INTERRUPT_LEVEL_N_HANDLER 6 |
123 | 121 | ||
124 | /* TT = 0x47, TL = 0, interrupt_level_7 handler */ |
122 | /* TT = 0x47, TL = 0, interrupt_level_7 handler */ |
125 | .org trap_table + TT_INTERRUPT_LEVEL_7*ENTRY_SIZE |
123 | .org trap_table + TT_INTERRUPT_LEVEL_7*ENTRY_SIZE |
126 | .global interrupt_level_7_handler |
124 | .global interrupt_level_7_handler |
127 | interrupt_level_7_handler: |
125 | interrupt_level_7_handler: |
128 | INTERRUPT_LEVEL_N_HANDLER 7 |
126 | INTERRUPT_LEVEL_N_HANDLER 7 |
129 | 127 | ||
130 | /* TT = 0x48, TL = 0, interrupt_level_8 handler */ |
128 | /* TT = 0x48, TL = 0, interrupt_level_8 handler */ |
131 | .org trap_table + TT_INTERRUPT_LEVEL_8*ENTRY_SIZE |
129 | .org trap_table + TT_INTERRUPT_LEVEL_8*ENTRY_SIZE |
132 | .global interrupt_level_8_handler |
130 | .global interrupt_level_8_handler |
133 | interrupt_level_8_handler: |
131 | interrupt_level_8_handler: |
134 | INTERRUPT_LEVEL_N_HANDLER 8 |
132 | INTERRUPT_LEVEL_N_HANDLER 8 |
135 | 133 | ||
136 | /* TT = 0x49, TL = 0, interrupt_level_9 handler */ |
134 | /* TT = 0x49, TL = 0, interrupt_level_9 handler */ |
137 | .org trap_table + TT_INTERRUPT_LEVEL_9*ENTRY_SIZE |
135 | .org trap_table + TT_INTERRUPT_LEVEL_9*ENTRY_SIZE |
138 | .global interrupt_level_9_handler |
136 | .global interrupt_level_9_handler |
139 | interrupt_level_9_handler: |
137 | interrupt_level_9_handler: |
140 | INTERRUPT_LEVEL_N_HANDLER 9 |
138 | INTERRUPT_LEVEL_N_HANDLER 9 |
141 | 139 | ||
142 | /* TT = 0x4a, TL = 0, interrupt_level_10 handler */ |
140 | /* TT = 0x4a, TL = 0, interrupt_level_10 handler */ |
143 | .org trap_table + TT_INTERRUPT_LEVEL_10*ENTRY_SIZE |
141 | .org trap_table + TT_INTERRUPT_LEVEL_10*ENTRY_SIZE |
144 | .global interrupt_level_10_handler |
142 | .global interrupt_level_10_handler |
145 | interrupt_level_10_handler: |
143 | interrupt_level_10_handler: |
146 | INTERRUPT_LEVEL_N_HANDLER 10 |
144 | INTERRUPT_LEVEL_N_HANDLER 10 |
147 | 145 | ||
148 | /* TT = 0x4b, TL = 0, interrupt_level_11 handler */ |
146 | /* TT = 0x4b, TL = 0, interrupt_level_11 handler */ |
149 | .org trap_table + TT_INTERRUPT_LEVEL_11*ENTRY_SIZE |
147 | .org trap_table + TT_INTERRUPT_LEVEL_11*ENTRY_SIZE |
150 | .global interrupt_level_11_handler |
148 | .global interrupt_level_11_handler |
151 | interrupt_level_11_handler: |
149 | interrupt_level_11_handler: |
152 | INTERRUPT_LEVEL_N_HANDLER 11 |
150 | INTERRUPT_LEVEL_N_HANDLER 11 |
153 | 151 | ||
154 | /* TT = 0x4c, TL = 0, interrupt_level_12 handler */ |
152 | /* TT = 0x4c, TL = 0, interrupt_level_12 handler */ |
155 | .org trap_table + TT_INTERRUPT_LEVEL_12*ENTRY_SIZE |
153 | .org trap_table + TT_INTERRUPT_LEVEL_12*ENTRY_SIZE |
156 | .global interrupt_level_12_handler |
154 | .global interrupt_level_12_handler |
157 | interrupt_level_12_handler: |
155 | interrupt_level_12_handler: |
158 | INTERRUPT_LEVEL_N_HANDLER 12 |
156 | INTERRUPT_LEVEL_N_HANDLER 12 |
159 | 157 | ||
160 | /* TT = 0x4d, TL = 0, interrupt_level_13 handler */ |
158 | /* TT = 0x4d, TL = 0, interrupt_level_13 handler */ |
161 | .org trap_table + TT_INTERRUPT_LEVEL_13*ENTRY_SIZE |
159 | .org trap_table + TT_INTERRUPT_LEVEL_13*ENTRY_SIZE |
162 | .global interrupt_level_13_handler |
160 | .global interrupt_level_13_handler |
163 | interrupt_level_13_handler: |
161 | interrupt_level_13_handler: |
164 | INTERRUPT_LEVEL_N_HANDLER 13 |
162 | INTERRUPT_LEVEL_N_HANDLER 13 |
165 | 163 | ||
166 | /* TT = 0x4e, TL = 0, interrupt_level_14 handler */ |
164 | /* TT = 0x4e, TL = 0, interrupt_level_14 handler */ |
167 | .org trap_table + TT_INTERRUPT_LEVEL_14*ENTRY_SIZE |
165 | .org trap_table + TT_INTERRUPT_LEVEL_14*ENTRY_SIZE |
168 | .global interrupt_level_14_handler |
166 | .global interrupt_level_14_handler |
169 | interrupt_level_14_handler: |
167 | interrupt_level_14_handler: |
170 | INTERRUPT_LEVEL_N_HANDLER 14 |
168 | INTERRUPT_LEVEL_N_HANDLER 14 |
171 | 169 | ||
172 | /* TT = 0x4f, TL = 0, interrupt_level_15 handler */ |
170 | /* TT = 0x4f, TL = 0, interrupt_level_15 handler */ |
173 | .org trap_table + TT_INTERRUPT_LEVEL_15*ENTRY_SIZE |
171 | .org trap_table + TT_INTERRUPT_LEVEL_15*ENTRY_SIZE |
174 | .global interrupt_level_15_handler |
172 | .global interrupt_level_15_handler |
175 | interrupt_level_15_handler: |
173 | interrupt_level_15_handler: |
176 | INTERRUPT_LEVEL_N_HANDLER 15 |
174 | INTERRUPT_LEVEL_N_HANDLER 15 |
177 | 175 | ||
178 | /* TT = 0x60, TL = 0, interrupt_vector_trap handler */ |
176 | /* TT = 0x60, TL = 0, interrupt_vector_trap handler */ |
179 | .org trap_table + TT_INTERRUPT_VECTOR_TRAP*ENTRY_SIZE |
177 | .org trap_table + TT_INTERRUPT_VECTOR_TRAP*ENTRY_SIZE |
180 | .global interrupt_vector_trap_handler |
178 | .global interrupt_vector_trap_handler |
181 | interrupt_vector_trap_handler: |
179 | interrupt_vector_trap_handler: |
182 | INTERRUPT_VECTOR_TRAP_HANDLER |
180 | INTERRUPT_VECTOR_TRAP_HANDLER |
183 | 181 | ||
184 | /* TT = 0x64, TL = 0, fast_instruction_access_MMU_miss */ |
182 | /* TT = 0x64, TL = 0, fast_instruction_access_MMU_miss */ |
185 | .org trap_table + TT_FAST_INSTRUCTION_ACCESS_MMU_MISS*ENTRY_SIZE |
183 | .org trap_table + TT_FAST_INSTRUCTION_ACCESS_MMU_MISS*ENTRY_SIZE |
186 | .global fast_instruction_access_mmu_miss_handler |
184 | .global fast_instruction_access_mmu_miss_handler |
187 | fast_instruction_access_mmu_miss_handler: |
185 | fast_instruction_access_mmu_miss_handler: |
188 | FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER |
186 | FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER |
189 | 187 | ||
190 | /* TT = 0x68, TL = 0, fast_data_access_MMU_miss */ |
188 | /* TT = 0x68, TL = 0, fast_data_access_MMU_miss */ |
191 | .org trap_table + TT_FAST_DATA_ACCESS_MMU_MISS*ENTRY_SIZE |
189 | .org trap_table + TT_FAST_DATA_ACCESS_MMU_MISS*ENTRY_SIZE |
192 | .global fast_data_access_mmu_miss_handler |
190 | .global fast_data_access_mmu_miss_handler |
193 | fast_data_access_mmu_miss_handler: |
191 | fast_data_access_mmu_miss_handler: |
194 | FAST_DATA_ACCESS_MMU_MISS_HANDLER |
192 | FAST_DATA_ACCESS_MMU_MISS_HANDLER |
195 | 193 | ||
196 | /* TT = 0x6c, TL = 0, fast_data_access_protection */ |
194 | /* TT = 0x6c, TL = 0, fast_data_access_protection */ |
197 | .org trap_table + TT_FAST_DATA_ACCESS_PROTECTION*ENTRY_SIZE |
195 | .org trap_table + TT_FAST_DATA_ACCESS_PROTECTION*ENTRY_SIZE |
198 | .global fast_data_access_protection_handler |
196 | .global fast_data_access_protection_handler |
199 | fast_data_access_protection_handler: |
197 | fast_data_access_protection_handler: |
200 | FAST_DATA_ACCESS_PROTECTION_HANDLER |
198 | FAST_DATA_ACCESS_PROTECTION_HANDLER |
201 | 199 | ||
202 | /* TT = 0x80, TL = 0, spill_0_normal handler */ |
200 | /* TT = 0x80, TL = 0, spill_0_normal handler */ |
203 | .org trap_table + TT_SPILL_0_NORMAL*ENTRY_SIZE |
201 | .org trap_table + TT_SPILL_0_NORMAL*ENTRY_SIZE |
204 | .global spill_0_normal |
202 | .global spill_0_normal |
205 | spill_0_normal: |
203 | spill_0_normal: |
206 | SPILL_NORMAL_HANDLER |
204 | SPILL_NORMAL_HANDLER_KERNEL |
207 | 205 | ||
208 | /* TT = 0xc0, TL = 0, fill_0_normal handler */ |
206 | /* TT = 0xc0, TL = 0, fill_0_normal handler */ |
209 | .org trap_table + TT_FILL_0_NORMAL*ENTRY_SIZE |
207 | .org trap_table + TT_FILL_0_NORMAL*ENTRY_SIZE |
210 | .global fill_0_normal |
208 | .global fill_0_normal |
211 | fill_0_normal: |
209 | fill_0_normal: |
212 | FILL_NORMAL_HANDLER |
210 | FILL_NORMAL_HANDLER_KERNEL |
213 | 211 | ||
214 | /* |
212 | /* |
215 | * Handlers for TL>0. |
213 | * Handlers for TL>0. |
216 | */ |
214 | */ |
217 | 215 | ||
218 | /* TT = 0x08, TL > 0, instruction_access_exception */ |
216 | /* TT = 0x08, TL > 0, instruction_access_exception */ |
219 | .org trap_table + (TT_INSTRUCTION_ACCESS_EXCEPTION+512)*ENTRY_SIZE |
217 | .org trap_table + (TT_INSTRUCTION_ACCESS_EXCEPTION+512)*ENTRY_SIZE |
220 | .global instruction_access_exception_high |
218 | .global instruction_access_exception_high |
221 | instruction_access_exception_high: |
219 | instruction_access_exception_high: |
222 | SIMPLE_HANDLER do_instruction_access_exc |
220 | SIMPLE_HANDLER do_instruction_access_exc |
223 | 221 | ||
224 | /* TT = 0x10, TL > 0, illegal_instruction */ |
222 | /* TT = 0x10, TL > 0, illegal_instruction */ |
225 | .org trap_table + (TT_ILLEGAL_INSTRUCTION+512)*ENTRY_SIZE |
223 | .org trap_table + (TT_ILLEGAL_INSTRUCTION+512)*ENTRY_SIZE |
226 | .global illegal_instruction_high |
224 | .global illegal_instruction_high |
227 | illegal_instruction_high: |
225 | illegal_instruction_high: |
228 | SIMPLE_HANDLER do_illegal_instruction |
226 | SIMPLE_HANDLER do_illegal_instruction |
229 | 227 | ||
230 | /* TT = 0x24, TL > 0, clean_window handler */ |
228 | /* TT = 0x24, TL > 0, clean_window handler */ |
231 | .org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE |
229 | .org trap_table + (TT_CLEAN_WINDOW+512)*ENTRY_SIZE |
232 | .global clean_window_handler_high |
230 | .global clean_window_handler_high |
233 | clean_window_handler_high: |
231 | clean_window_handler_high: |
234 | CLEAN_WINDOW_HANDLER |
232 | CLEAN_WINDOW_HANDLER |
235 | 233 | ||
236 | /* TT = 0x32, TL > 0, data_access_error */ |
234 | /* TT = 0x32, TL > 0, data_access_error */ |
237 | .org trap_table + (TT_DATA_ACCESS_ERROR+512)*ENTRY_SIZE |
235 | .org trap_table + (TT_DATA_ACCESS_ERROR+512)*ENTRY_SIZE |
238 | .global data_access_error_high |
236 | .global data_access_error_high |
239 | data_access_error_high: |
237 | data_access_error_high: |
240 | SIMPLE_HANDLER do_data_access_error |
238 | SIMPLE_HANDLER do_data_access_error |
241 | 239 | ||
242 | /* TT = 0x34, TL > 0, mem_address_not_aligned */ |
240 | /* TT = 0x34, TL > 0, mem_address_not_aligned */ |
243 | .org trap_table + (TT_MEM_ADDRESS_NOT_ALIGNED+512)*ENTRY_SIZE |
241 | .org trap_table + (TT_MEM_ADDRESS_NOT_ALIGNED+512)*ENTRY_SIZE |
244 | .global mem_address_not_aligned_high |
242 | .global mem_address_not_aligned_high |
245 | mem_address_not_aligned_high: |
243 | mem_address_not_aligned_high: |
246 | SIMPLE_HANDLER do_mem_address_not_aligned |
244 | SIMPLE_HANDLER do_mem_address_not_aligned |
247 | 245 | ||
248 | /* TT = 0x64, TL > 0, fast_instruction_access_MMU_miss */ |
246 | /* TT = 0x64, TL > 0, fast_instruction_access_MMU_miss */ |
249 | .org trap_table + (TT_FAST_INSTRUCTION_ACCESS_MMU_MISS+512)*ENTRY_SIZE |
247 | .org trap_table + (TT_FAST_INSTRUCTION_ACCESS_MMU_MISS+512)*ENTRY_SIZE |
250 | .global fast_instruction_access_mmu_miss_handler_high |
248 | .global fast_instruction_access_mmu_miss_handler_high |
251 | fast_instruction_access_mmu_miss_handler_high: |
249 | fast_instruction_access_mmu_miss_handler_high: |
252 | FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER |
250 | FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER |
253 | 251 | ||
254 | /* TT = 0x68, TL > 0, fast_data_access_MMU_miss */ |
252 | /* TT = 0x68, TL > 0, fast_data_access_MMU_miss */ |
255 | .org trap_table + (TT_FAST_DATA_ACCESS_MMU_MISS+512)*ENTRY_SIZE |
253 | .org trap_table + (TT_FAST_DATA_ACCESS_MMU_MISS+512)*ENTRY_SIZE |
256 | .global fast_data_access_mmu_miss_handler_high |
254 | .global fast_data_access_mmu_miss_handler_high |
257 | fast_data_access_mmu_miss_handler_high: |
255 | fast_data_access_mmu_miss_handler_high: |
258 | FAST_DATA_ACCESS_MMU_MISS_HANDLER |
256 | FAST_DATA_ACCESS_MMU_MISS_HANDLER |
259 | 257 | ||
260 | /* TT = 0x6c, TL > 0, fast_data_access_protection */ |
258 | /* TT = 0x6c, TL > 0, fast_data_access_protection */ |
261 | .org trap_table + (TT_FAST_DATA_ACCESS_PROTECTION+512)*ENTRY_SIZE |
259 | .org trap_table + (TT_FAST_DATA_ACCESS_PROTECTION+512)*ENTRY_SIZE |
262 | .global fast_data_access_protection_handler_high |
260 | .global fast_data_access_protection_handler_high |
263 | fast_data_access_protection_handler_high: |
261 | fast_data_access_protection_handler_high: |
264 | FAST_DATA_ACCESS_PROTECTION_HANDLER |
262 | FAST_DATA_ACCESS_PROTECTION_HANDLER |
265 | 263 | ||
266 | /* TT = 0x80, TL > 0, spill_0_normal handler */ |
264 | /* TT = 0x80, TL > 0, spill_0_normal handler */ |
267 | .org trap_table + (TT_SPILL_0_NORMAL+512)*ENTRY_SIZE |
265 | .org trap_table + (TT_SPILL_0_NORMAL+512)*ENTRY_SIZE |
268 | .global spill_0_normal_high |
266 | .global spill_0_normal_high |
269 | spill_0_normal_high: |
267 | spill_0_normal_high: |
270 | SPILL_NORMAL_HANDLER |
268 | SPILL_NORMAL_HANDLER_KERNEL |
271 | 269 | ||
272 | /* TT = 0xc0, TL > 0, fill_0_normal handler */ |
270 | /* TT = 0xc0, TL > 0, fill_0_normal handler */ |
273 | .org trap_table + (TT_FILL_0_NORMAL+512)*ENTRY_SIZE |
271 | .org trap_table + (TT_FILL_0_NORMAL+512)*ENTRY_SIZE |
274 | .global fill_0_normal_high |
272 | .global fill_0_normal_high |
275 | fill_0_normal_high: |
273 | fill_0_normal_high: |
276 | FILL_NORMAL_HANDLER |
274 | FILL_NORMAL_HANDLER_KERNEL |
277 | 275 | ||
278 | 276 | ||
279 | /* Preemptible trap handler for TL=1. |
277 | /* Preemptible trap handler for TL=1. |
280 | * |
278 | * |
281 | * This trap handler makes arrangements to make calling of scheduler() from |
279 | * This trap handler makes arrangements to make calling of scheduler() from |
282 | * within a trap context possible. It is guaranteed to function only when traps |
280 | * within a trap context possible. It is called from several other trap |
283 | * are not nested (i.e. for TL=1). |
281 | * handlers. |
284 | * |
282 | * |
285 | * Every trap handler on TL=1 that makes a call to the scheduler needs to |
- | |
286 | * be based on this function. The reason behind it is that the nested |
- | |
287 | * trap levels and the automatic saving of the interrupted context by hardware |
283 | * This function can be entered either with interrupt globals or alternate globals. |
288 | * does not work well together with scheduling (i.e. a thread cannot be rescheduled |
284 | * Memory management trap handlers are obliged to switch to one of those global sets |
289 | * with TL>0). Therefore it is necessary to eliminate the effect of trap levels |
285 | * prior to calling this function. Register window management functions are not |
290 | * by software and save the necessary state on the kernel stack. |
286 | * allowed to modify the alternate global registers. |
291 | * |
- | |
292 | * Note that for traps with TL>1, more state needs to be saved. This function |
- | |
293 | * is therefore not going to work when TL>1. |
- | |
294 | * |
- | |
295 | * The caller is responsible for doing SAVE and allocating |
- | |
296 | * PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE bytes on the stack. |
- | |
297 | * |
287 | * |
298 | * Input registers: |
288 | * Input registers: |
299 | * %l0 Address of function to call. |
289 | * %g1 Address of function to call. |
300 | * Output registers: |
290 | * %g2 Argument for the function. |
- | 291 | * %g6 Pre-set as kernel stack base if trap from userspace. |
|
301 | * %l1 - %l7 Copy of %g1 - %g7 |
292 | * %g7 Reserved. |
302 | */ |
293 | */ |
303 | .global preemptible_handler |
294 | .global preemptible_handler |
304 | preemptible_handler: |
295 | preemptible_handler: |
- | 296 | rdpr %tstate, %g3 |
|
- | 297 | andcc %g3, TSTATE_PRIV_BIT, %g0 ! if this trap came from the privileged mode... |
|
- | 298 | bnz 0f ! ...skip setting of kernel stack and primary context |
|
- | 299 | nop |
|
- | 300 | ||
- | 301 | /* |
|
- | 302 | * Switch to kernel stack. The old stack is |
|
- | 303 | * automatically saved in the old window's %sp |
|
- | 304 | * and the new window's %fp. |
|
- | 305 | */ |
|
- | 306 | save %g6, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp |
|
- | 307 | ||
- | 308 | /* |
|
- | 309 | * Mark the CANSAVE windows as OTHER windows. |
|
- | 310 | * Set CLEANWIN to NWINDOW-1 so that clean_window traps do not occur. |
|
- | 311 | */ |
|
- | 312 | rdpr %cansave, %l0 |
|
- | 313 | wrpr %l0, %otherwin |
|
- | 314 | wrpr %g0, %cansave |
|
- | 315 | wrpr %g0, NWINDOW-1, %cleanwin |
|
- | 316 | ||
- | 317 | /* |
|
- | 318 | * Switch to primary context 0. |
|
- | 319 | */ |
|
- | 320 | mov VA_PRIMARY_CONTEXT_REG, %l0 |
|
- | 321 | stxa %g0, [%l0] ASI_DMMU |
|
- | 322 | set kernel_image_start, %l0 |
|
- | 323 | flush %l0 |
|
- | 324 | ||
- | 325 | ba 1f |
|
- | 326 | nop |
|
- | 327 | ||
- | 328 | 0: |
|
- | 329 | save %sp, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp |
|
- | 330 | ||
305 | /* |
331 | /* |
- | 332 | * At this moment, we are using the kernel stack |
|
- | 333 | * and have successfully allocated a register window. |
|
- | 334 | */ |
|
- | 335 | 1: |
|
- | 336 | ||
- | 337 | /* |
|
- | 338 | * Copy arguments. |
|
- | 339 | */ |
|
- | 340 | mov %g1, %l0 |
|
- | 341 | mov %g2, %o0 |
|
- | 342 | ||
- | 343 | /* |
|
306 | * Save TSTATE, TPC, TNPC and PSTATE aside. |
344 | * Save TSTATE, TPC and TNPC aside. |
307 | */ |
345 | */ |
308 | rdpr %tstate, %g1 |
346 | rdpr %tstate, %g1 |
309 | rdpr %tpc, %g2 |
347 | rdpr %tpc, %g2 |
310 | rdpr %tnpc, %g3 |
348 | rdpr %tnpc, %g3 |
311 | rdpr %pstate, %g4 |
- | |
312 | 349 | ||
313 | /* |
350 | /* |
314 | * The following memory accesses will not fault |
351 | * The following memory accesses will not fault |
315 | * because special provisions are made to have |
352 | * because special provisions are made to have |
316 | * the kernel stack of THREAD locked in DTLB. |
353 | * the kernel stack of THREAD locked in DTLB. |
317 | */ |
354 | */ |
318 | stx %g1, [%fp + STACK_BIAS + SAVED_TSTATE] |
355 | stx %g1, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE] |
319 | stx %g2, [%fp + STACK_BIAS + SAVED_TPC] |
356 | stx %g2, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC] |
320 | stx %g3, [%fp + STACK_BIAS + SAVED_TNPC] |
357 | stx %g3, [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC] |
321 | stx %g4, [%fp + STACK_BIAS + SAVED_PSTATE] |
- | |
322 | 358 | ||
323 | /* |
- | |
324 | * Write 0 to TL. |
- | |
325 | */ |
- | |
326 | wrpr %g0, 0, %tl |
359 | wrpr %g0, 0, %tl |
327 | - | ||
328 | /* |
- | |
329 | * Alter PSTATE. |
- | |
330 | * - switch to normal globals. |
- | |
331 | */ |
- | |
332 | and %g4, ~(PSTATE_AG_BIT|PSTATE_IG_BIT|PSTATE_MG_BIT), %g4 |
- | |
333 | wrpr %g4, 0, %pstate |
360 | wrpr %g0, PSTATE_PRIV_BIT, %pstate |
334 | - | ||
335 | /* |
- | |
336 | * Save the normal globals. |
- | |
337 | */ |
- | |
338 | SAVE_GLOBALS |
361 | SAVE_GLOBALS |
339 | 362 | ||
340 | /* |
363 | /* |
341 | * Call the higher-level handler. |
364 | * Call the higher-level handler and pass istate as second parameter. |
342 | */ |
365 | */ |
343 | mov %fp, %o1 ! calculate istate address |
- | |
344 | call %l0 |
366 | call %l0 |
345 | add %o1, STACK_BIAS + SAVED_PSTATE, %o1 ! calculate istate address |
367 | add %sp, PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC, %o1 |
346 | 368 | ||
347 | /* |
- | |
348 | * Restore the normal global register set. |
- | |
349 | */ |
- | |
350 | RESTORE_GLOBALS |
369 | RESTORE_GLOBALS |
- | 370 | wrpr %g0, PSTATE_AG_BIT | PSTATE_PRIV_BIT, %pstate |
|
- | 371 | wrpr %g0, 1, %tl |
|
351 | 372 | ||
352 | /* |
373 | /* |
353 | * Restore PSTATE from saved copy. |
374 | * Read TSTATE, TPC and TNPC from saved copy. |
354 | * Alternate/Interrupt/MM globals become active. |
- | |
355 | */ |
375 | */ |
356 | ldx [%fp + STACK_BIAS + SAVED_PSTATE], %l4 |
376 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TSTATE], %g1 |
357 | wrpr %l4, 0, %pstate |
377 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TPC], %g2 |
- | 378 | ldx [%sp + PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE + STACK_BIAS + SAVED_TNPC], %g3 |
|
358 | 379 | ||
359 | /* |
380 | /* |
360 | * Write 1 to TL. |
381 | * Restore TSTATE, TPC and TNPC from saved copies. |
361 | */ |
382 | */ |
- | 383 | wrpr %g1, 0, %tstate |
|
362 | wrpr %g0, 1, %tl |
384 | wrpr %g2, 0, %tpc |
- | 385 | wrpr %g3, 0, %tnpc |
|
363 | 386 | ||
364 | /* |
387 | /* |
- | 388 | * If OTHERWIN is zero, then all the userspace windows have been |
|
- | 389 | * spilled to kernel memory (i.e. register window buffer). If |
|
- | 390 | * OTHERWIN is non-zero, then some userspace windows are still |
|
- | 391 | * valid. Others might have been spilled. However, the CWP pointer |
|
365 | * Read TSTATE, TPC and TNPC from saved copy. |
392 | * needs no fixing because the scheduler had not been called. |
366 | */ |
393 | */ |
367 | ldx [%fp + STACK_BIAS + SAVED_TSTATE], %g1 |
- | |
368 | ldx [%fp + STACK_BIAS + SAVED_TPC], %g2 |
394 | rdpr %otherwin, %l0 |
369 | ldx [%fp + STACK_BIAS + SAVED_TNPC], %g3 |
395 | brnz %l0, 0f |
- | 396 | nop |
|
370 | 397 | ||
371 | /* |
398 | /* |
372 | * Do restore to match the save instruction from the top-level handler. |
399 | * OTHERWIN == 0 |
373 | */ |
400 | */ |
374 | restore |
- | |
375 | 401 | ||
376 | /* |
402 | /* |
377 | * On execution of the RETRY instruction, CWP will be restored from the TSTATE |
- | |
378 | * register. However, because of scheduling, it is possible that CWP in the saved |
- | |
379 | * TSTATE is different from the current CWP. The following chunk of code fixes |
403 | * If TSTATE.CWP + 1 == CWP, then we still do not have to fix CWP. |
380 | * CWP in the saved copy of TSTATE. |
- | |
381 | */ |
404 | */ |
382 | rdpr %cwp, %g4 ! read current CWP |
405 | and %g1, TSTATE_CWP_MASK, %l0 |
- | 406 | inc %l0 |
|
383 | and %g1, ~0x1f, %g1 ! clear CWP field in saved TSTATE |
407 | and %l0, TSTATE_CWP_MASK, %l0 ! %l0 mod NWINDOW |
- | 408 | rdpr %cwp, %l1 |
|
- | 409 | cmp %l0, %l1 |
|
384 | or %g1, %g4, %g1 ! write current CWP to TSTATE |
410 | bz 0f ! CWP is ok |
- | 411 | nop |
|
385 | 412 | ||
386 | /* |
413 | /* |
387 | * Restore TSTATE, TPC and TNPC from saved copies. |
414 | * Fix CWP. |
388 | */ |
415 | */ |
389 | wrpr %g1, 0, %tstate |
416 | mov %fp, %g1 |
- | 417 | flushw |
|
390 | wrpr %g2, 0, %tpc |
418 | wrpr %l0, 0, %cwp |
391 | wrpr %g3, 0, %tnpc |
419 | mov %g1, %fp |
392 | 420 | ||
393 | /* |
421 | /* |
394 | * Return from interrupt. |
422 | * OTHERWIN != 0 or fall-through from the OTHERWIN == 0 case. |
395 | */ |
423 | */ |
- | 424 | 0: |
|
- | 425 | ! TODO: restore register windows from register window memory buffer |
|
- | 426 | ||
- | 427 | restore |
|
396 | retry |
428 | retry |
397 | 429 |