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1 | # |
1 | # |
2 | # Copyright (c) 2005 Jakub Jermar |
2 | # Copyright (c) 2005 Jakub Jermar |
3 | # All rights reserved. |
3 | # All rights reserved. |
4 | # |
4 | # |
5 | # Redistribution and use in source and binary forms, with or without |
5 | # Redistribution and use in source and binary forms, with or without |
6 | # modification, are permitted provided that the following conditions |
6 | # modification, are permitted provided that the following conditions |
7 | # are met: |
7 | # are met: |
8 | # |
8 | # |
9 | # - Redistributions of source code must retain the above copyright |
9 | # - Redistributions of source code must retain the above copyright |
10 | # notice, this list of conditions and the following disclaimer. |
10 | # notice, this list of conditions and the following disclaimer. |
11 | # - Redistributions in binary form must reproduce the above copyright |
11 | # - Redistributions in binary form must reproduce the above copyright |
12 | # notice, this list of conditions and the following disclaimer in the |
12 | # notice, this list of conditions and the following disclaimer in the |
13 | # documentation and/or other materials provided with the distribution. |
13 | # documentation and/or other materials provided with the distribution. |
14 | # - The name of the author may not be used to endorse or promote products |
14 | # - The name of the author may not be used to endorse or promote products |
15 | # derived from this software without specific prior written permission. |
15 | # derived from this software without specific prior written permission. |
16 | # |
16 | # |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | # |
27 | # |
28 | 28 | ||
29 | #include <arch/arch.h> |
29 | #include <arch/arch.h> |
30 | #include <arch/stack.h> |
30 | #include <arch/stack.h> |
31 | #include <arch/regdef.h> |
31 | #include <arch/regdef.h> |
32 | #include <arch/mm/mmu.h> |
32 | #include <arch/mm/mmu.h> |
33 | 33 | ||
34 | .text |
34 | .text |
35 | 35 | ||
36 | .register %g2, #scratch |
36 | .register %g2, #scratch |
37 | .register %g3, #scratch |
37 | .register %g3, #scratch |
38 | 38 | ||
39 | /* |
39 | /* |
40 | * This is the assembly language version of our _memcpy() generated by gcc. |
40 | * This is the assembly language version of our _memcpy() generated by gcc. |
41 | */ |
41 | */ |
42 | .global memcpy |
42 | .global memcpy |
43 | memcpy: |
43 | memcpy: |
- | 44 | mov %o0, %o3 ! save dst |
|
44 | add %o1, 7, %g1 |
45 | add %o1, 7, %g1 |
45 | and %g1, -8, %g1 |
46 | and %g1, -8, %g1 |
46 | cmp %o1, %g1 |
47 | cmp %o1, %g1 |
47 | be,pn %xcc, 3f |
48 | be,pn %xcc, 3f |
48 | add %o0, 7, %g1 |
49 | add %o0, 7, %g1 |
49 | mov 0, %g3 |
50 | mov 0, %g3 |
50 | 0: |
51 | 0: |
51 | brz,pn %o2, 2f |
52 | brz,pn %o2, 2f |
52 | mov 0, %g2 |
53 | mov 0, %g2 |
53 | 1: |
54 | 1: |
54 | ldub [%g3 + %o1], %g1 |
55 | ldub [%g3 + %o1], %g1 |
55 | add %g2, 1, %g2 |
56 | add %g2, 1, %g2 |
56 | cmp %o2, %g2 |
57 | cmp %o2, %g2 |
57 | stb %g1, [%g3 + %o0] |
58 | stb %g1, [%g3 + %o0] |
58 | bne,pt %xcc, 1b |
59 | bne,pt %xcc, 1b |
59 | mov %g2, %g3 |
60 | mov %g2, %g3 |
60 | 2: |
61 | 2: |
61 | jmp %o7 + 8 ! exit point |
62 | jmp %o7 + 8 ! exit point |
62 | mov %o1, %o0 |
63 | mov %o3, %o0 |
63 | 3: |
64 | 3: |
64 | and %g1, -8, %g1 |
65 | and %g1, -8, %g1 |
65 | cmp %o0, %g1 |
66 | cmp %o0, %g1 |
66 | bne,pt %xcc, 0b |
67 | bne,pt %xcc, 0b |
67 | mov 0, %g3 |
68 | mov 0, %g3 |
68 | srlx %o2, 3, %g4 |
69 | srlx %o2, 3, %g4 |
69 | brz,pn %g4, 5f |
70 | brz,pn %g4, 5f |
70 | mov 0, %g5 |
71 | mov 0, %g5 |
71 | 4: |
72 | 4: |
72 | sllx %g3, 3, %g2 |
73 | sllx %g3, 3, %g2 |
73 | add %g5, 1, %g3 |
74 | add %g5, 1, %g3 |
74 | ldx [%o1 + %g2], %g1 |
75 | ldx [%o1 + %g2], %g1 |
75 | mov %g3, %g5 |
76 | mov %g3, %g5 |
76 | cmp %g4, %g3 |
77 | cmp %g4, %g3 |
77 | bne,pt %xcc, 4b |
78 | bne,pt %xcc, 4b |
78 | stx %g1, [%o0 + %g2] |
79 | stx %g1, [%o0 + %g2] |
79 | 5: |
80 | 5: |
80 | and %o2, 7, %o2 |
81 | and %o2, 7, %o2 |
81 | brz,pn %o2, 2b |
82 | brz,pn %o2, 2b |
82 | sllx %g4, 3, %g1 |
83 | sllx %g4, 3, %g1 |
83 | mov 0, %g2 |
84 | mov 0, %g2 |
84 | add %g1, %o0, %o0 |
85 | add %g1, %o0, %o0 |
85 | add %g1, %o1, %g4 |
86 | add %g1, %o1, %g4 |
86 | mov 0, %g3 |
87 | mov 0, %g3 |
87 | 6: |
88 | 6: |
88 | ldub [%g2 + %g4], %g1 |
89 | ldub [%g2 + %g4], %g1 |
89 | stb %g1, [%g2 + %o0] |
90 | stb %g1, [%g2 + %o0] |
90 | add %g3, 1, %g2 |
91 | add %g3, 1, %g2 |
91 | cmp %o2, %g2 |
92 | cmp %o2, %g2 |
92 | bne,pt %xcc, 6b |
93 | bne,pt %xcc, 6b |
93 | mov %g2, %g3 |
94 | mov %g2, %g3 |
94 | 95 | ||
95 | jmp %o7 + 8 ! exit point |
96 | jmp %o7 + 8 ! exit point |
96 | mov %o1, %o0 |
97 | mov %o3, %o0 |
97 | 98 | ||
98 | /* |
99 | /* |
99 | * Almost the same as memcpy() except the loads are from userspace. |
100 | * Almost the same as memcpy() except the loads are from userspace. |
100 | */ |
101 | */ |
101 | .global memcpy_from_uspace |
102 | .global memcpy_from_uspace |
102 | memcpy_from_uspace: |
103 | memcpy_from_uspace: |
- | 104 | mov %o0, %o3 ! save dst |
|
103 | add %o1, 7, %g1 |
105 | add %o1, 7, %g1 |
104 | and %g1, -8, %g1 |
106 | and %g1, -8, %g1 |
105 | cmp %o1, %g1 |
107 | cmp %o1, %g1 |
106 | be,pn %xcc, 3f |
108 | be,pn %xcc, 3f |
107 | add %o0, 7, %g1 |
109 | add %o0, 7, %g1 |
108 | mov 0, %g3 |
110 | mov 0, %g3 |
109 | 0: |
111 | 0: |
110 | brz,pn %o2, 2f |
112 | brz,pn %o2, 2f |
111 | mov 0, %g2 |
113 | mov 0, %g2 |
112 | 1: |
114 | 1: |
113 | lduba [%g3 + %o1] ASI_AIUS, %g1 |
115 | lduba [%g3 + %o1] ASI_AIUS, %g1 |
114 | add %g2, 1, %g2 |
116 | add %g2, 1, %g2 |
115 | cmp %o2, %g2 |
117 | cmp %o2, %g2 |
116 | stb %g1, [%g3 + %o0] |
118 | stb %g1, [%g3 + %o0] |
117 | bne,pt %xcc, 1b |
119 | bne,pt %xcc, 1b |
118 | mov %g2, %g3 |
120 | mov %g2, %g3 |
119 | 2: |
121 | 2: |
120 | jmp %o7 + 8 ! exit point |
122 | jmp %o7 + 8 ! exit point |
121 | mov %o1, %o0 |
123 | mov %o3, %o0 |
122 | 3: |
124 | 3: |
123 | and %g1, -8, %g1 |
125 | and %g1, -8, %g1 |
124 | cmp %o0, %g1 |
126 | cmp %o0, %g1 |
125 | bne,pt %xcc, 0b |
127 | bne,pt %xcc, 0b |
126 | mov 0, %g3 |
128 | mov 0, %g3 |
127 | srlx %o2, 3, %g4 |
129 | srlx %o2, 3, %g4 |
128 | brz,pn %g4, 5f |
130 | brz,pn %g4, 5f |
129 | mov 0, %g5 |
131 | mov 0, %g5 |
130 | 4: |
132 | 4: |
131 | sllx %g3, 3, %g2 |
133 | sllx %g3, 3, %g2 |
132 | add %g5, 1, %g3 |
134 | add %g5, 1, %g3 |
133 | ldxa [%o1 + %g2] ASI_AIUS, %g1 |
135 | ldxa [%o1 + %g2] ASI_AIUS, %g1 |
134 | mov %g3, %g5 |
136 | mov %g3, %g5 |
135 | cmp %g4, %g3 |
137 | cmp %g4, %g3 |
136 | bne,pt %xcc, 4b |
138 | bne,pt %xcc, 4b |
137 | stx %g1, [%o0 + %g2] |
139 | stx %g1, [%o0 + %g2] |
138 | 5: |
140 | 5: |
139 | and %o2, 7, %o2 |
141 | and %o2, 7, %o2 |
140 | brz,pn %o2, 2b |
142 | brz,pn %o2, 2b |
141 | sllx %g4, 3, %g1 |
143 | sllx %g4, 3, %g1 |
142 | mov 0, %g2 |
144 | mov 0, %g2 |
143 | add %g1, %o0, %o0 |
145 | add %g1, %o0, %o0 |
144 | add %g1, %o1, %g4 |
146 | add %g1, %o1, %g4 |
145 | mov 0, %g3 |
147 | mov 0, %g3 |
146 | 6: |
148 | 6: |
147 | lduba [%g2 + %g4] ASI_AIUS, %g1 |
149 | lduba [%g2 + %g4] ASI_AIUS, %g1 |
148 | stb %g1, [%g2 + %o0] |
150 | stb %g1, [%g2 + %o0] |
149 | add %g3, 1, %g2 |
151 | add %g3, 1, %g2 |
150 | cmp %o2, %g2 |
152 | cmp %o2, %g2 |
151 | bne,pt %xcc, 6b |
153 | bne,pt %xcc, 6b |
152 | mov %g2, %g3 |
154 | mov %g2, %g3 |
153 | 155 | ||
154 | jmp %o7 + 8 ! exit point |
156 | jmp %o7 + 8 ! exit point |
155 | mov %o1, %o0 |
157 | mov %o3, %o0 |
156 | 158 | ||
157 | /* |
159 | /* |
158 | * Almost the same as memcpy() except the stores are to userspace. |
160 | * Almost the same as memcpy() except the stores are to userspace. |
159 | */ |
161 | */ |
160 | .global memcpy_to_uspace |
162 | .global memcpy_to_uspace |
161 | memcpy_to_uspace: |
163 | memcpy_to_uspace: |
- | 164 | mov %o0, %o3 ! save dst |
|
162 | add %o1, 7, %g1 |
165 | add %o1, 7, %g1 |
163 | and %g1, -8, %g1 |
166 | and %g1, -8, %g1 |
164 | cmp %o1, %g1 |
167 | cmp %o1, %g1 |
165 | be,pn %xcc, 3f |
168 | be,pn %xcc, 3f |
166 | add %o0, 7, %g1 |
169 | add %o0, 7, %g1 |
167 | mov 0, %g3 |
170 | mov 0, %g3 |
168 | 0: |
171 | 0: |
169 | brz,pn %o2, 2f |
172 | brz,pn %o2, 2f |
170 | mov 0, %g2 |
173 | mov 0, %g2 |
171 | 1: |
174 | 1: |
172 | ldub [%g3 + %o1], %g1 |
175 | ldub [%g3 + %o1], %g1 |
173 | add %g2, 1, %g2 |
176 | add %g2, 1, %g2 |
174 | cmp %o2, %g2 |
177 | cmp %o2, %g2 |
175 | stba %g1, [%g3 + %o0] ASI_AIUS |
178 | stba %g1, [%g3 + %o0] ASI_AIUS |
176 | bne,pt %xcc, 1b |
179 | bne,pt %xcc, 1b |
177 | mov %g2, %g3 |
180 | mov %g2, %g3 |
178 | 2: |
181 | 2: |
179 | jmp %o7 + 8 ! exit point |
182 | jmp %o7 + 8 ! exit point |
180 | mov %o1, %o0 |
183 | mov %o3, %o0 |
181 | 3: |
184 | 3: |
182 | and %g1, -8, %g1 |
185 | and %g1, -8, %g1 |
183 | cmp %o0, %g1 |
186 | cmp %o0, %g1 |
184 | bne,pt %xcc, 0b |
187 | bne,pt %xcc, 0b |
185 | mov 0, %g3 |
188 | mov 0, %g3 |
186 | srlx %o2, 3, %g4 |
189 | srlx %o2, 3, %g4 |
187 | brz,pn %g4, 5f |
190 | brz,pn %g4, 5f |
188 | mov 0, %g5 |
191 | mov 0, %g5 |
189 | 4: |
192 | 4: |
190 | sllx %g3, 3, %g2 |
193 | sllx %g3, 3, %g2 |
191 | add %g5, 1, %g3 |
194 | add %g5, 1, %g3 |
192 | ldx [%o1 + %g2], %g1 |
195 | ldx [%o1 + %g2], %g1 |
193 | mov %g3, %g5 |
196 | mov %g3, %g5 |
194 | cmp %g4, %g3 |
197 | cmp %g4, %g3 |
195 | bne,pt %xcc, 4b |
198 | bne,pt %xcc, 4b |
196 | stxa %g1, [%o0 + %g2] ASI_AIUS |
199 | stxa %g1, [%o0 + %g2] ASI_AIUS |
197 | 5: |
200 | 5: |
198 | and %o2, 7, %o2 |
201 | and %o2, 7, %o2 |
199 | brz,pn %o2, 2b |
202 | brz,pn %o2, 2b |
200 | sllx %g4, 3, %g1 |
203 | sllx %g4, 3, %g1 |
201 | mov 0, %g2 |
204 | mov 0, %g2 |
202 | add %g1, %o0, %o0 |
205 | add %g1, %o0, %o0 |
203 | add %g1, %o1, %g4 |
206 | add %g1, %o1, %g4 |
204 | mov 0, %g3 |
207 | mov 0, %g3 |
205 | 6: |
208 | 6: |
206 | ldub [%g2 + %g4], %g1 |
209 | ldub [%g2 + %g4], %g1 |
207 | stba %g1, [%g2 + %o0] ASI_AIUS |
210 | stba %g1, [%g2 + %o0] ASI_AIUS |
208 | add %g3, 1, %g2 |
211 | add %g3, 1, %g2 |
209 | cmp %o2, %g2 |
212 | cmp %o2, %g2 |
210 | bne,pt %xcc, 6b |
213 | bne,pt %xcc, 6b |
211 | mov %g2, %g3 |
214 | mov %g2, %g3 |
212 | 215 | ||
213 | jmp %o7 + 8 ! exit point |
216 | jmp %o7 + 8 ! exit point |
214 | mov %o1, %o0 |
217 | mov %o3, %o0 |
215 | 218 | ||
216 | .global memcpy_from_uspace_failover_address |
219 | .global memcpy_from_uspace_failover_address |
217 | .global memcpy_to_uspace_failover_address |
220 | .global memcpy_to_uspace_failover_address |
218 | memcpy_from_uspace_failover_address: |
221 | memcpy_from_uspace_failover_address: |
219 | memcpy_to_uspace_failover_address: |
222 | memcpy_to_uspace_failover_address: |
220 | jmp %o7 + 8 ! exit point |
223 | jmp %o7 + 8 ! exit point |
221 | mov %g0, %o0 ! return 0 on failure |
224 | mov %g0, %o0 ! return 0 on failure |
222 | 225 | ||
223 | .global memsetb |
226 | .global memsetb |
224 | memsetb: |
227 | memsetb: |
225 | b _memsetb |
228 | b _memsetb |
226 | nop |
229 | nop |
227 | 230 | ||
228 | 231 | ||
229 | .macro WRITE_ALTERNATE_REGISTER reg, bit |
232 | .macro WRITE_ALTERNATE_REGISTER reg, bit |
230 | rdpr %pstate, %g1 ! save PSTATE.PEF |
233 | rdpr %pstate, %g1 ! save PSTATE.PEF |
231 | wrpr %g0, (\bit | PSTATE_PRIV_BIT), %pstate |
234 | wrpr %g0, (\bit | PSTATE_PRIV_BIT), %pstate |
232 | mov %o0, \reg |
235 | mov %o0, \reg |
233 | wrpr %g0, PSTATE_PRIV_BIT, %pstate |
236 | wrpr %g0, PSTATE_PRIV_BIT, %pstate |
234 | retl |
237 | retl |
235 | wrpr %g1, 0, %pstate ! restore PSTATE.PEF |
238 | wrpr %g1, 0, %pstate ! restore PSTATE.PEF |
236 | .endm |
239 | .endm |
237 | 240 | ||
238 | .macro READ_ALTERNATE_REGISTER reg, bit |
241 | .macro READ_ALTERNATE_REGISTER reg, bit |
239 | rdpr %pstate, %g1 ! save PSTATE.PEF |
242 | rdpr %pstate, %g1 ! save PSTATE.PEF |
240 | wrpr %g0, (\bit | PSTATE_PRIV_BIT), %pstate |
243 | wrpr %g0, (\bit | PSTATE_PRIV_BIT), %pstate |
241 | mov \reg, %o0 |
244 | mov \reg, %o0 |
242 | wrpr %g0, PSTATE_PRIV_BIT, %pstate |
245 | wrpr %g0, PSTATE_PRIV_BIT, %pstate |
243 | retl |
246 | retl |
244 | wrpr %g1, 0, %pstate ! restore PSTATE.PEF |
247 | wrpr %g1, 0, %pstate ! restore PSTATE.PEF |
245 | .endm |
248 | .endm |
246 | 249 | ||
247 | .global write_to_ag_g6 |
250 | .global write_to_ag_g6 |
248 | write_to_ag_g6: |
251 | write_to_ag_g6: |
249 | WRITE_ALTERNATE_REGISTER %g6, PSTATE_AG_BIT |
252 | WRITE_ALTERNATE_REGISTER %g6, PSTATE_AG_BIT |
250 | 253 | ||
251 | .global write_to_ag_g7 |
254 | .global write_to_ag_g7 |
252 | write_to_ag_g7: |
255 | write_to_ag_g7: |
253 | WRITE_ALTERNATE_REGISTER %g7, PSTATE_AG_BIT |
256 | WRITE_ALTERNATE_REGISTER %g7, PSTATE_AG_BIT |
254 | 257 | ||
255 | .global write_to_ig_g6 |
258 | .global write_to_ig_g6 |
256 | write_to_ig_g6: |
259 | write_to_ig_g6: |
257 | WRITE_ALTERNATE_REGISTER %g6, PSTATE_IG_BIT |
260 | WRITE_ALTERNATE_REGISTER %g6, PSTATE_IG_BIT |
258 | 261 | ||
259 | .global read_from_ag_g7 |
262 | .global read_from_ag_g7 |
260 | read_from_ag_g7: |
263 | read_from_ag_g7: |
261 | READ_ALTERNATE_REGISTER %g7, PSTATE_AG_BIT |
264 | READ_ALTERNATE_REGISTER %g7, PSTATE_AG_BIT |
262 | 265 | ||
263 | 266 | ||
264 | /** Switch to userspace. |
267 | /** Switch to userspace. |
265 | * |
268 | * |
266 | * %o0 Userspace entry address. |
269 | * %o0 Userspace entry address. |
267 | * %o1 Userspace stack pointer address. |
270 | * %o1 Userspace stack pointer address. |
268 | * %o2 Userspace address of uarg structure. |
271 | * %o2 Userspace address of uarg structure. |
269 | */ |
272 | */ |
270 | .global switch_to_userspace |
273 | .global switch_to_userspace |
271 | switch_to_userspace: |
274 | switch_to_userspace: |
272 | save %o1, -STACK_WINDOW_SAVE_AREA_SIZE, %sp |
275 | save %o1, -STACK_WINDOW_SAVE_AREA_SIZE, %sp |
273 | flushw |
276 | flushw |
274 | wrpr %g0, 0, %cleanwin ! avoid information leak |
277 | wrpr %g0, 0, %cleanwin ! avoid information leak |
275 | 278 | ||
276 | mov %i2, %o0 ! uarg |
279 | mov %i2, %o0 ! uarg |
- | 280 | xor %o1, %o1, %o1 ! %o1 is defined to hold pcb_ptr |
|
- | 281 | ! set it to 0 |
|
277 | 282 | ||
278 | clr %i2 |
283 | clr %i2 |
279 | clr %i3 |
284 | clr %i3 |
280 | clr %i4 |
285 | clr %i4 |
281 | clr %i5 |
286 | clr %i5 |
282 | clr %i6 |
287 | clr %i6 |
283 | 288 | ||
284 | wrpr %g0, 1, %tl ! enforce mapping via nucleus |
289 | wrpr %g0, 1, %tl ! enforce mapping via nucleus |
285 | 290 | ||
286 | rdpr %cwp, %g1 |
291 | rdpr %cwp, %g1 |
287 | wrpr %g1, TSTATE_IE_BIT, %tstate |
292 | wrpr %g1, TSTATE_IE_BIT, %tstate |
288 | wrpr %i0, 0, %tnpc |
293 | wrpr %i0, 0, %tnpc |
289 | 294 | ||
290 | /* |
295 | /* |
291 | * Set primary context according to secondary context. |
296 | * Set primary context according to secondary context. |
292 | * Secondary context has been already installed by |
297 | * Secondary context has been already installed by |
293 | * higher-level functions. |
298 | * higher-level functions. |
294 | */ |
299 | */ |
295 | wr %g0, ASI_DMMU, %asi |
300 | wr %g0, ASI_DMMU, %asi |
296 | ldxa [VA_SECONDARY_CONTEXT_REG] %asi, %g1 |
301 | ldxa [VA_SECONDARY_CONTEXT_REG] %asi, %g1 |
297 | stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi |
302 | stxa %g1, [VA_PRIMARY_CONTEXT_REG] %asi |
298 | flush %i7 |
303 | flush %i7 |
299 | 304 | ||
300 | /* |
305 | /* |
301 | * Spills and fills will be handled by the userspace handlers. |
306 | * Spills and fills will be handled by the userspace handlers. |
302 | */ |
307 | */ |
303 | wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(1), %wstate |
308 | wrpr %g0, WSTATE_OTHER(0) | WSTATE_NORMAL(1), %wstate |
304 | 309 | ||
305 | done ! jump to userspace |
310 | done ! jump to userspace |
306 | 311 | ||
307 | 312 |