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1 | /* |
1 | /* |
2 | * Copyright (c) 2005 Jakub Jermar |
2 | * Copyright (c) 2005 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup mips32mm |
29 | /** @addtogroup mips32mm |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <macros.h> |
35 | #include <macros.h> |
36 | #include <arch/mm/frame.h> |
36 | #include <arch/mm/frame.h> |
37 | #include <arch/mm/tlb.h> |
37 | #include <arch/mm/tlb.h> |
38 | #include <interrupt.h> |
38 | #include <interrupt.h> |
39 | #include <mm/frame.h> |
39 | #include <mm/frame.h> |
40 | #include <mm/asid.h> |
40 | #include <mm/asid.h> |
41 | #include <config.h> |
41 | #include <config.h> |
42 | #include <arch/drivers/msim.h> |
42 | #include <arch/drivers/msim.h> |
43 | #include <arch/drivers/serial.h> |
- | |
44 | #include <print.h> |
43 | #include <print.h> |
45 | 44 | ||
46 | #define ZERO_PAGE_MASK TLB_PAGE_MASK_256K |
45 | #define ZERO_PAGE_MASK TLB_PAGE_MASK_256K |
47 | #define ZERO_FRAMES 2048 |
46 | #define ZERO_FRAMES 2048 |
48 | #define ZERO_PAGE_WIDTH 18 /* 256K */ |
47 | #define ZERO_PAGE_WIDTH 18 /* 256K */ |
49 | #define ZERO_PAGE_SIZE (1 << ZERO_PAGE_WIDTH) |
48 | #define ZERO_PAGE_SIZE (1 << ZERO_PAGE_WIDTH) |
50 | #define ZERO_PAGE_ASID ASID_INVALID |
49 | #define ZERO_PAGE_ASID ASID_INVALID |
51 | #define ZERO_PAGE_TLBI 0 |
50 | #define ZERO_PAGE_TLBI 0 |
52 | #define ZERO_PAGE_ADDR 0 |
51 | #define ZERO_PAGE_ADDR 0 |
53 | #define ZERO_PAGE_OFFSET (ZERO_PAGE_SIZE / sizeof(uint32_t) - 1) |
52 | #define ZERO_PAGE_OFFSET (ZERO_PAGE_SIZE / sizeof(uint32_t) - 1) |
54 | #define ZERO_PAGE_VALUE (((volatile uint32_t *) ZERO_PAGE_ADDR)[ZERO_PAGE_OFFSET]) |
53 | #define ZERO_PAGE_VALUE (((volatile uint32_t *) ZERO_PAGE_ADDR)[ZERO_PAGE_OFFSET]) |
55 | 54 | ||
- | 55 | #define ZERO_PAGE_VALUE_KSEG1(frame) \ |
|
56 | #define ZERO_PAGE_VALUE_KSEG1(frame) (((volatile uint32_t *) (0xa0000000 + (frame << ZERO_PAGE_WIDTH)))[ZERO_PAGE_OFFSET]) |
56 | (((volatile uint32_t *) (0xa0000000 + (frame << ZERO_PAGE_WIDTH)))[ZERO_PAGE_OFFSET]) |
57 | 57 | ||
58 | #define MAX_REGIONS 32 |
58 | #define MAX_REGIONS 32 |
59 | 59 | ||
60 | typedef struct { |
60 | typedef struct { |
61 | pfn_t start; |
61 | pfn_t start; |
62 | pfn_t count; |
62 | pfn_t count; |
63 | } phys_region_t; |
63 | } phys_region_t; |
64 | 64 | ||
65 | static count_t phys_regions_count = 0; |
65 | static count_t phys_regions_count = 0; |
66 | static phys_region_t phys_regions[MAX_REGIONS]; |
66 | static phys_region_t phys_regions[MAX_REGIONS]; |
67 | 67 | ||
68 | - | ||
69 | /** Check whether frame is available |
68 | /** Check whether frame is available |
70 | * |
69 | * |
71 | * Returns true if given frame is generally available for use. |
70 | * Returns true if given frame is generally available for use. |
72 | * Returns false if given frame is used for physical memory |
71 | * Returns false if given frame is used for physical memory |
73 | * mapped devices and cannot be used. |
72 | * mapped devices and cannot be used. |
74 | * |
73 | * |
75 | */ |
74 | */ |
76 | static bool frame_available(pfn_t frame) |
75 | static bool frame_available(pfn_t frame) |
77 | { |
76 | { |
78 | #ifdef MACHINE_msim |
77 | #ifdef MACHINE_msim |
79 | /* MSIM device (dprinter) */ |
78 | /* MSIM device (dprinter) */ |
80 | if (frame == (KA2PA(MSIM_VIDEORAM) >> ZERO_PAGE_WIDTH)) |
79 | if (frame == (KA2PA(MSIM_VIDEORAM) >> ZERO_PAGE_WIDTH)) |
81 | return false; |
80 | return false; |
82 | 81 | ||
83 | /* MSIM device (dkeyboard) */ |
82 | /* MSIM device (dkeyboard) */ |
84 | if (frame == (KA2PA(MSIM_KBD_ADDRESS) >> ZERO_PAGE_WIDTH)) |
83 | if (frame == (KA2PA(MSIM_KBD_ADDRESS) >> ZERO_PAGE_WIDTH)) |
85 | return false; |
84 | return false; |
86 | #endif |
85 | #endif |
87 | 86 | ||
88 | #ifdef MACHINE_simics |
- | |
89 | /* Simics device (serial line) */ |
- | |
90 | if (frame == (KA2PA(SERIAL_ADDRESS) >> ZERO_PAGE_WIDTH)) |
- | |
91 | return false; |
- | |
92 | #endif |
- | |
93 | - | ||
94 | #if defined(MACHINE_lgxemul) || defined(MACHINE_bgxemul) |
87 | #if defined(MACHINE_lgxemul) || defined(MACHINE_bgxemul) |
95 | /* gxemul devices */ |
88 | /* gxemul devices */ |
96 | if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE, |
89 | if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE, |
97 | 0x10000000, MB2SIZE(256))) |
90 | 0x10000000, MB2SIZE(256))) |
98 | return false; |
91 | return false; |
99 | #endif |
92 | #endif |
100 | 93 | ||
101 | return true; |
94 | return true; |
102 | } |
95 | } |
103 | 96 | ||
104 | 97 | ||
105 | /** Check whether frame is safe to write |
98 | /** Check whether frame is safe to write |
106 | * |
99 | * |
107 | * Returns true if given frame is safe for read/write test. |
100 | * Returns true if given frame is safe for read/write test. |
108 | * Returns false if given frame should not be touched. |
101 | * Returns false if given frame should not be touched. |
109 | * |
102 | * |
110 | */ |
103 | */ |
111 | static bool frame_safe(pfn_t frame) |
104 | static bool frame_safe(pfn_t frame) |
112 | { |
105 | { |
113 | /* Kernel structures */ |
106 | /* Kernel structures */ |
114 | if ((frame << ZERO_PAGE_WIDTH) < KA2PA(config.base)) |
107 | if ((frame << ZERO_PAGE_WIDTH) < KA2PA(config.base)) |
115 | return false; |
108 | return false; |
116 | 109 | ||
117 | /* Kernel */ |
110 | /* Kernel */ |
118 | if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE, |
111 | if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE, |
119 | KA2PA(config.base), config.kernel_size)) |
112 | KA2PA(config.base), config.kernel_size)) |
120 | return false; |
113 | return false; |
121 | 114 | ||
122 | /* Kernel stack */ |
115 | /* Kernel stack */ |
123 | if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE, |
116 | if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE, |
124 | KA2PA(config.stack_base), config.stack_size)) |
117 | KA2PA(config.stack_base), config.stack_size)) |
125 | return false; |
118 | return false; |
126 | 119 | ||
127 | /* Init tasks */ |
120 | /* Init tasks */ |
128 | bool safe = true; |
121 | bool safe = true; |
129 | count_t i; |
122 | count_t i; |
130 | for (i = 0; i < init.cnt; i++) |
123 | for (i = 0; i < init.cnt; i++) |
131 | if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE, |
124 | if (overlaps(frame << ZERO_PAGE_WIDTH, ZERO_PAGE_SIZE, |
132 | KA2PA(init.tasks[i].addr), init.tasks[i].size)) { |
125 | KA2PA(init.tasks[i].addr), init.tasks[i].size)) { |
133 | safe = false; |
126 | safe = false; |
134 | break; |
127 | break; |
135 | } |
128 | } |
136 | 129 | ||
137 | return safe; |
130 | return safe; |
138 | } |
131 | } |
139 | 132 | ||
140 | static void frame_add_region(pfn_t start_frame, pfn_t end_frame) |
133 | static void frame_add_region(pfn_t start_frame, pfn_t end_frame) |
141 | { |
134 | { |
142 | if (end_frame > start_frame) { |
135 | if (end_frame > start_frame) { |
143 | /* Convert 1M frames to 16K frames */ |
136 | /* Convert 1M frames to 16K frames */ |
144 | pfn_t first = ADDR2PFN(start_frame << ZERO_PAGE_WIDTH); |
137 | pfn_t first = ADDR2PFN(start_frame << ZERO_PAGE_WIDTH); |
145 | pfn_t count = ADDR2PFN((end_frame - start_frame) << ZERO_PAGE_WIDTH); |
138 | pfn_t count = ADDR2PFN((end_frame - start_frame) << ZERO_PAGE_WIDTH); |
146 | 139 | ||
147 | /* Interrupt vector frame is blacklisted */ |
140 | /* Interrupt vector frame is blacklisted */ |
148 | pfn_t conf_frame; |
141 | pfn_t conf_frame; |
149 | if (first == 0) |
142 | if (first == 0) |
150 | conf_frame = 1; |
143 | conf_frame = 1; |
151 | else |
144 | else |
152 | conf_frame = first; |
145 | conf_frame = first; |
153 | 146 | ||
154 | zone_create(first, count, conf_frame, 0); |
147 | zone_create(first, count, conf_frame, 0); |
155 | 148 | ||
156 | if (phys_regions_count < MAX_REGIONS) { |
149 | if (phys_regions_count < MAX_REGIONS) { |
157 | phys_regions[phys_regions_count].start = first; |
150 | phys_regions[phys_regions_count].start = first; |
158 | phys_regions[phys_regions_count].count = count; |
151 | phys_regions[phys_regions_count].count = count; |
159 | phys_regions_count++; |
152 | phys_regions_count++; |
160 | } |
153 | } |
161 | } |
154 | } |
162 | } |
155 | } |
163 | 156 | ||
164 | 157 | ||
165 | /** Create memory zones |
158 | /** Create memory zones |
166 | * |
159 | * |
167 | * Walk through available 256 KB chunks of physical |
160 | * Walk through available 256 KB chunks of physical |
168 | * memory and create zones. |
161 | * memory and create zones. |
169 | * |
162 | * |
170 | * Note: It is assumed that the TLB is not yet being |
163 | * Note: It is assumed that the TLB is not yet being |
171 | * used in any way, thus there is no interference. |
164 | * used in any way, thus there is no interference. |
172 | * |
165 | * |
173 | */ |
166 | */ |
174 | void frame_arch_init(void) |
167 | void frame_arch_init(void) |
175 | { |
168 | { |
176 | ipl_t ipl = interrupts_disable(); |
169 | ipl_t ipl = interrupts_disable(); |
177 | 170 | ||
178 | /* Clear and initialize TLB */ |
171 | /* Clear and initialize TLB */ |
179 | cp0_pagemask_write(ZERO_PAGE_MASK); |
172 | cp0_pagemask_write(ZERO_PAGE_MASK); |
180 | cp0_entry_lo0_write(0); |
173 | cp0_entry_lo0_write(0); |
181 | cp0_entry_lo1_write(0); |
174 | cp0_entry_lo1_write(0); |
182 | cp0_entry_hi_write(0); |
175 | cp0_entry_hi_write(0); |
183 | 176 | ||
184 | count_t i; |
177 | count_t i; |
185 | for (i = 0; i < TLB_ENTRY_COUNT; i++) { |
178 | for (i = 0; i < TLB_ENTRY_COUNT; i++) { |
186 | cp0_index_write(i); |
179 | cp0_index_write(i); |
187 | tlbwi(); |
180 | tlbwi(); |
188 | } |
181 | } |
189 | 182 | ||
190 | pfn_t start_frame = 0; |
183 | pfn_t start_frame = 0; |
191 | pfn_t frame; |
184 | pfn_t frame; |
192 | bool avail = true; |
185 | bool avail = true; |
193 | 186 | ||
194 | /* Walk through all 1 MB frames */ |
187 | /* Walk through all 1 MB frames */ |
195 | for (frame = 0; frame < ZERO_FRAMES; frame++) { |
188 | for (frame = 0; frame < ZERO_FRAMES; frame++) { |
196 | if (!frame_available(frame)) |
189 | if (!frame_available(frame)) |
197 | avail = false; |
190 | avail = false; |
198 | else { |
191 | else { |
199 | if (frame_safe(frame)) { |
192 | if (frame_safe(frame)) { |
200 | entry_lo_t lo0; |
193 | entry_lo_t lo0; |
201 | entry_lo_t lo1; |
194 | entry_lo_t lo1; |
202 | entry_hi_t hi; |
195 | entry_hi_t hi; |
203 | tlb_prepare_entry_lo(&lo0, false, true, true, false, frame << (ZERO_PAGE_WIDTH - 12)); |
196 | tlb_prepare_entry_lo(&lo0, false, true, true, false, frame << (ZERO_PAGE_WIDTH - 12)); |
204 | tlb_prepare_entry_lo(&lo1, false, false, false, false, 0); |
197 | tlb_prepare_entry_lo(&lo1, false, false, false, false, 0); |
205 | tlb_prepare_entry_hi(&hi, ZERO_PAGE_ASID, ZERO_PAGE_ADDR); |
198 | tlb_prepare_entry_hi(&hi, ZERO_PAGE_ASID, ZERO_PAGE_ADDR); |
206 | 199 | ||
207 | cp0_pagemask_write(ZERO_PAGE_MASK); |
200 | cp0_pagemask_write(ZERO_PAGE_MASK); |
208 | cp0_entry_lo0_write(lo0.value); |
201 | cp0_entry_lo0_write(lo0.value); |
209 | cp0_entry_lo1_write(lo1.value); |
202 | cp0_entry_lo1_write(lo1.value); |
210 | cp0_entry_hi_write(hi.value); |
203 | cp0_entry_hi_write(hi.value); |
211 | cp0_index_write(ZERO_PAGE_TLBI); |
204 | cp0_index_write(ZERO_PAGE_TLBI); |
212 | tlbwi(); |
205 | tlbwi(); |
213 | 206 | ||
214 | ZERO_PAGE_VALUE = 0; |
207 | ZERO_PAGE_VALUE = 0; |
215 | if (ZERO_PAGE_VALUE != 0) |
208 | if (ZERO_PAGE_VALUE != 0) |
216 | avail = false; |
209 | avail = false; |
217 | else { |
210 | else { |
218 | ZERO_PAGE_VALUE = 0xdeadbeef; |
211 | ZERO_PAGE_VALUE = 0xdeadbeef; |
219 | if (ZERO_PAGE_VALUE != 0xdeadbeef) |
212 | if (ZERO_PAGE_VALUE != 0xdeadbeef) |
220 | avail = false; |
213 | avail = false; |
221 | #if defined(MACHINE_lgxemul) || defined(MACHINE_bgxemul) |
214 | #if defined(MACHINE_lgxemul) || defined(MACHINE_bgxemul) |
222 | else { |
215 | else { |
223 | ZERO_PAGE_VALUE_KSEG1(frame) = 0xaabbccdd; |
216 | ZERO_PAGE_VALUE_KSEG1(frame) = 0xaabbccdd; |
224 | if (ZERO_PAGE_VALUE_KSEG1(frame) != 0xaabbccdd) |
217 | if (ZERO_PAGE_VALUE_KSEG1(frame) != 0xaabbccdd) |
225 | avail = false; |
218 | avail = false; |
226 | } |
219 | } |
227 | #endif |
220 | #endif |
228 | } |
221 | } |
229 | } |
222 | } |
230 | } |
223 | } |
231 | 224 | ||
232 | if (!avail) { |
225 | if (!avail) { |
233 | frame_add_region(start_frame, frame); |
226 | frame_add_region(start_frame, frame); |
234 | start_frame = frame + 1; |
227 | start_frame = frame + 1; |
235 | avail = true; |
228 | avail = true; |
236 | } |
229 | } |
237 | } |
230 | } |
238 | 231 | ||
239 | frame_add_region(start_frame, frame); |
232 | frame_add_region(start_frame, frame); |
240 | 233 | ||
241 | /* Blacklist interrupt vector frame */ |
234 | /* Blacklist interrupt vector frame */ |
242 | frame_mark_unavailable(0, 1); |
235 | frame_mark_unavailable(0, 1); |
243 | 236 | ||
244 | /* Cleanup */ |
237 | /* Cleanup */ |
245 | cp0_pagemask_write(ZERO_PAGE_MASK); |
238 | cp0_pagemask_write(ZERO_PAGE_MASK); |
246 | cp0_entry_lo0_write(0); |
239 | cp0_entry_lo0_write(0); |
247 | cp0_entry_lo1_write(0); |
240 | cp0_entry_lo1_write(0); |
248 | cp0_entry_hi_write(0); |
241 | cp0_entry_hi_write(0); |
249 | cp0_index_write(ZERO_PAGE_TLBI); |
242 | cp0_index_write(ZERO_PAGE_TLBI); |
250 | tlbwi(); |
243 | tlbwi(); |
251 | 244 | ||
252 | interrupts_restore(ipl); |
245 | interrupts_restore(ipl); |
253 | } |
246 | } |
254 | 247 | ||
255 | 248 | ||
256 | void physmem_print(void) |
249 | void physmem_print(void) |
257 | { |
250 | { |
258 | printf("Base Size\n"); |
251 | printf("Base Size\n"); |
259 | printf("---------- ----------\n"); |
252 | printf("---------- ----------\n"); |
260 | 253 | ||
261 | count_t i; |
254 | count_t i; |
262 | for (i = 0; i < phys_regions_count; i++) { |
255 | for (i = 0; i < phys_regions_count; i++) { |
263 | printf("%#010x %10u\n", |
256 | printf("%#010x %10u\n", |
264 | PFN2ADDR(phys_regions[i].start), PFN2ADDR(phys_regions[i].count)); |
257 | PFN2ADDR(phys_regions[i].start), PFN2ADDR(phys_regions[i].count)); |
265 | } |
258 | } |
266 | } |
259 | } |
267 | 260 | ||
268 | /** @} |
261 | /** @} |
269 | */ |
262 | */ |
270 | 263 |