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1 | /* |
1 | /* |
2 | * Copyright (c) 2007 Petr Stepan, Pavel Jancik |
2 | * Copyright (c) 2007 Petr Stepan, Pavel Jancik |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup arm32 |
29 | /** @addtogroup arm32 |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | * @brief Userspace. |
33 | * @brief Userspace. |
34 | */ |
34 | */ |
35 | 35 | ||
36 | #include <userspace.h> |
36 | #include <userspace.h> |
37 | 37 | ||
38 | /** Struct to hold general purpose register values */ |
38 | /** Struct to hold general purpose register values */ |
39 | typedef struct { |
39 | typedef struct { |
40 | uint32_t r0; |
40 | uint32_t r0; |
41 | uint32_t r1; |
41 | uint32_t r1; |
42 | uint32_t r2; |
42 | uint32_t r2; |
43 | uint32_t r3; |
43 | uint32_t r3; |
44 | uint32_t r4; |
44 | uint32_t r4; |
45 | uint32_t r5; |
45 | uint32_t r5; |
46 | uint32_t r6; |
46 | uint32_t r6; |
47 | uint32_t r7; |
47 | uint32_t r7; |
48 | uint32_t r8; |
48 | uint32_t r8; |
49 | uint32_t r9; |
49 | uint32_t r9; |
50 | uint32_t r10; |
50 | uint32_t r10; |
51 | uint32_t r11; |
51 | uint32_t r11; |
52 | uint32_t r12; |
52 | uint32_t r12; |
53 | uint32_t sp; |
53 | uint32_t sp; |
54 | uint32_t lr; |
54 | uint32_t lr; |
55 | uint32_t pc; |
55 | uint32_t pc; |
56 | } ustate_t; |
56 | } ustate_t; |
57 | 57 | ||
- | 58 | ||
58 | /** Changes processor mode and jumps to the address specified in the first parameter. |
59 | /** Changes processor mode and jumps to the address specified in the first parameter. |
59 | * |
60 | * |
60 | * @param kernel_uarg Userspace settings (entry point, stack, ...). |
61 | * @param kernel_uarg Userspace settings (entry point, stack, ...). |
61 | */ |
62 | */ |
62 | void userspace(uspace_arg_t *kernel_uarg) |
63 | void userspace(uspace_arg_t *kernel_uarg) |
63 | { |
64 | { |
64 | 65 | ||
65 | volatile ustate_t ustate; |
66 | volatile ustate_t ustate; |
66 | 67 | ||
67 | // set first parameter |
68 | // set first parameter |
68 | ustate.r0 = (uintptr_t) kernel_uarg->uspace_uarg; |
69 | ustate.r0 = (uintptr_t) kernel_uarg->uspace_uarg; |
69 | 70 | ||
70 | // clear other registers |
71 | // clear other registers |
71 | ustate.r1 = ustate.r2 = ustate.r3 = ustate.r4 = |
72 | ustate.r1 = ustate.r2 = ustate.r3 = ustate.r4 = |
72 | ustate.r5 = ustate.r6 = ustate.r7 = ustate.r8 = |
73 | ustate.r5 = ustate.r6 = ustate.r7 = ustate.r8 = |
73 | ustate.r9 = ustate.r10 = ustate.r11 = ustate.r12 = |
74 | ustate.r9 = ustate.r10 = ustate.r11 = ustate.r12 = |
74 | ustate.lr = 0; |
75 | ustate.lr = 0; |
75 | 76 | ||
76 | //set user stack |
77 | //set user stack |
77 | ustate.sp = ((uint32_t)kernel_uarg->uspace_stack) + |
78 | ustate.sp = ((uint32_t)kernel_uarg->uspace_stack) + |
78 | PAGE_SIZE - sizeof(void*); |
79 | PAGE_SIZE - sizeof(void*); |
79 | 80 | ||
80 | //set where uspace execution starts |
81 | //set where uspace execution starts |
81 | ustate.pc = (uintptr_t) kernel_uarg->uspace_entry; |
82 | ustate.pc = (uintptr_t) kernel_uarg->uspace_entry; |
82 | 83 | ||
83 | //status register in user mode |
84 | //status register in user mode |
84 | ipl_t cpsr = current_status_reg_read(); |
85 | ipl_t cpsr = current_status_reg_read(); |
85 | cpsr &= ~STATUS_REG_MODE_MASK | USER_MODE; |
86 | cpsr &= ~STATUS_REG_MODE_MASK | USER_MODE; |
86 | 87 | ||
87 | ipl_t tmpsr = (cpsr & ~STATUS_REG_MODE_MASK) | SUPERVISOR_MODE; |
88 | ipl_t tmpsr = (cpsr & ~STATUS_REG_MODE_MASK) | SUPERVISOR_MODE; |
88 | 89 | ||
89 | asm __volatile__ ( |
90 | asm __volatile__ ( |
90 | // save pointer into ustate struct |
91 | // save pointer into ustate struct |
91 | "mov r0, %0 \n" |
92 | "mov r0, %0 \n" |
92 | // save cspr |
93 | // save cspr |
93 | "mov r1, %1 \n" |
94 | "mov r1, %1 \n" |
94 | // change mode into any exception mode |
95 | // change mode into any exception mode |
95 | "msr cpsr_c, %2 \n" |
96 | "msr cpsr_c, %2 \n" |
96 | // set saved cpsr |
97 | // set saved cpsr |
97 | "msr spsr_c, r1 \n" |
98 | "msr spsr_c, r1 \n" |
98 | 99 | ||
99 | "mov sp, r0 \n" |
100 | "mov sp, r0 \n" |
100 | // replace almost all registers |
101 | // replace almost all registers |
101 | "ldmfd sp!, {r0-r12, sp, lr}^\n" |
102 | "ldmfd sp!, {r0-r12, sp, lr}^\n" |
102 | //jump to the usermode |
103 | //jump to the usermode |
103 | "ldmfd sp!, {pc}^" |
104 | "ldmfd sp!, {pc}^" |
104 | : // no output |
105 | : // no output |
105 | : "r"(&ustate), "r"(cpsr), "r"(tmpsr) // |
106 | : "r"(&ustate), "r"(cpsr), "r"(tmpsr) // |
106 | : "r0","r1" |
107 | : "r0","r1" |
107 | ); |
108 | ); |
108 | 109 | ||
109 | // unreachable |
110 | // unreachable |
110 | while(1) ; |
111 | while(1) ; |
111 | } |
112 | } |
112 | 113 | ||
113 | 114 | ||
114 | /** @} |
115 | /** @} |
115 | */ |
116 | */ |
116 | 117 |