WebSVN – HelenOS – Diff – /branches/arm/kernel/arch/arm32/src/mm/tlb.c


/*
 * Copyright (c) 2007 Michal Kebrt
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup arm32mm
 * @{
 */
/** @file
 *  @brief TLB related functions.
 */
 
#include <mm/tlb.h>
#include <arch/mm/asid.h>
#include <arch/asm.h>
#include <arch/types.h>
#include <arch/mm/page.h>
 
/** Invalidate all entries in TLB.
 *
 * @note See ARM Architecture reference section 3.7.7 for details.
 */
void tlb_invalidate_all(void)
{
    asm volatile (
        "eor r1, r1\n"
        "mcr p15, 0, r1, c8, c7, 0\n"
 
        ::: "r1"
    );
}
 
 
/** Invalidate all entries in TLB that belong to specified address space.
 *
 * @param asid Ignored as the ARM architecture doesn't support ASIDs.
 */
void tlb_invalidate_asid(asid_t asid)
{
    tlb_invalidate_all();
}
 
 
/** Invalidate single entry in TLB
 *
 * @param page Virtual adress of the page
 */
static inline void invalidate_page(uintptr_t page)
{
    asm volatile (
        "mcr p15, 0, %0, c8, c7, 1"
       
        :
        : "r"(page)
    );
}
 
 
/** Invalidate TLB entries for specified page range belonging to specified address space.
 *
 * @param asid Ignored as the ARM architecture doesn't support it.
 * @param page Address of the first page whose entry is to be invalidated.
 * @param cnt Number of entries to invalidate.
 */
void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
{
    unsigned int i;
 
    for (i = 0; i < cnt; i++)
        invalidate_page(page + i * PAGE_SIZE);
}
 
/** @}
 */
 

Rev 2411	Rev 2415
1	/*	1	/*
2	* Copyright (c) 2007 Michal Kebrt	2	* Copyright (c) 2007 Michal Kebrt
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup arm32mm	29	/** @addtogroup arm32mm
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	* @brief TLB related functions.	33	* @brief TLB related functions.
34	*/	34	*/
35		35
36	#include <mm/tlb.h>	36	#include <mm/tlb.h>
37	#include <arch/mm/asid.h>	37	#include <arch/mm/asid.h>
38	#include <arch/asm.h>	38	#include <arch/asm.h>
39	#include <arch/types.h>	39	#include <arch/types.h>
40	#include <arch/mm/page.h>	40	#include <arch/mm/page.h>
41		41
42	/** Invalidate all entries in TLB. */	42	/** Invalidate all entries in TLB.
-		43	*
-		44	* @note See ARM Architecture reference section 3.7.7 for details.
-		45	*/
43	void tlb_invalidate_all(void)	46	void tlb_invalidate_all(void)
44	{	47	{
45	asm volatile (	48	asm volatile (
46	"eor r1, r1\n"	49	"eor r1, r1\n"
47	"MCR p15, 0, r1, c8, c7, 0\n" // see ARM Architecture reference relE 3.7.7 p.528	50	"mcr p15, 0, r1, c8, c7, 0\n"
48		-
49	::: "r1"	51	::: "r1"
50	);	52	);
51	}	53	}
52		54
53		55
54	/** Invalidate all entries in TLB that belong to specified address space.	56	/** Invalidate all entries in TLB that belong to specified address space.
55	*	57	*
56	* @param asid This parameter is ignored as the ARM architecture doesn't support it.	58	* @param asid Ignored as the ARM architecture doesn't support ASIDs.
57	*/	59	*/
58	void tlb_invalidate_asid(asid_t asid)	60	void tlb_invalidate_asid(asid_t asid)
59	{	61	{
60	tlb_invalidate_all();	62	tlb_invalidate_all();
61	}	63	}
62		64
63		65
64	/** Invalidate single entry in TLB	66	/** Invalidate single entry in TLB
65	*	67	*
66	* @param page Virtual adress of the page	68	* @param page Virtual adress of the page
67	*/	69	*/
68	static inline void invalidate_page(uintptr_t page)	70	static inline void invalidate_page(uintptr_t page)
69	{	71	{
70	asm volatile (	72	asm volatile (
71	"MCR p15, 0, %0, c8, c7, 1"	73	"mcr p15, 0, %0, c8, c7, 1"
72		74
73	: /* no output */	75	:
74	: "r"(page) /* input */	76	: "r"(page)
75	);	77	);
76	}	78	}
77		79
78		80
79	/** Invalidate TLB entries for specified page range belonging to specified address space.	81	/** Invalidate TLB entries for specified page range belonging to specified address space.
80	*	82	*
81	* @param asid This parameter is ignored as the ARM architecture doesn't support it.	83	* @param asid Ignored as the ARM architecture doesn't support it.
82	* @param page Address of the first page whose entry is to be invalidated.	84	* @param page Address of the first page whose entry is to be invalidated.
83	* @param cnt Number of entries to invalidate.	85	* @param cnt Number of entries to invalidate.
84	*/	86	*/
85	void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)	87	void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt)
86	{	88	{
87	unsigned int i;	89	unsigned int i;
88		90
89	for (i = 0; i < cnt; i++)	91	for (i = 0; i < cnt; i++)
90	invalidate_page(page + i * PAGE_SIZE);	92	invalidate_page(page + i * PAGE_SIZE);
91	}	93	}
92		94
93	/** @}	95	/** @}
94	*/	96	*/
95		97

Subversion Repositories HelenOS

(root)/branches/arm/kernel/arch/arm32/src/mm/tlb.c – Rev 2411 → 2415