WebSVN – HelenOS – Diff – /branches/arm/kernel/arch/arm32/src/drivers/gxemul.c


/*
 * Copyright (c) 2007 Michal Kebrt, Petr Stepan
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup arm32
 * @{
 */
/** @file
 */
 
#include <interrupt.h>
#include <ipc/irq.h>
#include <console/chardev.h>
#include <arch/drivers/gxemul.h>
#include <console/console.h>
#include <sysinfo/sysinfo.h>
#include <print.h>
#include <ddi/device.h>
#include <mm/page.h>
 
/** Address of devices. */
#define GXEMUL_VIDEORAM            0x10000000
#define GXEMUL_KBD                 0x10000000
#define GXEMUL_RTC                 0x15000000
#define GXEMUL_RTC_FREQ_OFFSET     0x100
#define GXEMUL_RTC_ACK_OFFSET      0x110
#define GXEMUL_IRQC                0x16000000
#define GXEMUL_IRQC_MASK_OFFSET    0x4
#define GXEMUL_IRQC_UNMASK_OFFSET  0x8
#define GXEMUL_MP                  0x11000000
#define GXEMUL_MP_MEMSIZE_OFFSET   0x0090
 
 
/** IRQs */
#define GXEMUL_KBD_IRQ      2
#define GXEMUL_TIMER_IRQ    4
 
static gxemul_hw_map_t gxemul_hw_map;
static chardev_t console;
static irq_t gxemul_irq;
static irq_t gxemul_timer_irq;
 
static void gxemul_write(chardev_t *dev, const char ch);
static void gxemul_enable(chardev_t *dev);
static void gxemul_disable(chardev_t *dev);
static char gxemul_do_read(chardev_t *dev);
 
static chardev_operations_t gxemul_ops = {
    .resume = gxemul_enable,
    .suspend = gxemul_disable,
    .write = gxemul_write,
    .read = gxemul_do_read,
};
 
 
/** Initializes #gxemul_hw_map. */
void gxemul_hw_map_init(void)
{
    gxemul_hw_map.videoram = hw_map(GXEMUL_VIDEORAM, PAGE_SIZE);
    gxemul_hw_map.kbd = hw_map(GXEMUL_KBD, PAGE_SIZE);
    gxemul_hw_map.rtc = hw_map(GXEMUL_RTC, PAGE_SIZE);
    gxemul_hw_map.irqc = hw_map(GXEMUL_IRQC, PAGE_SIZE);
 
    gxemul_hw_map.rtc_freq = gxemul_hw_map.rtc + GXEMUL_RTC_FREQ_OFFSET;
    gxemul_hw_map.rtc_ack = gxemul_hw_map.rtc + GXEMUL_RTC_ACK_OFFSET;
    gxemul_hw_map.irqc_mask = gxemul_hw_map.irqc + GXEMUL_IRQC_MASK_OFFSET;
    gxemul_hw_map.irqc_unmask = gxemul_hw_map.irqc + GXEMUL_IRQC_UNMASK_OFFSET;
 
}
 
/** Putchar that works with gxemul */
void gxemul_write(chardev_t *dev, const char ch)
{
    *((char *) gxemul_hw_map.videoram) = ch;
}
 
/* Called from getc(). */
void gxemul_enable(chardev_t *dev)
{
//  cp0_unmask_int(GXEMUL_KBD_IRQ);
    gxemul_irqc_unmask(GXEMUL_KBD_IRQ);
}
 
/* Called from getc(). */
void gxemul_disable(chardev_t *dev)
{
//  cp0_mask_int(GXEMUL_KBD_IRQ);
    gxemul_irqc_mask(GXEMUL_KBD_IRQ);
}
 
/** Read character using polling, assume interrupts disabled */
static char gxemul_do_read(chardev_t *dev)
{
    char ch;
 
    while (1) {
        ch = *((volatile char *) gxemul_hw_map.kbd);
        if (ch) {
            if (ch == '\r')
                return '\n';
            if (ch == 0x7f)
                return '\b';
            return ch;
        }
    }
}
 
/** Process keyboard interrupt. */
static void gxemul_irq_handler(irq_t *irq, void *arg, ...)
{
    if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox))
        ipc_irq_send_notif(irq);
    else {
        char ch = 0;
       
            ch = *((char *) gxemul_hw_map.kbd);
            if (ch =='\r')
                ch = '\n';
            if (ch == 0x7f)
                ch = '\b';
            //chardev_push_character(&console, ch);
            printf("%c", ch);
    }
}
 
static irq_ownership_t gxemul_claim(void)
{
    return IRQ_ACCEPT;
}
 
void gxemul_kbd_grab(void)
{
    ipl_t ipl = interrupts_disable();
    spinlock_lock(&gxemul_irq.lock);
    gxemul_irq.notif_cfg.notify = false;
    spinlock_unlock(&gxemul_irq.lock);
    interrupts_restore(ipl);
}
 
void gxemul_kbd_release(void)
{
    ipl_t ipl = interrupts_disable();
    spinlock_lock(&gxemul_irq.lock);
    if (gxemul_irq.notif_cfg.answerbox)
        gxemul_irq.notif_cfg.notify = true;
    spinlock_unlock(&gxemul_irq.lock);
    interrupts_restore(ipl);
}
 
 
/** Return console object representing gxemul console */
void gxemul_console(devno_t devno)
{
    chardev_initialize("gxemul_console", &console, &gxemul_ops);
    stdin = &console;
    stdout = &console;
   
    irq_initialize(&gxemul_irq);
    gxemul_irq.devno = devno;
    gxemul_irq.inr = GXEMUL_KBD_IRQ;
    gxemul_irq.claim = gxemul_claim;
    gxemul_irq.handler = gxemul_irq_handler;
    irq_register(&gxemul_irq);
   
//  cp0_unmask_int(GXEMUL_KBD_IRQ);
    gxemul_irqc_unmask(GXEMUL_KBD_IRQ);
   
    sysinfo_set_item_val("kbd", NULL, true);
    sysinfo_set_item_val("kbd.devno", NULL, devno);
    sysinfo_set_item_val("kbd.inr", NULL, GXEMUL_KBD_IRQ);
    sysinfo_set_item_val("kbd.address.virtual", NULL, gxemul_hw_map.kbd);
}
 
/** Return the mask of active interrupts. */
inline uint32_t gxemul_irqc_get_sources(void)
{
    return *(uint32_t*) gxemul_hw_map.irqc;
}
 
/** Masks interrupt.
 *
 * @param irq interrupt number
 */
inline void gxemul_irqc_mask(uint32_t irq)
{
    *(uint32_t*) gxemul_hw_map.irqc_mask = irq;
}
 
/** Unmasks interrupt.
 *
 * @param irq interrupt number
 */
inline void gxemul_irqc_unmask(uint32_t irq)
{
    *(uint32_t*) gxemul_hw_map.irqc_unmask = irq;
}
 
 
/** Starts gxemul Real Time Clock device, which asserts regular interrupts.
 *
 * @param frequency interrupts frequency (0 disables RTC)
 */
void gxemul_timer_start(uint32_t frequency)
{
    *(uint32_t*) gxemul_hw_map.rtc_freq = frequency;
}
 
static irq_ownership_t gxemul_timer_claim(void)
{
    return IRQ_ACCEPT;
}
 
static void gxemul_timer_irq_handler(irq_t *irq, void *arg, ...)
{
    /* TODO time drifts ??
    unsigned long drift;
 
    drift = cp0_count_read() - nextcount;
    while (drift > cp0_compare_value) {
        drift -= cp0_compare_value;
        CPU->missed_clock_ticks++;
    }
    nextcount = cp0_count_read() + cp0_compare_value - drift;
    cp0_compare_write(nextcount);
    */
 
    /*
    * We are holding a lock which prevents preemption.
    * Release the lock, call clock() and reacquire the lock again.
    */
    spinlock_unlock(&irq->lock);
    //clock();
    puts(" ");
    spinlock_lock(&irq->lock);
 
    /* acknowledge tick */
    *(uint32_t*) gxemul_hw_map.rtc_ack = 0;
   
    /* TODO what's that? *
    if (virtual_timer_fnc != NULL)
        virtual_timer_fnc();
    */
}
 
/**
 * Initializes and registers timer interrupt handler.
 */
void gxemul_timer_irq_init()
{
    irq_initialize(&gxemul_timer_irq);
    gxemul_timer_irq.devno = device_assign_devno();
    gxemul_timer_irq.inr = GXEMUL_TIMER_IRQ;
    gxemul_timer_irq.claim = gxemul_timer_claim;
    gxemul_timer_irq.handler = gxemul_timer_irq_handler;
 
    irq_register(&gxemul_timer_irq);
}
 
size_t gxemul_get_memory_size(void)
{
    return  *((int*)(GXEMUL_MP + GXEMUL_MP_MEMSIZE_OFFSET));
}
 
void gxemul_debug_putc(char ch) {
    *((volatile char *) GXEMUL_KBD) = ch;
}
 
/** @}
 */
 

Rev 2263	Rev 2264
1	/*	1	/*
2	* Copyright (c) 2007 Michal Kebrt, Petr Stepan	2	* Copyright (c) 2007 Michal Kebrt, Petr Stepan
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup arm32	29	/** @addtogroup arm32
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <interrupt.h>	35	#include <interrupt.h>
36	#include <ipc/irq.h>	36	#include <ipc/irq.h>
37	#include <console/chardev.h>	37	#include <console/chardev.h>
38	#include <arch/drivers/gxemul.h>	38	#include <arch/drivers/gxemul.h>
39	#include <console/console.h>	39	#include <console/console.h>
40	#include <sysinfo/sysinfo.h>	40	#include <sysinfo/sysinfo.h>
41	#include <print.h>	41	#include <print.h>
42	#include <ddi/device.h>	42	#include <ddi/device.h>
43	#include <mm/page.h>	43	#include <mm/page.h>
44		44
45	/** Address of devices. */	45	/** Address of devices. */
46	#define GXEMUL_VIDEORAM 0x10000000	46	#define GXEMUL_VIDEORAM 0x10000000
47	#define GXEMUL_KBD 0x10000000	47	#define GXEMUL_KBD 0x10000000
48	#define GXEMUL_RTC 0x15000000	48	#define GXEMUL_RTC 0x15000000
49	#define GXEMUL_RTC_FREQ_OFFSET 0x100	49	#define GXEMUL_RTC_FREQ_OFFSET 0x100
50	#define GXEMUL_RTC_ACK_OFFSET 0x110	50	#define GXEMUL_RTC_ACK_OFFSET 0x110
51	#define GXEMUL_IRQC 0x16000000	51	#define GXEMUL_IRQC 0x16000000
52	#define GXEMUL_IRQC_MASK_OFFSET 0x4	52	#define GXEMUL_IRQC_MASK_OFFSET 0x4
53	#define GXEMUL_IRQC_UNMASK_OFFSET 0x8	53	#define GXEMUL_IRQC_UNMASK_OFFSET 0x8
54	#define GXEMUL_MP 0x11000000	54	#define GXEMUL_MP 0x11000000
55	#define GXEMUL_MP_MEMSIZE_OFFSET 0x0090	55	#define GXEMUL_MP_MEMSIZE_OFFSET 0x0090
56		56
57		57
58	/** IRQs */	58	/** IRQs */
59	#define GXEMUL_KBD_IRQ 2	59	#define GXEMUL_KBD_IRQ 2
60	#define GXEMUL_TIMER_IRQ 4	60	#define GXEMUL_TIMER_IRQ 4
61		61
62	static gxemul_hw_map_t gxemul_hw_map;	62	static gxemul_hw_map_t gxemul_hw_map;
63	static chardev_t console;	63	static chardev_t console;
64	static irq_t gxemul_irq;	64	static irq_t gxemul_irq;
65	static irq_t gxemul_timer_irq;	65	static irq_t gxemul_timer_irq;
66		66
67	static void gxemul_write(chardev_t *dev, const char ch);	67	static void gxemul_write(chardev_t *dev, const char ch);
68	static void gxemul_enable(chardev_t *dev);	68	static void gxemul_enable(chardev_t *dev);
69	static void gxemul_disable(chardev_t *dev);	69	static void gxemul_disable(chardev_t *dev);
70	static char gxemul_do_read(chardev_t *dev);	70	static char gxemul_do_read(chardev_t *dev);
71		71
72	static chardev_operations_t gxemul_ops = {	72	static chardev_operations_t gxemul_ops = {
73	.resume = gxemul_enable,	73	.resume = gxemul_enable,
74	.suspend = gxemul_disable,	74	.suspend = gxemul_disable,
75	.write = gxemul_write,	75	.write = gxemul_write,
76	.read = gxemul_do_read,	76	.read = gxemul_do_read,
77	};	77	};
78		78
79		79
80	/** Initializes #gxemul_hw_map. */	80	/** Initializes #gxemul_hw_map. */
81	void gxemul_hw_map_init(void)	81	void gxemul_hw_map_init(void)
82	{	82	{
83	gxemul_hw_map.videoram = hw_map(GXEMUL_VIDEORAM, PAGE_SIZE);	83	gxemul_hw_map.videoram = hw_map(GXEMUL_VIDEORAM, PAGE_SIZE);
84	gxemul_hw_map.kbd = hw_map(GXEMUL_KBD, PAGE_SIZE);	84	gxemul_hw_map.kbd = hw_map(GXEMUL_KBD, PAGE_SIZE);
85	gxemul_hw_map.rtc = hw_map(GXEMUL_RTC, PAGE_SIZE);	85	gxemul_hw_map.rtc = hw_map(GXEMUL_RTC, PAGE_SIZE);
86	gxemul_hw_map.irqc = hw_map(GXEMUL_IRQC, PAGE_SIZE);	86	gxemul_hw_map.irqc = hw_map(GXEMUL_IRQC, PAGE_SIZE);
87		87
88	gxemul_hw_map.rtc_freq = gxemul_hw_map.rtc + GXEMUL_RTC_FREQ_OFFSET;	88	gxemul_hw_map.rtc_freq = gxemul_hw_map.rtc + GXEMUL_RTC_FREQ_OFFSET;
89	gxemul_hw_map.rtc_ack = gxemul_hw_map.rtc + GXEMUL_RTC_ACK_OFFSET;	89	gxemul_hw_map.rtc_ack = gxemul_hw_map.rtc + GXEMUL_RTC_ACK_OFFSET;
90	gxemul_hw_map.irqc_mask = gxemul_hw_map.irqc + GXEMUL_IRQC_MASK_OFFSET;	90	gxemul_hw_map.irqc_mask = gxemul_hw_map.irqc + GXEMUL_IRQC_MASK_OFFSET;
91	gxemul_hw_map.irqc_unmask = gxemul_hw_map.irqc + GXEMUL_IRQC_UNMASK_OFFSET;	91	gxemul_hw_map.irqc_unmask = gxemul_hw_map.irqc + GXEMUL_IRQC_UNMASK_OFFSET;
-		92
92	}	93	}
93		94
94	/** Putchar that works with gxemul */	95	/** Putchar that works with gxemul */
95	void gxemul_write(chardev_t *dev, const char ch)	96	void gxemul_write(chardev_t *dev, const char ch)
96	{	97	{
97	((char ) gxemul_hw_map.videoram) = ch;	98	((char ) gxemul_hw_map.videoram) = ch;
98	}	99	}
99		100
100	/* Called from getc(). */	101	/* Called from getc(). */
101	void gxemul_enable(chardev_t *dev)	102	void gxemul_enable(chardev_t *dev)
102	{	103	{
103	// cp0_unmask_int(GXEMUL_KBD_IRQ);	104	// cp0_unmask_int(GXEMUL_KBD_IRQ);
104	gxemul_irqc_unmask(GXEMUL_KBD_IRQ);	105	gxemul_irqc_unmask(GXEMUL_KBD_IRQ);
105	}	106	}
106		107
107	/* Called from getc(). */	108	/* Called from getc(). */
108	void gxemul_disable(chardev_t *dev)	109	void gxemul_disable(chardev_t *dev)
109	{	110	{
110	// cp0_mask_int(GXEMUL_KBD_IRQ);	111	// cp0_mask_int(GXEMUL_KBD_IRQ);
111	gxemul_irqc_mask(GXEMUL_KBD_IRQ);	112	gxemul_irqc_mask(GXEMUL_KBD_IRQ);
112	}	113	}
113		114
114	/** Read character using polling, assume interrupts disabled */	115	/** Read character using polling, assume interrupts disabled */
115	static char gxemul_do_read(chardev_t *dev)	116	static char gxemul_do_read(chardev_t *dev)
116	{	117	{
117	char ch;	118	char ch;
118		119
119	while (1) {	120	while (1) {
120	ch = ((volatile char ) gxemul_hw_map.kbd);	121	ch = ((volatile char ) gxemul_hw_map.kbd);
121	if (ch) {	122	if (ch) {
122	if (ch == '\r')	123	if (ch == '\r')
123	return '\n';	124	return '\n';
124	if (ch == 0x7f)	125	if (ch == 0x7f)
125	return '\b';	126	return '\b';
126	return ch;	127	return ch;
127	}	128	}
128	}	129	}
129	}	130	}
130		131
131	/** Process keyboard interrupt. */	132	/** Process keyboard interrupt. */
132	static void gxemul_irq_handler(irq_t irq, void arg, ...)	133	static void gxemul_irq_handler(irq_t irq, void arg, ...)
133	{	134	{
134	if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox))	135	if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox))
135	ipc_irq_send_notif(irq);	136	ipc_irq_send_notif(irq);
136	else {	137	else {
137	char ch = 0;	138	char ch = 0;
138		139
139	ch = ((char ) gxemul_hw_map.kbd);	140	ch = ((char ) gxemul_hw_map.kbd);
140	if (ch =='\r')	141	if (ch =='\r')
141	ch = '\n';	142	ch = '\n';
142	if (ch == 0x7f)	143	if (ch == 0x7f)
143	ch = '\b';	144	ch = '\b';
144	//chardev_push_character(&console, ch);	145	//chardev_push_character(&console, ch);
145	printf("%c", ch);	146	printf("%c", ch);
146	}	147	}
147	}	148	}
148		149
149	static irq_ownership_t gxemul_claim(void)	150	static irq_ownership_t gxemul_claim(void)
150	{	151	{
151	return IRQ_ACCEPT;	152	return IRQ_ACCEPT;
152	}	153	}
153		154
154	void gxemul_kbd_grab(void)	155	void gxemul_kbd_grab(void)
155	{	156	{
156	ipl_t ipl = interrupts_disable();	157	ipl_t ipl = interrupts_disable();
157	spinlock_lock(&gxemul_irq.lock);	158	spinlock_lock(&gxemul_irq.lock);
158	gxemul_irq.notif_cfg.notify = false;	159	gxemul_irq.notif_cfg.notify = false;
159	spinlock_unlock(&gxemul_irq.lock);	160	spinlock_unlock(&gxemul_irq.lock);
160	interrupts_restore(ipl);	161	interrupts_restore(ipl);
161	}	162	}
162		163
163	void gxemul_kbd_release(void)	164	void gxemul_kbd_release(void)
164	{	165	{
165	ipl_t ipl = interrupts_disable();	166	ipl_t ipl = interrupts_disable();
166	spinlock_lock(&gxemul_irq.lock);	167	spinlock_lock(&gxemul_irq.lock);
167	if (gxemul_irq.notif_cfg.answerbox)	168	if (gxemul_irq.notif_cfg.answerbox)
168	gxemul_irq.notif_cfg.notify = true;	169	gxemul_irq.notif_cfg.notify = true;
169	spinlock_unlock(&gxemul_irq.lock);	170	spinlock_unlock(&gxemul_irq.lock);
170	interrupts_restore(ipl);	171	interrupts_restore(ipl);
171	}	172	}
172		173
173		174
174	/** Return console object representing gxemul console */	175	/** Return console object representing gxemul console */
175	void gxemul_console(devno_t devno)	176	void gxemul_console(devno_t devno)
176	{	177	{
177	chardev_initialize("gxemul_console", &console, &gxemul_ops);	178	chardev_initialize("gxemul_console", &console, &gxemul_ops);
178	stdin = &console;	179	stdin = &console;
179	stdout = &console;	180	stdout = &console;
180		181
181	irq_initialize(&gxemul_irq);	182	irq_initialize(&gxemul_irq);
182	gxemul_irq.devno = devno;	183	gxemul_irq.devno = devno;
183	gxemul_irq.inr = GXEMUL_KBD_IRQ;	184	gxemul_irq.inr = GXEMUL_KBD_IRQ;
184	gxemul_irq.claim = gxemul_claim;	185	gxemul_irq.claim = gxemul_claim;
185	gxemul_irq.handler = gxemul_irq_handler;	186	gxemul_irq.handler = gxemul_irq_handler;
186	irq_register(&gxemul_irq);	187	irq_register(&gxemul_irq);
187		188
188	// cp0_unmask_int(GXEMUL_KBD_IRQ);	189	// cp0_unmask_int(GXEMUL_KBD_IRQ);
189	gxemul_irqc_unmask(GXEMUL_KBD_IRQ);	190	gxemul_irqc_unmask(GXEMUL_KBD_IRQ);
190		191
191	sysinfo_set_item_val("kbd", NULL, true);	192	sysinfo_set_item_val("kbd", NULL, true);
192	sysinfo_set_item_val("kbd.devno", NULL, devno);	193	sysinfo_set_item_val("kbd.devno", NULL, devno);
193	sysinfo_set_item_val("kbd.inr", NULL, GXEMUL_KBD_IRQ);	194	sysinfo_set_item_val("kbd.inr", NULL, GXEMUL_KBD_IRQ);
194	sysinfo_set_item_val("kbd.address.virtual", NULL, gxemul_hw_map.kbd);	195	sysinfo_set_item_val("kbd.address.virtual", NULL, gxemul_hw_map.kbd);
195	}	196	}
196		197
197	/** Return the mask of active interrupts. */	198	/** Return the mask of active interrupts. */
198	inline uint32_t gxemul_irqc_get_sources(void)	199	inline uint32_t gxemul_irqc_get_sources(void)
199	{	200	{
200	return (uint32_t) gxemul_hw_map.irqc;	201	return (uint32_t) gxemul_hw_map.irqc;
201	}	202	}
202		203
203	/** Masks interrupt.	204	/** Masks interrupt.
204	*	205	*
205	* @param irq interrupt number	206	* @param irq interrupt number
206	*/	207	*/
207	inline void gxemul_irqc_mask(uint32_t irq)	208	inline void gxemul_irqc_mask(uint32_t irq)
208	{	209	{
209	(uint32_t) gxemul_hw_map.irqc_mask = irq;	210	(uint32_t) gxemul_hw_map.irqc_mask = irq;
210	}	211	}
211		212
212	/** Unmasks interrupt.	213	/** Unmasks interrupt.
213	*	214	*
214	* @param irq interrupt number	215	* @param irq interrupt number
215	*/	216	*/
216	inline void gxemul_irqc_unmask(uint32_t irq)	217	inline void gxemul_irqc_unmask(uint32_t irq)
217	{	218	{
218	(uint32_t) gxemul_hw_map.irqc_unmask = irq;	219	(uint32_t) gxemul_hw_map.irqc_unmask = irq;
219	}	220	}
220		221
221		222
222	/** Starts gxemul Real Time Clock device, which asserts regular interrupts.	223	/** Starts gxemul Real Time Clock device, which asserts regular interrupts.
223	*	224	*
224	* @param frequency interrupts frequency (0 disables RTC)	225	* @param frequency interrupts frequency (0 disables RTC)
225	*/	226	*/
226	void gxemul_timer_start(uint32_t frequency)	227	void gxemul_timer_start(uint32_t frequency)
227	{	228	{
228	(uint32_t) gxemul_hw_map.rtc_freq = frequency;	229	(uint32_t) gxemul_hw_map.rtc_freq = frequency;
229	}	230	}
230		231
231	static irq_ownership_t gxemul_timer_claim(void)	232	static irq_ownership_t gxemul_timer_claim(void)
232	{	233	{
233	return IRQ_ACCEPT;	234	return IRQ_ACCEPT;
234	}	235	}
235		236
236	static void gxemul_timer_irq_handler(irq_t irq, void arg, ...)	237	static void gxemul_timer_irq_handler(irq_t irq, void arg, ...)
237	{	238	{
238	/* TODO time drifts ??	239	/* TODO time drifts ??
239	unsigned long drift;	240	unsigned long drift;
240		241
241	drift = cp0_count_read() - nextcount;	242	drift = cp0_count_read() - nextcount;
242	while (drift > cp0_compare_value) {	243	while (drift > cp0_compare_value) {
243	drift -= cp0_compare_value;	244	drift -= cp0_compare_value;
244	CPU->missed_clock_ticks++;	245	CPU->missed_clock_ticks++;
245	}	246	}
246	nextcount = cp0_count_read() + cp0_compare_value - drift;	247	nextcount = cp0_count_read() + cp0_compare_value - drift;
247	cp0_compare_write(nextcount);	248	cp0_compare_write(nextcount);
248	*/	249	*/
249		250
250	/*	251	/*
251	* We are holding a lock which prevents preemption.	252	* We are holding a lock which prevents preemption.
252	* Release the lock, call clock() and reacquire the lock again.	253	* Release the lock, call clock() and reacquire the lock again.
253	*/	254	*/
254	spinlock_unlock(&irq->lock);	255	spinlock_unlock(&irq->lock);
255	//clock();	256	//clock();
256	puts(" ");	257	puts(" ");
257	spinlock_lock(&irq->lock);	258	spinlock_lock(&irq->lock);
258		259
259	/* acknowledge tick */	260	/* acknowledge tick */
260	(uint32_t) gxemul_hw_map.rtc_ack = 0;	261	(uint32_t) gxemul_hw_map.rtc_ack = 0;
261		262
262	/* TODO what's that? *	263	/* TODO what's that? *
263	if (virtual_timer_fnc != NULL)	264	if (virtual_timer_fnc != NULL)
264	virtual_timer_fnc();	265	virtual_timer_fnc();
265	*/	266	*/
266	}	267	}
267		268
268	/**	269	/**
269	* Initializes and registers timer interrupt handler.	270	* Initializes and registers timer interrupt handler.
270	*/	271	*/
271	void gxemul_timer_irq_init()	272	void gxemul_timer_irq_init()
272	{	273	{
273	irq_initialize(&gxemul_timer_irq);	274	irq_initialize(&gxemul_timer_irq);
274	gxemul_timer_irq.devno = device_assign_devno();	275	gxemul_timer_irq.devno = device_assign_devno();
275	gxemul_timer_irq.inr = GXEMUL_TIMER_IRQ;	276	gxemul_timer_irq.inr = GXEMUL_TIMER_IRQ;
276	gxemul_timer_irq.claim = gxemul_timer_claim;	277	gxemul_timer_irq.claim = gxemul_timer_claim;
277	gxemul_timer_irq.handler = gxemul_timer_irq_handler;	278	gxemul_timer_irq.handler = gxemul_timer_irq_handler;
278		279
279	irq_register(&gxemul_timer_irq);	280	irq_register(&gxemul_timer_irq);
280	}	281	}
281		282
282	size_t gxemul_get_memory_size(void)	283	size_t gxemul_get_memory_size(void)
283	{	284	{
284	return ((int)(GXEMUL_MP + GXEMUL_MP_MEMSIZE_OFFSET));	285	return ((int)(GXEMUL_MP + GXEMUL_MP_MEMSIZE_OFFSET));
285	}	286	}
-		287
-		288	void gxemul_debug_putc(char ch) {
-		289	((volatile char ) GXEMUL_KBD) = ch;
-		290	}
286		291
287	/** @}	292	/** @}
288	*/	293	*/
289		294

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(root)/branches/arm/kernel/arch/arm32/src/drivers/gxemul.c @ 4346 – Rev 2263 → 2264