WebSVN – HelenOS – Diff – /branches/arm/kernel/arch/arm32/src/drivers/gxemul.c


/*
 * Copyright (c) 2007 Michal Kebrt, Petr Stepan
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup arm32
 * @{
 */
/** @file
 */
 
#include <interrupt.h>
#include <ipc/irq.h>
#include <console/chardev.h>
#include <arch/drivers/gxemul.h>
#include <console/console.h>
#include <sysinfo/sysinfo.h>
#include <print.h>
#include <ddi/device.h>
#include <mm/page.h>
#include <arch/machine.h>
 
/** Address of devices. */
#define GXEMUL_VIDEORAM            0x10000000
#define GXEMUL_KBD                 0x10000000
#define GXEMUL_RTC                 0x15000000
#define GXEMUL_RTC_FREQ_OFFSET     0x100
#define GXEMUL_RTC_ACK_OFFSET      0x110
#define GXEMUL_IRQC                0x16000000
#define GXEMUL_IRQC_MASK_OFFSET    0x4
#define GXEMUL_IRQC_UNMASK_OFFSET  0x8
#define GXEMUL_MP                  0x11000000
#define GXEMUL_MP_MEMSIZE_OFFSET   0x0090
 
 
/** IRQs */
#define GXEMUL_KBD_IRQ      2
#define GXEMUL_TIMER_IRQ    4
 
static gxemul_hw_map_t gxemul_hw_map;
static chardev_t console;
static irq_t gxemul_irq;
static irq_t gxemul_timer_irq;
 
static bool hw_map_init_called = false;
 
static void gxemul_write(chardev_t *dev, const char ch);
static void gxemul_enable(chardev_t *dev);
static void gxemul_disable(chardev_t *dev);
static char gxemul_do_read(chardev_t *dev);
 
static chardev_operations_t gxemul_ops = {
    .resume = gxemul_enable,
    .suspend = gxemul_disable,
    .write = gxemul_write,
    .read = gxemul_do_read,
};
 
 
/** Initializes #gxemul_hw_map. */
void machine_hw_map_init(void)
{
    gxemul_hw_map.videoram = hw_map(GXEMUL_VIDEORAM, PAGE_SIZE);
    gxemul_hw_map.kbd = hw_map(GXEMUL_KBD, PAGE_SIZE);
    gxemul_hw_map.rtc = hw_map(GXEMUL_RTC, PAGE_SIZE);
    gxemul_hw_map.irqc = hw_map(GXEMUL_IRQC, PAGE_SIZE);
 
    gxemul_hw_map.rtc_freq = gxemul_hw_map.rtc + GXEMUL_RTC_FREQ_OFFSET;
    gxemul_hw_map.rtc_ack = gxemul_hw_map.rtc + GXEMUL_RTC_ACK_OFFSET;
    gxemul_hw_map.irqc_mask = gxemul_hw_map.irqc + GXEMUL_IRQC_MASK_OFFSET;
    gxemul_hw_map.irqc_unmask = gxemul_hw_map.irqc + GXEMUL_IRQC_UNMASK_OFFSET;
 
    hw_map_init_called = true;
}
 
/** Putchar that works with gxemul */
void gxemul_write(chardev_t *dev, const char ch)
{
    *((char *) gxemul_hw_map.videoram) = ch;
}
 
/* Called from getc(). */
void gxemul_enable(chardev_t *dev)
{
//  cp0_unmask_int(GXEMUL_KBD_IRQ);
    gxemul_irqc_unmask(GXEMUL_KBD_IRQ);
}
 
/* Called from getc(). */
void gxemul_disable(chardev_t *dev)
{
//  cp0_mask_int(GXEMUL_KBD_IRQ);
    gxemul_irqc_mask(GXEMUL_KBD_IRQ);
}
 
/** Read character using polling, assume interrupts disabled */
static char gxemul_do_read(chardev_t *dev)
{
    char ch;
 
    while (1) {
        ch = *((volatile char *) gxemul_hw_map.kbd);
        if (ch) {
            if (ch == '\r')
                return '\n';
            if (ch == 0x7f)
                return '\b';
            return ch;
        }
    }
}
 
/** Process keyboard interrupt. */
static void gxemul_irq_handler(irq_t *irq, void *arg, ...)
{
    if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox))
        ipc_irq_send_notif(irq);
    else {
        char ch = 0;
       
            ch = *((char *) gxemul_hw_map.kbd);
            if (ch =='\r')
                ch = '\n';
            if (ch == 0x7f)
                ch = '\b';
            chardev_push_character(&console, ch);
    }
}
 
static irq_ownership_t gxemul_claim(void)
{
    return IRQ_ACCEPT;
}
 
void machine_grab_console(void)
{
    ipl_t ipl = interrupts_disable();
    spinlock_lock(&gxemul_irq.lock);
    gxemul_irq.notif_cfg.notify = false;
    spinlock_unlock(&gxemul_irq.lock);
    interrupts_restore(ipl);
}
 
void machine_release_console(void)
{
    ipl_t ipl = interrupts_disable();
    spinlock_lock(&gxemul_irq.lock);
    if (gxemul_irq.notif_cfg.answerbox)
        gxemul_irq.notif_cfg.notify = true;
    spinlock_unlock(&gxemul_irq.lock);
    interrupts_restore(ipl);
}
 
 
/** Return console object representing gxemul console */
void machine_console_init(devno_t devno)
{
    chardev_initialize("gxemul_console", &console, &gxemul_ops);
    stdin = &console;
    stdout = &console;
   
    irq_initialize(&gxemul_irq);
    gxemul_irq.devno = devno;
    gxemul_irq.inr = GXEMUL_KBD_IRQ;
    gxemul_irq.claim = gxemul_claim;
    gxemul_irq.handler = gxemul_irq_handler;
    irq_register(&gxemul_irq);
   
//  cp0_unmask_int(GXEMUL_KBD_IRQ);
    gxemul_irqc_unmask(GXEMUL_KBD_IRQ);
   
    sysinfo_set_item_val("kbd", NULL, true);
    sysinfo_set_item_val("kbd.devno", NULL, devno);
    sysinfo_set_item_val("kbd.inr", NULL, GXEMUL_KBD_IRQ);
    sysinfo_set_item_val("kbd.address.virtual", NULL, gxemul_hw_map.kbd);
}
 
/** Return the mask of active interrupts. */
inline uint32_t gxemul_irqc_get_sources(void)
{
    return *(uint32_t*) gxemul_hw_map.irqc;
}
 
/** Masks interrupt.
 *
 * @param irq interrupt number
 */
inline void gxemul_irqc_mask(uint32_t irq)
{
    *(uint32_t*) gxemul_hw_map.irqc_mask = irq;
}
 
/** Unmasks interrupt.
 *
 * @param irq interrupt number
 */
inline void gxemul_irqc_unmask(uint32_t irq)
{
    *(uint32_t*) gxemul_hw_map.irqc_unmask = irq;
}
 
 
/** Starts gxemul Real Time Clock device, which asserts regular interrupts.
 *
 * @param frequency interrupts frequency (0 disables RTC)
 */
void gxemul_timer_start(uint32_t frequency)
{
    *(uint32_t*) gxemul_hw_map.rtc_freq = frequency;
}
 
static irq_ownership_t gxemul_timer_claim(void)
{
    return IRQ_ACCEPT;
}
 
static void gxemul_timer_irq_handler(irq_t *irq, void *arg, ...)
{
    /* TODO time drifts ??
    unsigned long drift;
 
    drift = cp0_count_read() - nextcount;
    while (drift > cp0_compare_value) {
        drift -= cp0_compare_value;
        CPU->missed_clock_ticks++;
    }
    nextcount = cp0_count_read() + cp0_compare_value - drift;
    cp0_compare_write(nextcount);
    */
 
    /*
    * We are holding a lock which prevents preemption.
    * Release the lock, call clock() and reacquire the lock again.
    */
    spinlock_unlock(&irq->lock);
    clock();
    spinlock_lock(&irq->lock);
 
    /* acknowledge tick */
    *(uint32_t*) gxemul_hw_map.rtc_ack = 0;
   
    /* TODO what's that? *
    if (virtual_timer_fnc != NULL)
        virtual_timer_fnc();
    */
}
 
/**
 * Initializes and registers timer interrupt handler.
 */
void gxemul_timer_irq_init()
{
    irq_initialize(&gxemul_timer_irq);
    gxemul_timer_irq.devno = device_assign_devno();
    gxemul_timer_irq.inr = GXEMUL_TIMER_IRQ;
    gxemul_timer_irq.claim = gxemul_timer_claim;
    gxemul_timer_irq.handler = gxemul_timer_irq_handler;
 
    irq_register(&gxemul_timer_irq);
}
 
void machine_timer_irq_start()
{
    gxemul_timer_irq_init();
    gxemul_timer_start(GXEMUL_TIMER_FREQ);
}
 
size_t machine_get_memory_size(void)
{
    return  *((int*)(GXEMUL_MP + GXEMUL_MP_MEMSIZE_OFFSET));
}
 
void machine_debug_putc(char ch) {
    if (!hw_map_init_called) {
        *((volatile char *) GXEMUL_KBD) = ch;
    } else {
        *((char *) gxemul_hw_map.videoram) = ch;
    }
}
 
/** @}
 */
 

Subversion Repositories HelenOS

(root)/branches/arm/kernel/arch/arm32/src/drivers/gxemul.c @ 4221 – Rev 2290 → 2294

Rev 2290		Rev 2294
1	/*	1	/*
2	* Copyright (c) 2007 Michal Kebrt, Petr Stepan	2	* Copyright (c) 2007 Michal Kebrt, Petr Stepan
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup arm32	29	/** @addtogroup arm32
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#include <interrupt.h>	35	#include <interrupt.h>
36	#include <ipc/irq.h>	36	#include <ipc/irq.h>
37	#include <console/chardev.h>	37	#include <console/chardev.h>
38	#include <arch/drivers/gxemul.h>	38	#include <arch/drivers/gxemul.h>
39	#include <console/console.h>	39	#include <console/console.h>
40	#include <sysinfo/sysinfo.h>	40	#include <sysinfo/sysinfo.h>
41	#include <print.h>	41	#include <print.h>
42	#include <ddi/device.h>	42	#include <ddi/device.h>
43	#include <mm/page.h>	43	#include <mm/page.h>
44	#include <arch/machine.h>	44	#include <arch/machine.h>
45		45
46	/** Address of devices. */	46	/** Address of devices. */
47	#define GXEMUL_VIDEORAM 0x10000000	47	#define GXEMUL_VIDEORAM 0x10000000
48	#define GXEMUL_KBD 0x10000000	48	#define GXEMUL_KBD 0x10000000
49	#define GXEMUL_RTC 0x15000000	49	#define GXEMUL_RTC 0x15000000
50	#define GXEMUL_RTC_FREQ_OFFSET 0x100	50	#define GXEMUL_RTC_FREQ_OFFSET 0x100
51	#define GXEMUL_RTC_ACK_OFFSET 0x110	51	#define GXEMUL_RTC_ACK_OFFSET 0x110
52	#define GXEMUL_IRQC 0x16000000	52	#define GXEMUL_IRQC 0x16000000
53	#define GXEMUL_IRQC_MASK_OFFSET 0x4	53	#define GXEMUL_IRQC_MASK_OFFSET 0x4
54	#define GXEMUL_IRQC_UNMASK_OFFSET 0x8	54	#define GXEMUL_IRQC_UNMASK_OFFSET 0x8
55	#define GXEMUL_MP 0x11000000	55	#define GXEMUL_MP 0x11000000
56	#define GXEMUL_MP_MEMSIZE_OFFSET 0x0090	56	#define GXEMUL_MP_MEMSIZE_OFFSET 0x0090
57		57
58		58
59	/** IRQs */	59	/** IRQs */
60	#define GXEMUL_KBD_IRQ 2	60	#define GXEMUL_KBD_IRQ 2
61	#define GXEMUL_TIMER_IRQ 4	61	#define GXEMUL_TIMER_IRQ 4
62		62
63	static gxemul_hw_map_t gxemul_hw_map;	63	static gxemul_hw_map_t gxemul_hw_map;
64	static chardev_t console;	64	static chardev_t console;
65	static irq_t gxemul_irq;	65	static irq_t gxemul_irq;
66	static irq_t gxemul_timer_irq;	66	static irq_t gxemul_timer_irq;
67		67
68	static bool hw_map_init_called = false;	68	static bool hw_map_init_called = false;
69		69
70	static void gxemul_write(chardev_t *dev, const char ch);	70	static void gxemul_write(chardev_t *dev, const char ch);
71	static void gxemul_enable(chardev_t *dev);	71	static void gxemul_enable(chardev_t *dev);
72	static void gxemul_disable(chardev_t *dev);	72	static void gxemul_disable(chardev_t *dev);
73	static char gxemul_do_read(chardev_t *dev);	73	static char gxemul_do_read(chardev_t *dev);
74		74
75	static chardev_operations_t gxemul_ops = {	75	static chardev_operations_t gxemul_ops = {
76	.resume = gxemul_enable,	76	.resume = gxemul_enable,
77	.suspend = gxemul_disable,	77	.suspend = gxemul_disable,
78	.write = gxemul_write,	78	.write = gxemul_write,
79	.read = gxemul_do_read,	79	.read = gxemul_do_read,
80	};	80	};
81		81
82		82
83	/** Initializes #gxemul_hw_map. */	83	/** Initializes #gxemul_hw_map. */
84	void gxemul_hw_map_init(void)	84	void machine_hw_map_init(void)
85	{	85	{
86	gxemul_hw_map.videoram = hw_map(GXEMUL_VIDEORAM, PAGE_SIZE);	86	gxemul_hw_map.videoram = hw_map(GXEMUL_VIDEORAM, PAGE_SIZE);
87	gxemul_hw_map.kbd = hw_map(GXEMUL_KBD, PAGE_SIZE);	87	gxemul_hw_map.kbd = hw_map(GXEMUL_KBD, PAGE_SIZE);
88	gxemul_hw_map.rtc = hw_map(GXEMUL_RTC, PAGE_SIZE);	88	gxemul_hw_map.rtc = hw_map(GXEMUL_RTC, PAGE_SIZE);
89	gxemul_hw_map.irqc = hw_map(GXEMUL_IRQC, PAGE_SIZE);	89	gxemul_hw_map.irqc = hw_map(GXEMUL_IRQC, PAGE_SIZE);
90		90
91	gxemul_hw_map.rtc_freq = gxemul_hw_map.rtc + GXEMUL_RTC_FREQ_OFFSET;	91	gxemul_hw_map.rtc_freq = gxemul_hw_map.rtc + GXEMUL_RTC_FREQ_OFFSET;
92	gxemul_hw_map.rtc_ack = gxemul_hw_map.rtc + GXEMUL_RTC_ACK_OFFSET;	92	gxemul_hw_map.rtc_ack = gxemul_hw_map.rtc + GXEMUL_RTC_ACK_OFFSET;
93	gxemul_hw_map.irqc_mask = gxemul_hw_map.irqc + GXEMUL_IRQC_MASK_OFFSET;	93	gxemul_hw_map.irqc_mask = gxemul_hw_map.irqc + GXEMUL_IRQC_MASK_OFFSET;
94	gxemul_hw_map.irqc_unmask = gxemul_hw_map.irqc + GXEMUL_IRQC_UNMASK_OFFSET;	94	gxemul_hw_map.irqc_unmask = gxemul_hw_map.irqc + GXEMUL_IRQC_UNMASK_OFFSET;
95		95
96	hw_map_init_called = true;	96	hw_map_init_called = true;
97	}	97	}
98		98
99	/** Putchar that works with gxemul */	99	/** Putchar that works with gxemul */
100	void gxemul_write(chardev_t *dev, const char ch)	100	void gxemul_write(chardev_t *dev, const char ch)
101	{	101	{
102	((char ) gxemul_hw_map.videoram) = ch;	102	((char ) gxemul_hw_map.videoram) = ch;
103	}	103	}
104		104
105	/* Called from getc(). */	105	/* Called from getc(). */
106	void gxemul_enable(chardev_t *dev)	106	void gxemul_enable(chardev_t *dev)
107	{	107	{
108	// cp0_unmask_int(GXEMUL_KBD_IRQ);	108	// cp0_unmask_int(GXEMUL_KBD_IRQ);
109	gxemul_irqc_unmask(GXEMUL_KBD_IRQ);	109	gxemul_irqc_unmask(GXEMUL_KBD_IRQ);
110	}	110	}
111		111
112	/* Called from getc(). */	112	/* Called from getc(). */
113	void gxemul_disable(chardev_t *dev)	113	void gxemul_disable(chardev_t *dev)
114	{	114	{
115	// cp0_mask_int(GXEMUL_KBD_IRQ);	115	// cp0_mask_int(GXEMUL_KBD_IRQ);
116	gxemul_irqc_mask(GXEMUL_KBD_IRQ);	116	gxemul_irqc_mask(GXEMUL_KBD_IRQ);
117	}	117	}
118		118
119	/** Read character using polling, assume interrupts disabled */	119	/** Read character using polling, assume interrupts disabled */
120	static char gxemul_do_read(chardev_t *dev)	120	static char gxemul_do_read(chardev_t *dev)
121	{	121	{
122	char ch;	122	char ch;
123		123
124	while (1) {	124	while (1) {
125	ch = ((volatile char ) gxemul_hw_map.kbd);	125	ch = ((volatile char ) gxemul_hw_map.kbd);
126	if (ch) {	126	if (ch) {
127	if (ch == '\r')	127	if (ch == '\r')
128	return '\n';	128	return '\n';
129	if (ch == 0x7f)	129	if (ch == 0x7f)
130	return '\b';	130	return '\b';
131	return ch;	131	return ch;
132	}	132	}
133	}	133	}
134	}	134	}
135		135
136	/** Process keyboard interrupt. */	136	/** Process keyboard interrupt. */
137	static void gxemul_irq_handler(irq_t irq, void arg, ...)	137	static void gxemul_irq_handler(irq_t irq, void arg, ...)
138	{	138	{
139	if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox))	139	if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox))
140	ipc_irq_send_notif(irq);	140	ipc_irq_send_notif(irq);
141	else {	141	else {
142	char ch = 0;	142	char ch = 0;
143		143
144	ch = ((char ) gxemul_hw_map.kbd);	144	ch = ((char ) gxemul_hw_map.kbd);
145	if (ch =='\r')	145	if (ch =='\r')
146	ch = '\n';	146	ch = '\n';
147	if (ch == 0x7f)	147	if (ch == 0x7f)
148	ch = '\b';	148	ch = '\b';
149	chardev_push_character(&console, ch);	149	chardev_push_character(&console, ch);
150	}	150	}
151	}	151	}
152		152
153	static irq_ownership_t gxemul_claim(void)	153	static irq_ownership_t gxemul_claim(void)
154	{	154	{
155	return IRQ_ACCEPT;	155	return IRQ_ACCEPT;
156	}	156	}
157		157
158	void machine_grab_console(void)	158	void machine_grab_console(void)
159	{	159	{
160	ipl_t ipl = interrupts_disable();	160	ipl_t ipl = interrupts_disable();
161	spinlock_lock(&gxemul_irq.lock);	161	spinlock_lock(&gxemul_irq.lock);
162	gxemul_irq.notif_cfg.notify = false;	162	gxemul_irq.notif_cfg.notify = false;
163	spinlock_unlock(&gxemul_irq.lock);	163	spinlock_unlock(&gxemul_irq.lock);
164	interrupts_restore(ipl);	164	interrupts_restore(ipl);
165	}	165	}
166		166
167	void machine_release_console(void)	167	void machine_release_console(void)
168	{	168	{
169	ipl_t ipl = interrupts_disable();	169	ipl_t ipl = interrupts_disable();
170	spinlock_lock(&gxemul_irq.lock);	170	spinlock_lock(&gxemul_irq.lock);
171	if (gxemul_irq.notif_cfg.answerbox)	171	if (gxemul_irq.notif_cfg.answerbox)
172	gxemul_irq.notif_cfg.notify = true;	172	gxemul_irq.notif_cfg.notify = true;
173	spinlock_unlock(&gxemul_irq.lock);	173	spinlock_unlock(&gxemul_irq.lock);
174	interrupts_restore(ipl);	174	interrupts_restore(ipl);
175	}	175	}
176		176
177		177
178	/** Return console object representing gxemul console */	178	/** Return console object representing gxemul console */
179	void machine_console_init(devno_t devno)	179	void machine_console_init(devno_t devno)
180	{	180	{
181	chardev_initialize("gxemul_console", &console, &gxemul_ops);	181	chardev_initialize("gxemul_console", &console, &gxemul_ops);
182	stdin = &console;	182	stdin = &console;
183	stdout = &console;	183	stdout = &console;
184		184
185	irq_initialize(&gxemul_irq);	185	irq_initialize(&gxemul_irq);
186	gxemul_irq.devno = devno;	186	gxemul_irq.devno = devno;
187	gxemul_irq.inr = GXEMUL_KBD_IRQ;	187	gxemul_irq.inr = GXEMUL_KBD_IRQ;
188	gxemul_irq.claim = gxemul_claim;	188	gxemul_irq.claim = gxemul_claim;
189	gxemul_irq.handler = gxemul_irq_handler;	189	gxemul_irq.handler = gxemul_irq_handler;
190	irq_register(&gxemul_irq);	190	irq_register(&gxemul_irq);
191		191
192	// cp0_unmask_int(GXEMUL_KBD_IRQ);	192	// cp0_unmask_int(GXEMUL_KBD_IRQ);
193	gxemul_irqc_unmask(GXEMUL_KBD_IRQ);	193	gxemul_irqc_unmask(GXEMUL_KBD_IRQ);
194		194
195	sysinfo_set_item_val("kbd", NULL, true);	195	sysinfo_set_item_val("kbd", NULL, true);
196	sysinfo_set_item_val("kbd.devno", NULL, devno);	196	sysinfo_set_item_val("kbd.devno", NULL, devno);
197	sysinfo_set_item_val("kbd.inr", NULL, GXEMUL_KBD_IRQ);	197	sysinfo_set_item_val("kbd.inr", NULL, GXEMUL_KBD_IRQ);
198	sysinfo_set_item_val("kbd.address.virtual", NULL, gxemul_hw_map.kbd);	198	sysinfo_set_item_val("kbd.address.virtual", NULL, gxemul_hw_map.kbd);
199	}	199	}
200		200
201	/** Return the mask of active interrupts. */	201	/** Return the mask of active interrupts. */
202	inline uint32_t gxemul_irqc_get_sources(void)	202	inline uint32_t gxemul_irqc_get_sources(void)
203	{	203	{
204	return (uint32_t) gxemul_hw_map.irqc;	204	return (uint32_t) gxemul_hw_map.irqc;
205	}	205	}
206		206
207	/** Masks interrupt.	207	/** Masks interrupt.
208	*	208	*
209	* @param irq interrupt number	209	* @param irq interrupt number
210	*/	210	*/
211	inline void gxemul_irqc_mask(uint32_t irq)	211	inline void gxemul_irqc_mask(uint32_t irq)
212	{	212	{
213	(uint32_t) gxemul_hw_map.irqc_mask = irq;	213	(uint32_t) gxemul_hw_map.irqc_mask = irq;
214	}	214	}
215		215
216	/** Unmasks interrupt.	216	/** Unmasks interrupt.
217	*	217	*
218	* @param irq interrupt number	218	* @param irq interrupt number
219	*/	219	*/
220	inline void gxemul_irqc_unmask(uint32_t irq)	220	inline void gxemul_irqc_unmask(uint32_t irq)
221	{	221	{
222	(uint32_t) gxemul_hw_map.irqc_unmask = irq;	222	(uint32_t) gxemul_hw_map.irqc_unmask = irq;
223	}	223	}
224		224
225		225
226	/** Starts gxemul Real Time Clock device, which asserts regular interrupts.	226	/** Starts gxemul Real Time Clock device, which asserts regular interrupts.
227	*	227	*
228	* @param frequency interrupts frequency (0 disables RTC)	228	* @param frequency interrupts frequency (0 disables RTC)
229	*/	229	*/
230	void gxemul_timer_start(uint32_t frequency)	230	void gxemul_timer_start(uint32_t frequency)
231	{	231	{
232	(uint32_t) gxemul_hw_map.rtc_freq = frequency;	232	(uint32_t) gxemul_hw_map.rtc_freq = frequency;
233	}	233	}
234		234
235	static irq_ownership_t gxemul_timer_claim(void)	235	static irq_ownership_t gxemul_timer_claim(void)
236	{	236	{
237	return IRQ_ACCEPT;	237	return IRQ_ACCEPT;
238	}	238	}
239		239
240	static void gxemul_timer_irq_handler(irq_t irq, void arg, ...)	240	static void gxemul_timer_irq_handler(irq_t irq, void arg, ...)
241	{	241	{
242	/* TODO time drifts ??	242	/* TODO time drifts ??
243	unsigned long drift;	243	unsigned long drift;
244		244
245	drift = cp0_count_read() - nextcount;	245	drift = cp0_count_read() - nextcount;
246	while (drift > cp0_compare_value) {	246	while (drift > cp0_compare_value) {
247	drift -= cp0_compare_value;	247	drift -= cp0_compare_value;
248	CPU->missed_clock_ticks++;	248	CPU->missed_clock_ticks++;
249	}	249	}
250	nextcount = cp0_count_read() + cp0_compare_value - drift;	250	nextcount = cp0_count_read() + cp0_compare_value - drift;
251	cp0_compare_write(nextcount);	251	cp0_compare_write(nextcount);
252	*/	252	*/
253		253
254	/*	254	/*
255	* We are holding a lock which prevents preemption.	255	* We are holding a lock which prevents preemption.
256	* Release the lock, call clock() and reacquire the lock again.	256	* Release the lock, call clock() and reacquire the lock again.
257	*/	257	*/
258	spinlock_unlock(&irq->lock);	258	spinlock_unlock(&irq->lock);
259	clock();	259	clock();
260	spinlock_lock(&irq->lock);	260	spinlock_lock(&irq->lock);
261		261
262	/* acknowledge tick */	262	/* acknowledge tick */
263	(uint32_t) gxemul_hw_map.rtc_ack = 0;	263	(uint32_t) gxemul_hw_map.rtc_ack = 0;
264		264
265	/* TODO what's that? *	265	/* TODO what's that? *
266	if (virtual_timer_fnc != NULL)	266	if (virtual_timer_fnc != NULL)
267	virtual_timer_fnc();	267	virtual_timer_fnc();
268	*/	268	*/
269	}	269	}
270		270
271	/**	271	/**
272	* Initializes and registers timer interrupt handler.	272	* Initializes and registers timer interrupt handler.
273	*/	273	*/
274	void gxemul_timer_irq_init()	274	void gxemul_timer_irq_init()
275	{	275	{
276	irq_initialize(&gxemul_timer_irq);	276	irq_initialize(&gxemul_timer_irq);
277	gxemul_timer_irq.devno = device_assign_devno();	277	gxemul_timer_irq.devno = device_assign_devno();
278	gxemul_timer_irq.inr = GXEMUL_TIMER_IRQ;	278	gxemul_timer_irq.inr = GXEMUL_TIMER_IRQ;
279	gxemul_timer_irq.claim = gxemul_timer_claim;	279	gxemul_timer_irq.claim = gxemul_timer_claim;
280	gxemul_timer_irq.handler = gxemul_timer_irq_handler;	280	gxemul_timer_irq.handler = gxemul_timer_irq_handler;
281		281
282	irq_register(&gxemul_timer_irq);	282	irq_register(&gxemul_timer_irq);
283	}	283	}
284		284
285	void machine_timer_irq_start()	285	void machine_timer_irq_start()
286	{	286	{
287	gxemul_timer_irq_init();	287	gxemul_timer_irq_init();
288	gxemul_timer_start(GXEMUL_TIMER_FREQ);	288	gxemul_timer_start(GXEMUL_TIMER_FREQ);
289	}	289	}
290		290
291	size_t machine_get_memory_size(void)	291	size_t machine_get_memory_size(void)
292	{	292	{
293	return ((int)(GXEMUL_MP + GXEMUL_MP_MEMSIZE_OFFSET));	293	return ((int)(GXEMUL_MP + GXEMUL_MP_MEMSIZE_OFFSET));
294	}	294	}
295		295
296	void machine_debug_putc(char ch) {	296	void machine_debug_putc(char ch) {
297	if (!hw_map_init_called) {	297	if (!hw_map_init_called) {
298	((volatile char ) GXEMUL_KBD) = ch;	298	((volatile char ) GXEMUL_KBD) = ch;
299	} else {	299	} else {
300	((char ) gxemul_hw_map.videoram) = ch;	300	((char ) gxemul_hw_map.videoram) = ch;
301	}	301	}
302	}	302	}
303		303
304	/** @}	304	/** @}
305	*/	305	*/
306		306