WebSVN – HelenOS – Diff – /branches/arm/kernel/arch/arm32/src/arm32.c


/*
 * Copyright (c) 2007 Michal Kebrt
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup arm32
 * @{
 */
/** @file
 */
 
 
#include <arch.h>
#include <arch/boot.h>
#include <config.h>
#include <arch/console.h>
#include <ddi/device.h>
#include <genarch/fb/fb.h>
#include <genarch/fb/visuals.h>
#include <ddi/irq.h>
#include <arch/debug/print.h>
#include <print.h>
#include <config.h>
#include <interrupt.h>
#include <arch/regutils.h>
#include <arch/machine.h>
#include <userspace.h>
 
bootinfo_t bootinfo;
 
extern uintptr_t supervisor_sp;
 
 
void arch_pre_main(void)
{
    int i;
 
    init.cnt = bootinfo.cnt;
 
    for (i = 0; i < bootinfo.cnt; ++i) {
        init.tasks[i].addr = bootinfo.tasks[i].addr;
        init.tasks[i].size = bootinfo.tasks[i].size;
    }
   
}
 
 
void arch_pre_mm_init(void)
{
    /* It is not assumed by default */
    interrupts_disable();
 
 
}
 
 
void arch_post_mm_init(void)
{
    machine_hw_map_init();
 
    /* Initialize dispatch table */
    exception_init();
 
    interrupt_init();
   
    console_init(device_assign_devno());
 
//#ifdef CONFIG_FB
//  fb_init(machine_get_fb_address(), 640, 480, 1920, VISUAL_RGB_8_8_8);
//#endif
}
 
 
void arch_post_cpu_init(void)
{
}
 
 
void arch_pre_smp_init(void)
{
    /* TODO */
}
 
 
void arch_post_smp_init(void)
{
    /* TODO */
}
 
 
/** Perform arm32 specific tasks needed before the new task is run. */
void before_task_runs_arch(void)
{
    tlb_invalidate_all();
}
 
 
/** Perform arm32 specific tasks needed before the new thread is scheduled. */
void before_thread_runs_arch(void)
{
    supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
}
 
 
void after_thread_ran_arch(void)
{
}
 
 
/** Struct to hold general purpose register values */
typedef struct {
    uint32_t r0;
    uint32_t r1;
    uint32_t r2;
    uint32_t r3;
    uint32_t r4;
    uint32_t r5;
    uint32_t r6;
    uint32_t r7;
    uint32_t r8;
    uint32_t r9;
    uint32_t r10;
    uint32_t r11;
    uint32_t r12;
    uint32_t sp;
    uint32_t lr;
    uint32_t pc;
} ustate_t;
 
 
/** Changes processor mode and jumps to the address specified in the first parameter.
 *
 *  @param kernel_uarg   Userspace settings (entry point, stack, ...).
 */
void userspace(uspace_arg_t *kernel_uarg)
{
    // dprintf("Userspace:  .uspace_uarg(%X), .uspace_entry(%X), .uspace_stack(%X)\n",
    //  (unsigned int)(kernel_uarg->uspace_uarg), kernel_uarg->uspace_entry,
    //  kernel_uarg->uspace_stack);
 
    volatile ustate_t ustate;
 
    // set first parameter
    ustate.r0 = (uintptr_t) kernel_uarg->uspace_uarg;
 
    // clear other registers
    ustate.r1 = ustate.r2  = ustate.r3  = ustate.r4  =
        ustate.r5 = ustate.r6  = ustate.r7  = ustate.r8  =
        ustate.r9 = ustate.r10 = ustate.r11 = ustate.r12 = 1;
 
    ustate.lr = 3;
 
    //set user stack
    ustate.sp = ((uint32_t)kernel_uarg->uspace_stack) +
            PAGE_SIZE - sizeof(void*);
    //on the bottom of stack there is pointer to TLS
   
    //set where uspace execution starts
    ustate.pc = (uintptr_t) kernel_uarg->uspace_entry;
 
    //status register in user mode
    ipl_t cpsr = current_status_reg_read();
    cpsr &= ~STATUS_REG_MODE_MASK | USER_MODE;
   
    ipl_t tmpsr = (cpsr & ~STATUS_REG_MODE_MASK) | SUPERVISOR_MODE;
 
    asm __volatile__ (
        // save pointer into ustate struct
        "mov r0, %0         \n"
        // save cspr
        "mov r1, %1         \n"
        // change mode into any exception mode
        "msr cpsr_c, %2         \n"
        // set saved cpsr
        "msr spsr_c, r1 \n"
 
        "mov sp, r0 \n"
        // replace almost all registers
        "ldmfd sp!, {r0-r12, sp, lr}^\n"
        //jump to the usermode
        "ldmfd sp!, {pc}^"
    : // no output
    : "r"(&ustate), "r"(cpsr), "r"(tmpsr) //
    : "r0","r1"
    );
 
    while(1) ;
}
 
 
void cpu_halt(void)
{
    machine_cpu_halt();
}
 
/** @}
 */
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

Rev 2341	Rev 2355
1	/*	1	/*
2	* Copyright (c) 2007 Michal Kebrt	2	* Copyright (c) 2007 Michal Kebrt
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup arm32	29	/** @addtogroup arm32
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35		35
36	#include <arch.h>	36	#include <arch.h>
37	#include <arch/boot.h>	37	#include <arch/boot.h>
38	#include <config.h>	38	#include <config.h>
39	#include <arch/console.h>	39	#include <arch/console.h>
40	#include <ddi/device.h>	40	#include <ddi/device.h>
41	#include <genarch/fb/fb.h>	41	#include <genarch/fb/fb.h>
42	#include <genarch/fb/visuals.h>	42	#include <genarch/fb/visuals.h>
43	#include <ddi/irq.h>	43	#include <ddi/irq.h>
44	#include <arch/debug/print.h>	44	#include <arch/debug/print.h>
45	#include <print.h>	45	#include <print.h>
46	#include <config.h>	46	#include <config.h>
47	#include <interrupt.h>	47	#include <interrupt.h>
48	#include <arch/regutils.h>	48	#include <arch/regutils.h>
49	#include <arch/machine.h>	49	#include <arch/machine.h>
50	#include <userspace.h>	50	#include <userspace.h>
51		51
52	bootinfo_t bootinfo;	52	bootinfo_t bootinfo;
53	// // uintptr_t supervisor_sp /__attribute__ ((section (".text")))/;	-
54	extern uintptr_t supervisor_sp;	53	extern uintptr_t supervisor_sp;
55		54
56		55
57	void arch_pre_main(void)	56	void arch_pre_main(void)
58	{	57	{
59	int i;	58	int i;
60		59
61	init.cnt = bootinfo.cnt;	60	init.cnt = bootinfo.cnt;
62		61
63	for (i = 0; i < bootinfo.cnt; ++i) {	62	for (i = 0; i < bootinfo.cnt; ++i) {
64	init.tasks[i].addr = bootinfo.tasks[i].addr;	63	init.tasks[i].addr = bootinfo.tasks[i].addr;
65	init.tasks[i].size = bootinfo.tasks[i].size;	64	init.tasks[i].size = bootinfo.tasks[i].size;
66	}	65	}
67		66
68	}	67	}
69		68
70		69
71	void arch_pre_mm_init(void)	70	void arch_pre_mm_init(void)
72	{	71	{
73	/* It is not assumed by default */	72	/* It is not assumed by default */
74	interrupts_disable();	73	interrupts_disable();
75		-
76	setup_exception_stacks();	-
77	}	74	}
78		75
79		76
80	void arch_post_mm_init(void)	77	void arch_post_mm_init(void)
81	{	78	{
82	machine_hw_map_init();	79	machine_hw_map_init();
83		80
84	/* Initialize dispatch table */	81	/* Initialize dispatch table */
85	exception_init();	82	exception_init();
86		83
87	interrupt_init();	84	interrupt_init();
88		85
89	console_init(device_assign_devno());	86	console_init(device_assign_devno());
90		87
91	//#ifdef CONFIG_FB	88	//#ifdef CONFIG_FB
92	// fb_init(machine_get_fb_address(), 640, 480, 1920, VISUAL_RGB_8_8_8);	89	// fb_init(machine_get_fb_address(), 640, 480, 1920, VISUAL_RGB_8_8_8);
93	//#endif	90	//#endif
94	}	91	}
95		92
96		93
97	void arch_post_cpu_init(void)	94	void arch_post_cpu_init(void)
98	{	95	{
99	}	96	}
100		97
101		98
102	void arch_pre_smp_init(void)	99	void arch_pre_smp_init(void)
103	{	100	{
104	/* TODO */	101	/* TODO */
105	}	102	}
106		103
107		104
108	void arch_post_smp_init(void)	105	void arch_post_smp_init(void)
109	{	106	{
110	/* TODO */	107	/* TODO */
111	}	108	}
112		109
113		110
114	/** Perform arm32 specific tasks needed before the new task is run. */	111	/** Perform arm32 specific tasks needed before the new task is run. */
115	void before_task_runs_arch(void)	112	void before_task_runs_arch(void)
116	{	113	{
117	tlb_invalidate_all();	114	tlb_invalidate_all();
118	}	115	}
119		116
120		117
121	/** Perform arm32 specific tasks needed before the new thread is scheduled. */	118	/** Perform arm32 specific tasks needed before the new thread is scheduled. */
122	void before_thread_runs_arch(void)	119	void before_thread_runs_arch(void)
123	{	120	{
124	supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];	121	supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
125	}	122	}
126		123
127		124
128	void after_thread_ran_arch(void)	125	void after_thread_ran_arch(void)
129	{	126	{
130	}	127	}
131		128
132		129
133	/** Struct to hold general purpose register values */	130	/** Struct to hold general purpose register values */
134	typedef struct {	131	typedef struct {
135	uint32_t r0;	132	uint32_t r0;
136	uint32_t r1;	133	uint32_t r1;
137	uint32_t r2;	134	uint32_t r2;
138	uint32_t r3;	135	uint32_t r3;
139	uint32_t r4;	136	uint32_t r4;
140	uint32_t r5;	137	uint32_t r5;
141	uint32_t r6;	138	uint32_t r6;
142	uint32_t r7;	139	uint32_t r7;
143	uint32_t r8;	140	uint32_t r8;
144	uint32_t r9;	141	uint32_t r9;
145	uint32_t r10;	142	uint32_t r10;
146	uint32_t r11;	143	uint32_t r11;
147	uint32_t r12;	144	uint32_t r12;
148	uint32_t sp;	145	uint32_t sp;
149	uint32_t lr;	146	uint32_t lr;
150	uint32_t pc;	147	uint32_t pc;
151	} ustate_t;	148	} ustate_t;
152		149
153		150
154	/** Changes processor mode and jumps to the address specified in the first parameter.	151	/** Changes processor mode and jumps to the address specified in the first parameter.
155	*	152	*
156	* @param kernel_uarg Userspace settings (entry point, stack, ...).	153	* @param kernel_uarg Userspace settings (entry point, stack, ...).
157	*/	154	*/
158	void userspace(uspace_arg_t *kernel_uarg)	155	void userspace(uspace_arg_t *kernel_uarg)
159	{	156	{
160	dprintf("Userspace: .uspace_uarg(%X), .uspace_entry(%X), .uspace_stack(%X)\n",	157	// dprintf("Userspace: .uspace_uarg(%X), .uspace_entry(%X), .uspace_stack(%X)\n",
161	(unsigned int)(kernel_uarg->uspace_uarg), kernel_uarg->uspace_entry,	158	// (unsigned int)(kernel_uarg->uspace_uarg), kernel_uarg->uspace_entry,
162	kernel_uarg->uspace_stack);	159	// kernel_uarg->uspace_stack);
163		160
164	volatile ustate_t ustate;	161	volatile ustate_t ustate;
165		162
166	// set first parameter	163	// set first parameter
167	ustate.r0 = (uintptr_t) kernel_uarg->uspace_uarg;	164	ustate.r0 = (uintptr_t) kernel_uarg->uspace_uarg;
168		165
169	// clear other registers	166	// clear other registers
170	ustate.r1 = ustate.r2 = ustate.r3 = ustate.r4 =	167	ustate.r1 = ustate.r2 = ustate.r3 = ustate.r4 =
171	ustate.r5 = ustate.r6 = ustate.r7 = ustate.r8 =	168	ustate.r5 = ustate.r6 = ustate.r7 = ustate.r8 =
172	ustate.r9 = ustate.r10 = ustate.r11 = ustate.r12 = 1;	169	ustate.r9 = ustate.r10 = ustate.r11 = ustate.r12 = 1;
173		170
174	ustate.lr = 3;	171	ustate.lr = 3;
175		172
176	//set user stack	173	//set user stack
177	ustate.sp = ((uint32_t)kernel_uarg->uspace_stack) +	174	ustate.sp = ((uint32_t)kernel_uarg->uspace_stack) +
178	PAGE_SIZE - sizeof(void*);	175	PAGE_SIZE - sizeof(void*);
179	//on the bottom of stack there is pointer to TLS	176	//on the bottom of stack there is pointer to TLS
180		177
181	//set where uspace execution starts	178	//set where uspace execution starts
182	ustate.pc = (uintptr_t) kernel_uarg->uspace_entry;	179	ustate.pc = (uintptr_t) kernel_uarg->uspace_entry;
183		180
184	//status register in user mode	181	//status register in user mode
185	ipl_t cpsr = current_status_reg_read();	182	ipl_t cpsr = current_status_reg_read();
186	cpsr &= ~STATUS_REG_MODE_MASK \| USER_MODE;	183	cpsr &= ~STATUS_REG_MODE_MASK \| USER_MODE;
187		184
188	ipl_t tmpsr = (cpsr & ~STATUS_REG_MODE_MASK) \| SUPERVISOR_MODE;	185	ipl_t tmpsr = (cpsr & ~STATUS_REG_MODE_MASK) \| SUPERVISOR_MODE;
189		186
190	asm __volatile__ (	187	asm __volatile__ (
191	// save pointer into ustate struct	188	// save pointer into ustate struct
192	"mov r0, %0 \n"	189	"mov r0, %0 \n"
193	// save cspr	190	// save cspr
194	"mov r1, %1 \n"	191	"mov r1, %1 \n"
195	// change mode into any exception mode	192	// change mode into any exception mode
196	"msr cpsr_c, %2 \n"	193	"msr cpsr_c, %2 \n"
197	// set saved cpsr	194	// set saved cpsr
198	"msr spsr_c, r1 \n"	195	"msr spsr_c, r1 \n"
199		196
200	"mov sp, r0 \n"	197	"mov sp, r0 \n"
201	// replace almost all registers	198	// replace almost all registers
202	"ldmfd sp!, {r0-r12, sp, lr}^\n"	199	"ldmfd sp!, {r0-r12, sp, lr}^\n"
203	//jump to the usermode	200	//jump to the usermode
204	"ldmfd sp!, {pc}^"	201	"ldmfd sp!, {pc}^"
205	: // no output	202	: // no output
206	: "r"(&ustate), "r"(cpsr), "r"(tmpsr) //	203	: "r"(&ustate), "r"(cpsr), "r"(tmpsr) //
207	: "r0","r1"	204	: "r0","r1"
208	);	205	);
209		206
210	while(1) ;	207	while(1) ;
211	}	208	}
212		209
213		210
214	void cpu_halt(void)	211	void cpu_halt(void)
215	{	212	{
216	machine_cpu_halt();	213	machine_cpu_halt();
217	}	214	}
218		215
219	/** @}	216	/** @}
220	*/	217	*/
221		218
222		219
223		220
224		221
225		222
226		223
227		224
228		225
229		226
230		227
231		228
232		229
233		230
234		231
235		232

Subversion Repositories HelenOS

(root)/branches/arm/kernel/arch/arm32/src/arm32.c – Rev 2341 → 2355