WebSVN – HelenOS – Diff – /branches/arm/kernel/arch/arm32/src/arm32.c


/*
 * Copyright (c) 2007 Michal Kebrt
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup arm32
 * @{
 */
/** @file
 */
 
 
#include <arch.h>
#include <arch/boot.h>
#include <config.h>
#include <arch/console.h>
#include <ddi/device.h>
#include <genarch/fb/fb.h>
#include <genarch/fb/visuals.h>
#include <ddi/irq.h>
 
#include <arch/debug_print/print.h>
#include <print.h>
#include <config.h>
#include <interrupt.h>
#include <arch/regutils.h>
#include <arch/machine.h>
#include <userspace.h>
 
bootinfo_t bootinfo;
// // uintptr_t supervisor_sp /*__attribute__ ((section (".text")))*/;
extern uintptr_t supervisor_sp;
 
void arch_pre_main(void)
{
    int i;
 
    init.cnt = bootinfo.cnt;
 
    for (i = 0; i < bootinfo.cnt; ++i) {
        init.tasks[i].addr = bootinfo.tasks[i].addr;
        init.tasks[i].size = bootinfo.tasks[i].size;
    }
   
}
 
void arch_pre_mm_init(void)
{
    /* It is not assumed by default */
    interrupts_disable();
 
    setup_exception_stacks();
 
}
 
void prefetch_exception_generator(void);
 
void arch_post_mm_init(void)
{
    machine_hw_map_init();
 
    /* Initialize dispatch table */
    exception_init();
 
    interrupt_init();
   
    console_init(device_assign_devno());
   
    //fb_init(0x12000000, 640, 480, 1920, VISUAL_RGB_8_8_8);
   
    interrupts_enable();
 
}
 
void arch_post_cpu_init(void)
{
    /* TODO */
}
 
void arch_pre_smp_init(void)
{
    /* TODO */
}
 
void arch_post_smp_init(void)
{
    /* TODO */
}
 
/** Perform arm32 specific tasks needed before the new task is run. */
void before_task_runs_arch(void)
{
        tlb_invalidate_all();
    /* TODO */
}
 
/** Perform arm32 specific tasks needed before the new thread is scheduled. */
void before_thread_runs_arch(void)
{
    supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
}
 
void after_thread_ran_arch(void)
{
    /* TODO */
}
 
/** Struct to hold general purpose register values */
typedef struct {
    uint32_t r0;
    uint32_t r1;
    uint32_t r2;
    uint32_t r3;
    uint32_t r4;
    uint32_t r5;
    uint32_t r6;
    uint32_t r7;
    uint32_t r8;
    uint32_t r9;
    uint32_t r10;
    uint32_t r11;
    uint32_t r12;
    uint32_t sp;
    uint32_t lr;
    uint32_t pc;
} ustate_t;
 
 
 
 
 
 
 
 
 
/** Changes processor mode and jumps to the address specified in the first parameter.
 *
 *  \param kernel_uarg   userspace settings (entry point, stack, ...)
 */
void userspace(uspace_arg_t *kernel_uarg)
{
    dprintf("Userspace:  .uspace_uarg(%X), .uspace_entry(%X), .uspace_stack(%X)\n",
        (unsigned int)(kernel_uarg->uspace_uarg), kernel_uarg->uspace_entry,
        kernel_uarg->uspace_stack);
 
    volatile ustate_t ustate;
 
    // set first parameter
    ustate.r0 = (uintptr_t) kernel_uarg->uspace_uarg;
 
    // clear other registers
    ustate.r1 = ustate.r2  = ustate.r3  = ustate.r4  =
        ustate.r5 = ustate.r6  = ustate.r7  = ustate.r8  =
        ustate.r9 = ustate.r10 = ustate.r11 = ustate.r12 = 1;
 
    ustate.lr = 3;
 
    //set user stack
    ustate.sp = ((uint32_t)kernel_uarg->uspace_stack) +
            PAGE_SIZE - sizeof(void*);
    //on the bottom of stack there is pointer to TLS
   
    //set where uspace execution starts
    ustate.pc = (uintptr_t) kernel_uarg->uspace_entry;
 
    //status register in user mode
    ipl_t cpsr = current_status_reg_read();
    cpsr &= ~STATUS_REG_MODE_MASK | USER_MODE;
   
    ipl_t tmpsr = (cpsr & ~STATUS_REG_MODE_MASK) | SUPERVISOR_MODE;
 
    asm __volatile__ (
        // save pointer into ustate struct
        "mov r0, %0         \n"
        // save cspr
        "mov r1, %1         \n"
        // change mode into any exception mode
        "msr cpsr_c, %2         \n"
        // set saved cpsr
        "msr spsr_c, r1 \n"
 
        "mov sp, r0 \n"
        // replace almost all registers
        "ldmfd sp!, {r0-r12, sp, lr}^\n"
        //jump to the usermode
        "ldmfd sp!, {pc}^"
    : // no output
    : "r"(&ustate), "r"(cpsr), "r"(tmpsr) //
    : "r0","r1"
    );
 
    while(1) ;
}
 
 
void cpu_halt(void)
{
    machine_cpu_halt();
}
 
/** @}
 */
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

Rev 2304	Rev 2318
1	/*	1	/*
2	* Copyright (c) 2007 Michal Kebrt	2	* Copyright (c) 2007 Michal Kebrt
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup arm32	29	/** @addtogroup arm32
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35		35
36	#include <arch.h>	36	#include <arch.h>
37	#include <arch/boot.h>	37	#include <arch/boot.h>
38	#include <config.h>	38	#include <config.h>
39	#include <arch/console.h>	39	#include <arch/console.h>
40	#include <ddi/device.h>	40	#include <ddi/device.h>
41	#include <genarch/fb/fb.h>	41	#include <genarch/fb/fb.h>
42	#include <genarch/fb/visuals.h>	42	#include <genarch/fb/visuals.h>
43	#include <ddi/irq.h>	43	#include <ddi/irq.h>
44		44
45	#include <arch/debug_print/print.h>	45	#include <arch/debug_print/print.h>
46	#include <print.h>	46	#include <print.h>
47	#include <config.h>	47	#include <config.h>
48	#include <interrupt.h>	48	#include <interrupt.h>
49	#include <arch/regutils.h>	49	#include <arch/regutils.h>
50	#include <arch/machine.h>	50	#include <arch/machine.h>
51	#include <userspace.h>	51	#include <userspace.h>
52		52
53	bootinfo_t bootinfo;	53	bootinfo_t bootinfo;
54	// // uintptr_t supervisor_sp /__attribute__ ((section (".text")))/;	54	// // uintptr_t supervisor_sp /__attribute__ ((section (".text")))/;
55	extern uintptr_t supervisor_sp;	55	extern uintptr_t supervisor_sp;
56		56
57	void arch_pre_main(void)	57	void arch_pre_main(void)
58	{	58	{
59	int i;	59	int i;
60		60
61	init.cnt = bootinfo.cnt;	61	init.cnt = bootinfo.cnt;
62		62
63	for (i = 0; i < bootinfo.cnt; ++i) {	63	for (i = 0; i < bootinfo.cnt; ++i) {
64	init.tasks[i].addr = bootinfo.tasks[i].addr;	64	init.tasks[i].addr = bootinfo.tasks[i].addr;
65	init.tasks[i].size = bootinfo.tasks[i].size;	65	init.tasks[i].size = bootinfo.tasks[i].size;
66	}	66	}
67		67
68	}	68	}
69		69
70	void arch_pre_mm_init(void)	70	void arch_pre_mm_init(void)
71	{	71	{
72	/* It is not assumed by default */	72	/* It is not assumed by default */
73	interrupts_disable();	73	interrupts_disable();
74		74
75	setup_exception_stacks();	75	setup_exception_stacks();
76		76
77	}	77	}
78		78
79	void prefetch_exception_generator(void);	79	void prefetch_exception_generator(void);
80		80
81	void arch_post_mm_init(void)	81	void arch_post_mm_init(void)
82	{	82	{
83	machine_hw_map_init();	83	machine_hw_map_init();
84		84
85	/* Initialize dispatch table */	85	/* Initialize dispatch table */
86	exception_init();	86	exception_init();
87		87
88	interrupt_init();	88	interrupt_init();
89		89
90	console_init(device_assign_devno());	90	console_init(device_assign_devno());
91		91
92	//fb_init(0x12000000, 640, 480, 1920, VISUAL_RGB_8_8_8);	92	//fb_init(0x12000000, 640, 480, 1920, VISUAL_RGB_8_8_8);
93		93
94	interrupts_enable();	94	interrupts_enable();
95		95
96	}	96	}
97		97
98	void arch_post_cpu_init(void)	98	void arch_post_cpu_init(void)
99	{	99	{
100	/* TODO */	100	/* TODO */
101	}	101	}
102		102
103	void arch_pre_smp_init(void)	103	void arch_pre_smp_init(void)
104	{	104	{
105	/* TODO */	105	/* TODO */
106	}	106	}
107		107
108	void arch_post_smp_init(void)	108	void arch_post_smp_init(void)
109	{	109	{
110	/* TODO */	110	/* TODO */
111	}	111	}
112		112
113	/** Perform arm32 specific tasks needed before the new task is run. */	113	/** Perform arm32 specific tasks needed before the new task is run. */
114	void before_task_runs_arch(void)	114	void before_task_runs_arch(void)
115	{	115	{
-		116	tlb_invalidate_all();
116	/* TODO */	117	/* TODO */
117	}	118	}
118		119
119	/** Perform arm32 specific tasks needed before the new thread is scheduled. */	120	/** Perform arm32 specific tasks needed before the new thread is scheduled. */
120	void before_thread_runs_arch(void)	121	void before_thread_runs_arch(void)
121	{	122	{
122	supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];	123	supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
123	}	124	}
124		125
125	void after_thread_ran_arch(void)	126	void after_thread_ran_arch(void)
126	{	127	{
127	/* TODO */	128	/* TODO */
128	}	129	}
129		130
130	/** Struct to hold general purpose register values */	131	/** Struct to hold general purpose register values */
131	typedef struct {	132	typedef struct {
132	uint32_t r0;	133	uint32_t r0;
133	uint32_t r1;	134	uint32_t r1;
134	uint32_t r2;	135	uint32_t r2;
135	uint32_t r3;	136	uint32_t r3;
136	uint32_t r4;	137	uint32_t r4;
137	uint32_t r5;	138	uint32_t r5;
138	uint32_t r6;	139	uint32_t r6;
139	uint32_t r7;	140	uint32_t r7;
140	uint32_t r8;	141	uint32_t r8;
141	uint32_t r9;	142	uint32_t r9;
142	uint32_t r10;	143	uint32_t r10;
143	uint32_t r11;	144	uint32_t r11;
144	uint32_t r12;	145	uint32_t r12;
145	uint32_t sp;	146	uint32_t sp;
146	uint32_t lr;	147	uint32_t lr;
147	uint32_t pc;	148	uint32_t pc;
148	} ustate_t;	149	} ustate_t;
149		150
150		151
151	void prefetch_exception_generator(void) {	-
152	asm __volatile__ (	-
153	"ldr pc, =0x7000000"	-
154	);	-
155		-
156	}	-
157		-
158	/** Changes processor mode and jumps to the address specified in the first parameter.	152	/** Changes processor mode and jumps to the address specified in the first parameter.
159	*	153	*
160	* \param kernel_uarg userspace settings (entry point, stack, ...)	154	* \param kernel_uarg userspace settings (entry point, stack, ...)
161	*/	155	*/
162	void userspace(uspace_arg_t *kernel_uarg)	156	void userspace(uspace_arg_t *kernel_uarg)
163	{	157	{
164	dprintf("Userspace: .uspace_uarg(%X), .uspace_entry(%X), .uspace_stack(%X)\n",	158	dprintf("Userspace: .uspace_uarg(%X), .uspace_entry(%X), .uspace_stack(%X)\n",
165	(unsigned int)(kernel_uarg->uspace_uarg), kernel_uarg->uspace_entry,	159	(unsigned int)(kernel_uarg->uspace_uarg), kernel_uarg->uspace_entry,
166	kernel_uarg->uspace_stack);	160	kernel_uarg->uspace_stack);
167		161
168	volatile ustate_t ustate;	162	volatile ustate_t ustate;
169		163
170	// set first parameter	164	// set first parameter
171	ustate.r0 = (uintptr_t) kernel_uarg->uspace_uarg;	165	ustate.r0 = (uintptr_t) kernel_uarg->uspace_uarg;
172		166
173	// clear other registers	167	// clear other registers
174	ustate.r1 = ustate.r2 = ustate.r3 = ustate.r4 =	168	ustate.r1 = ustate.r2 = ustate.r3 = ustate.r4 =
175	ustate.r5 = ustate.r6 = ustate.r7 = ustate.r8 =	169	ustate.r5 = ustate.r6 = ustate.r7 = ustate.r8 =
176	ustate.r9 = ustate.r10 = ustate.r11 = ustate.r12 = 1;	170	ustate.r9 = ustate.r10 = ustate.r11 = ustate.r12 = 1;
177		171
178	ustate.lr = 3;	172	ustate.lr = 3;
179		173
180	//set user stack	174	//set user stack
181	ustate.sp = ((uint32_t)kernel_uarg->uspace_stack) + PAGE_SIZE;	175	ustate.sp = ((uint32_t)kernel_uarg->uspace_stack) +
-		176	PAGE_SIZE - sizeof(void*);
-		177	//on the bottom of stack there is pointer to TLS
182		178
183	//set where uspace execution starts	179	//set where uspace execution starts
184	ustate.pc = (uintptr_t) kernel_uarg->uspace_entry;	180	ustate.pc = (uintptr_t) kernel_uarg->uspace_entry;
185		181
186	//status register in user mode	182	//status register in user mode
187	ipl_t cpsr = current_status_reg_read();	183	ipl_t cpsr = current_status_reg_read();
188	cpsr &= ~STATUS_REG_MODE_MASK \| USER_MODE;	184	cpsr &= ~STATUS_REG_MODE_MASK \| USER_MODE;
189		185
190	ipl_t tmpsr = (cpsr & ~STATUS_REG_MODE_MASK) \| SUPERVISOR_MODE;	186	ipl_t tmpsr = (cpsr & ~STATUS_REG_MODE_MASK) \| SUPERVISOR_MODE;
191		187
192	asm __volatile__ (	188	asm __volatile__ (
193	// save pointer into ustate struct	189	// save pointer into ustate struct
194	"mov r0, %0 \n"	190	"mov r0, %0 \n"
195	// save cspr	191	// save cspr
196	"mov r1, %1 \n"	192	"mov r1, %1 \n"
197	// change mode into any exception mode	193	// change mode into any exception mode
198	"msr cpsr_c, %2 \n"	194	"msr cpsr_c, %2 \n"
199	// set saved cpsr	195	// set saved cpsr
200	"msr spsr_c, r1 \n"	196	"msr spsr_c, r1 \n"
201		197
202	"mov sp, r0 \n"	198	"mov sp, r0 \n"
203	// replace almost all registers	199	// replace almost all registers
204	"ldmfd sp!, {r0-r12, sp, lr}^\n"	200	"ldmfd sp!, {r0-r12, sp, lr}^\n"
205	//jump to the usermode	201	//jump to the usermode
206	"ldmfd sp!, {pc}^"	202	"ldmfd sp!, {pc}^"
207	: // no output	203	: // no output
208	: "r"(&ustate), "r"(cpsr), "r"(tmpsr) //	204	: "r"(&ustate), "r"(cpsr), "r"(tmpsr) //
209	: "r0","r1"	205	: "r0","r1"
210	);	206	);
211		207
212	while(1) ;	208	while(1) ;
213	}	209	}
214		210
215		211
216	void cpu_halt(void)	212	void cpu_halt(void)
217	{	213	{
218	machine_cpu_halt();	214	machine_cpu_halt();
219	}	215	}
220		216
221	/** @}	217	/** @}
222	*/	218	*/
223		219
224		220
225		221
226		222
227		223
228		224
229		225
230		226
231		227
232		228
233		229
234		230
235		231
236		232
237		233

Subversion Repositories HelenOS

(root)/branches/arm/kernel/arch/arm32/src/arm32.c – Rev 2304 → 2318