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/*
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/*
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 * Copyright (c) 2007 Michal Kebrt
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 * Copyright (c) 2007 Michal Kebrt
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 * All rights reserved.
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 * All rights reserved.
4
 *
4
 *
5
 * Redistribution and use in source and binary forms, with or without
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 * Redistribution and use in source and binary forms, with or without
6
 * modification, are permitted provided that the following conditions
6
 * modification, are permitted provided that the following conditions
7
 * are met:
7
 * are met:
8
 *
8
 *
9
 * - Redistributions of source code must retain the above copyright
9
 * - Redistributions of source code must retain the above copyright
10
 *   notice, this list of conditions and the following disclaimer.
10
 *   notice, this list of conditions and the following disclaimer.
11
 * - Redistributions in binary form must reproduce the above copyright
11
 * - Redistributions in binary form must reproduce the above copyright
12
 *   notice, this list of conditions and the following disclaimer in the
12
 *   notice, this list of conditions and the following disclaimer in the
13
 *   documentation and/or other materials provided with the distribution.
13
 *   documentation and/or other materials provided with the distribution.
14
 * - The name of the author may not be used to endorse or promote products
14
 * - The name of the author may not be used to endorse or promote products
15
 *   derived from this software without specific prior written permission.
15
 *   derived from this software without specific prior written permission.
16
 *
16
 *
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
 */
27
 */
28
 
28
 
29
/** @addtogroup arm32
29
/** @addtogroup arm32
30
 * @{
30
 * @{
31
 */
31
 */
32
/** @file
32
/** @file
33
 */
33
 */
34
 
34
 
35
 
35
 
36
#include <arch.h>
36
#include <arch.h>
37
#include <arch/boot.h>
37
#include <arch/boot.h>
38
#include <config.h>
38
#include <config.h>
39
#include <arch/console.h>
39
#include <arch/console.h>
40
#include <ddi/device.h>
40
#include <ddi/device.h>
41
#include <genarch/fb/fb.h>
41
#include <genarch/fb/fb.h>
42
#include <genarch/fb/visuals.h>
42
#include <genarch/fb/visuals.h>
43
#include <ddi/irq.h>
43
#include <ddi/irq.h>
44
 
44
 
45
#include <arch/debug_print/print.h>
45
#include <arch/debug_print/print.h>
46
#include <print.h>
46
#include <print.h>
47
#include <config.h>
47
#include <config.h>
48
#include <interrupt.h>
48
#include <interrupt.h>
49
#include <arch/regutils.h>
49
#include <arch/regutils.h>
50
#include <arch/machine.h>
50
#include <arch/machine.h>
51
#include <userspace.h>
51
#include <userspace.h>
52
 
52
 
53
bootinfo_t bootinfo;
53
bootinfo_t bootinfo;
54
// // uintptr_t supervisor_sp /*__attribute__ ((section (".text")))*/;
54
// // uintptr_t supervisor_sp /*__attribute__ ((section (".text")))*/;
55
extern uintptr_t supervisor_sp;
55
extern uintptr_t supervisor_sp;
56
 
56
 
57
//TODO: Remove include and move into exceptio.c
-
 
58
#include <arch/exception.h>
-
 
59
 
-
 
60
#include <syscall/syscall.h>
-
 
61
void tmp_swi_exception(int exc_no, istate_t* istate);
-
 
62
void tmp_swi_exception(int exc_no, istate_t* istate)
-
 
63
{
-
 
64
    ASSERT(exc_no == EXC_SWI);
-
 
65
    ASSERT(istate);
-
 
66
    // TODO: Alf ... remove aftet swi_exception is tested
-
 
67
    dprintf("\nSWI - istate dump input :\n");
-
 
68
    dprintf("    r0:%X    r1:%X    r2:%X    r3:%X\n", istate->r0,  istate->r1, istate->r2,  istate->r3);
-
 
69
    dprintf("    r4:%X    r5:%X    r6:%X    r7:%X\n", istate->r4,  istate->r5, istate->r6,  istate->r7);
-
 
70
    dprintf("    r8:%X    r8:%X   r10:%X   r11:%X\n", istate->r8,  istate->r9, istate->r10, istate->r11);
-
 
71
    dprintf("   r12:%X    r13:%X    lr:%X  spsr:%X\n", istate->r12, istate->sp, istate->lr,  istate->spsr);
-
 
72
//  dprintf("   prev_lr:%X    prev_sp:%X\n", istate->r12, istate->prev_lr, istate->prev_sp);
-
 
73
    // call kernel to serve syscall
-
 
74
    istate->r0 = syscall_handler(
-
 
75
        istate->r0,
-
 
76
        istate->r1,
-
 
77
        istate->r2,
-
 
78
        istate->r3,
-
 
79
        istate->r4);
-
 
80
 
-
 
81
    // TODO: Alf ... remove aftet swi_exception is tested
-
 
82
    dprintf("\nSWI - Istate dump after :\n");
-
 
83
    dprintf("    r0:%X    r1:%X    r2:%X    r3:%X\n", istate->r0,  istate->r1, istate->r2,  istate->r3);
-
 
84
    dprintf("    r4:%X    r5:%X    r6:%X    r7:%X\n", istate->r4,  istate->r5, istate->r6,  istate->r7);
-
 
85
    dprintf("    r8:%X    r8:%X   r10:%X   r11:%X\n", istate->r8,  istate->r9, istate->r10, istate->r11);
-
 
86
    dprintf("   r12:%X    r13:%X    lr:%X  spsr:%X\n", istate->r12, istate->sp, istate->lr,  istate->spsr);
-
 
87
//  dprintf("   prev_lr:%X    prev_sp:%X\n", istate->r12, istate->prev_lr, istate->prev_sp);
-
 
88
}
-
 
89
 
-
 
90
 
-
 
91
void arch_pre_main(void)
57
void arch_pre_main(void)
92
{
58
{
93
    int i;
59
    int i;
94
 
60
 
95
    init.cnt = bootinfo.cnt;
61
    init.cnt = bootinfo.cnt;
96
 
62
 
97
    for (i = 0; i < bootinfo.cnt; ++i) {
63
    for (i = 0; i < bootinfo.cnt; ++i) {
98
        init.tasks[i].addr = bootinfo.tasks[i].addr;
64
        init.tasks[i].addr = bootinfo.tasks[i].addr;
99
        init.tasks[i].size = bootinfo.tasks[i].size;
65
        init.tasks[i].size = bootinfo.tasks[i].size;
100
    }
66
    }
101
   
67
   
102
}
68
}
103
 
69
 
104
void arch_pre_mm_init(void)
70
void arch_pre_mm_init(void)
105
{
71
{
106
    /* It is not assumed by default */
72
    /* It is not assumed by default */
107
    interrupts_disable();
73
    interrupts_disable();
108
 
74
 
109
    setup_exception_stacks();
75
    setup_exception_stacks();
110
 
76
 
111
}
77
}
112
 
78
 
113
void prefetch_exception_generator(void);
79
void prefetch_exception_generator(void);
114
 
80
 
115
void arch_post_mm_init(void)
81
void arch_post_mm_init(void)
116
{
82
{
117
    machine_hw_map_init();
83
    machine_hw_map_init();
118
 
84
 
119
    /* Initialize dispatch table */
85
    /* Initialize dispatch table */
120
    exception_init();
86
    exception_init();
121
 
87
 
122
    interrupt_init();
88
    interrupt_init();
123
   
89
   
124
    console_init(device_assign_devno());
90
    console_init(device_assign_devno());
125
   
91
   
126
    //fb_init(0x12000000, 640, 480, 1920, VISUAL_RGB_8_8_8);
92
    //fb_init(0x12000000, 640, 480, 1920, VISUAL_RGB_8_8_8);
127
   
93
   
128
    interrupts_enable();
94
    interrupts_enable();
-
 
95
 
129
}
96
}
130
 
97
 
131
void arch_post_cpu_init(void)
98
void arch_post_cpu_init(void)
132
{
99
{
133
    /* TODO */
100
    /* TODO */
134
}
101
}
135
 
102
 
136
void arch_pre_smp_init(void)
103
void arch_pre_smp_init(void)
137
{
104
{
138
    /* TODO */
105
    /* TODO */
139
}
106
}
140
 
107
 
141
void arch_post_smp_init(void)
108
void arch_post_smp_init(void)
142
{
109
{
143
    /* TODO */
110
    /* TODO */
144
}
111
}
145
 
112
 
146
/** Perform arm32 specific tasks needed before the new task is run. */
113
/** Perform arm32 specific tasks needed before the new task is run. */
147
void before_task_runs_arch(void)
114
void before_task_runs_arch(void)
148
{
115
{
149
    /* TODO */
116
    /* TODO */
150
}
117
}
151
 
118
 
152
/** Perform arm32 specific tasks needed before the new thread is scheduled. */
119
/** Perform arm32 specific tasks needed before the new thread is scheduled. */
153
void before_thread_runs_arch(void)
120
void before_thread_runs_arch(void)
154
{
121
{
155
    supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
122
    supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE-SP_DELTA];
156
}
123
}
157
 
124
 
158
void after_thread_ran_arch(void)
125
void after_thread_ran_arch(void)
159
{
126
{
160
    /* TODO */
127
    /* TODO */
161
}
128
}
162
 
129
 
163
/** Struct to hold general purpose register values */
130
/** Struct to hold general purpose register values */
164
typedef struct {
131
typedef struct {
165
    uint32_t r0;
132
    uint32_t r0;
166
    uint32_t r1;
133
    uint32_t r1;
167
    uint32_t r2;
134
    uint32_t r2;
168
    uint32_t r3;
135
    uint32_t r3;
169
    uint32_t r4;
136
    uint32_t r4;
170
    uint32_t r5;
137
    uint32_t r5;
171
    uint32_t r6;
138
    uint32_t r6;
172
    uint32_t r7;
139
    uint32_t r7;
173
    uint32_t r8;
140
    uint32_t r8;
174
    uint32_t r9;
141
    uint32_t r9;
175
    uint32_t r10;
142
    uint32_t r10;
176
    uint32_t r11;
143
    uint32_t r11;
177
    uint32_t r12;
144
    uint32_t r12;
178
    uint32_t sp;
145
    uint32_t sp;
179
    uint32_t lr;
146
    uint32_t lr;
180
    uint32_t pc;
147
    uint32_t pc;
181
} ustate_t;
148
} ustate_t;
182
 
149
 
183
 
150
 
184
void prefetch_exception_generator(void)  {
151
void prefetch_exception_generator(void)  {
185
 asm __volatile__ (
152
 asm __volatile__ (
186
    "ldr pc, =0x7000000"
153
    "ldr pc, =0x7000000"
187
 );
154
 );
188
 
155
 
189
}
156
}
190
 
157
 
191
/** Change processor mode and jump into addres specified in
158
/** Changes processor mode and jumps to the address specified in the first parameter.
192
 *  kernel_uarg.uspace_entry
159
 *
193
 * \param kernel_uarg information needed for correct setting of userspace
160
 *  \param kernel_uarg   userspace settings (entry point, stack, ...)
194
 */
161
 */
195
void userspace(uspace_arg_t *kernel_uarg)
162
void userspace(uspace_arg_t *kernel_uarg)
196
{
163
{
197
    dprintf("userspace\n");
-
 
198
 
-
 
199
    dprintf("userspce krnl_uard  .uspace_uarg(%X), .uspace_entry(%X), .uspace_stack(%X)\n",
164
    dprintf("Userspace:  .uspace_uarg(%X), .uspace_entry(%X), .uspace_stack(%X)\n",
200
      (unsigned int)(kernel_uarg->uspace_uarg),
165
        (unsigned int)(kernel_uarg->uspace_uarg), kernel_uarg->uspace_entry,
201
      kernel_uarg->uspace_entry,
-
 
202
      kernel_uarg->uspace_stack);
166
        kernel_uarg->uspace_stack);
203
 
167
 
204
        volatile ustate_t ustate;
168
    volatile ustate_t ustate;
205
 
169
 
206
    //Step 1 ... prepare user space environment
-
 
207
    //set first paramater
170
    // set first parameter
208
    ustate.r0 = (uintptr_t) kernel_uarg->uspace_uarg;
171
    ustate.r0 = (uintptr_t) kernel_uarg->uspace_uarg;
209
 
172
 
210
    //clear other registers
173
    // clear other registers
211
    ustate.r1 = ustate.r2  = ustate.r3  = ustate.r4  =
174
    ustate.r1 = ustate.r2  = ustate.r3  = ustate.r4  =
212
        ustate.r5 = ustate.r6  = ustate.r7  = ustate.r8  =
175
        ustate.r5 = ustate.r6  = ustate.r7  = ustate.r8  =
213
        ustate.r9 = ustate.r10 = ustate.r11 = ustate.r12 = 1;
176
        ustate.r9 = ustate.r10 = ustate.r11 = ustate.r12 = 1;
214
        ustate.lr = 3;
-
 
215
 
177
 
216
    //set user stack
178
    ustate.lr = 3;
217
        ustate.sp = ((uint32_t)kernel_uarg->uspace_stack)+PAGE_SIZE;
-
 
218
 
179
 
219
    //set where uspace executin starts
180
    //set user stack
220
        ustate.pc = (uintptr_t) kernel_uarg->uspace_entry;
181
    ustate.sp = ((uint32_t)kernel_uarg->uspace_stack) + PAGE_SIZE;
221
 
182
 
-
 
183
    //set where uspace execution starts
-
 
184
    ustate.pc = (uintptr_t) kernel_uarg->uspace_entry;
222
 
185
 
223
    //status register in user mode
186
    //status register in user mode
224
    ipl_t cpsr = current_status_reg_read();
187
    ipl_t cpsr = current_status_reg_read();
225
        cpsr &= ~STATUS_REG_MODE_MASK | USER_MODE;
188
    cpsr &= ~STATUS_REG_MODE_MASK | USER_MODE;
226
   
189
   
227
    ipl_t tmpsr = (cpsr & ~STATUS_REG_MODE_MASK) | SUPERVISOR_MODE;
190
    ipl_t tmpsr = (cpsr & ~STATUS_REG_MODE_MASK) | SUPERVISOR_MODE;
228
 
191
 
229
    asm __volatile__ (
192
    asm __volatile__ (
230
        // save pointer into ustate struct
193
        // save pointer into ustate struct
231
        "mov r0, %0         \n"
194
        "mov r0, %0         \n"
232
        // save cspr
195
        // save cspr
233
        "mov r1, %1         \n"
196
        "mov r1, %1         \n"
234
        // change mode into any exception mode
197
        // change mode into any exception mode
235
        "msr cpsr_c, %2         \n"
198
        "msr cpsr_c, %2         \n"
236
        // set saved cpsr
199
        // set saved cpsr
237
        "msr spsr_c, r1 \n"
200
        "msr spsr_c, r1 \n"
238
 
201
 
239
        "mov sp, r0 \n"
202
        "mov sp, r0 \n"
240
        // replace almost all registers
203
        // replace almost all registers
241
        "ldmfd sp!, {r0-r12, sp, lr}^\n"
204
        "ldmfd sp!, {r0-r12, sp, lr}^\n"
242
        //jump to the usermode
205
        //jump to the usermode
243
        "ldmfd sp!, {pc}^"
206
        "ldmfd sp!, {pc}^"
244
    : // no output
207
    : // no output
245
    : "r"(&ustate), "r"(cpsr), "r"(tmpsr) //
208
    : "r"(&ustate), "r"(cpsr), "r"(tmpsr) //
246
    : "r0","r1"
209
    : "r0","r1"
247
    );
210
    );
248
 
211
 
249
    while(1) ;
212
    while(1) ;
250
}
213
}
251
 
214
 
252
 
215
 
253
void cpu_halt(void)
216
void cpu_halt(void)
254
{
217
{
255
    machine_cpu_halt();
218
    machine_cpu_halt();
256
}
219
}
257
 
220
 
258
/** @}
221
/** @}
259
 */
222
 */
260
 
223
 
261
 
224
 
262
 
225
 
263
 
226
 
264
 
227
 
265
 
228
 
266
 
229
 
267
 
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231
 
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232
 
270
 
233
 
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