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1 | /* |
1 | /* |
2 | * Copyright (c) 2007 Michal Kebrt |
2 | * Copyright (c) 2007 Michal Kebrt |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup arm32 |
29 | /** @addtogroup arm32 |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | 35 | ||
36 | #include <arch.h> |
36 | #include <arch.h> |
37 | #include <arch/boot.h> |
37 | #include <arch/boot.h> |
38 | #include <config.h> |
38 | #include <config.h> |
39 | #include <arch/console.h> |
39 | #include <arch/console.h> |
40 | #include <ddi/device.h> |
40 | #include <ddi/device.h> |
41 | #include <genarch/fb/fb.h> |
41 | #include <genarch/fb/fb.h> |
42 | #include <genarch/fb/visuals.h> |
42 | #include <genarch/fb/visuals.h> |
43 | #include <ddi/irq.h> |
43 | #include <ddi/irq.h> |
44 | 44 | ||
45 | #include <arch/debug_print/print.h> |
45 | #include <arch/debug_print/print.h> |
46 | #include <print.h> |
46 | #include <print.h> |
47 | #include <config.h> |
47 | #include <config.h> |
48 | #include <interrupt.h> |
48 | #include <interrupt.h> |
49 | #include <arch/regutils.h> |
49 | #include <arch/regutils.h> |
50 | #include <arch/drivers/gxemul.h> |
50 | #include <arch/drivers/gxemul.h> |
51 | #include <userspace.h> |
51 | #include <userspace.h> |
52 | 52 | ||
53 | bootinfo_t bootinfo; |
53 | bootinfo_t bootinfo; |
54 | // // uintptr_t supervisor_sp /*__attribute__ ((section (".text")))*/; |
54 | // // uintptr_t supervisor_sp /*__attribute__ ((section (".text")))*/; |
55 | extern uintptr_t supervisor_sp; |
55 | extern uintptr_t supervisor_sp; |
56 | 56 | ||
57 | //TODO: Remove include and move into exceptio.c |
57 | //TODO: Remove include and move into exceptio.c |
58 | #include <arch/exception.h> |
58 | #include <arch/exception.h> |
59 | 59 | ||
60 | #include <syscall/syscall.h> |
60 | #include <syscall/syscall.h> |
61 | void tmp_swi_exception(int exc_no, istate_t* istate); |
61 | void tmp_swi_exception(int exc_no, istate_t* istate); |
62 | void tmp_swi_exception(int exc_no, istate_t* istate) |
62 | void tmp_swi_exception(int exc_no, istate_t* istate) |
63 | { |
63 | { |
64 | ASSERT(exc_no == EXC_SWI); |
64 | ASSERT(exc_no == EXC_SWI); |
65 | ASSERT(istate); |
65 | ASSERT(istate); |
66 | // TODO: Alf ... remove aftet swi_exception is tested |
66 | // TODO: Alf ... remove aftet swi_exception is tested |
67 | dprintf("\nSWI - istate dump input :\n"); |
67 | dprintf("\nSWI - istate dump input :\n"); |
68 | dprintf(" r0:%X r1:%X r2:%X r3:%X\n", istate->r0, istate->r1, istate->r2, istate->r3); |
68 | dprintf(" r0:%X r1:%X r2:%X r3:%X\n", istate->r0, istate->r1, istate->r2, istate->r3); |
69 | dprintf(" r4:%X r5:%X r6:%X r7:%X\n", istate->r4, istate->r5, istate->r6, istate->r7); |
69 | dprintf(" r4:%X r5:%X r6:%X r7:%X\n", istate->r4, istate->r5, istate->r6, istate->r7); |
70 | dprintf(" r8:%X r8:%X r10:%X r11:%X\n", istate->r8, istate->r9, istate->r10, istate->r11); |
70 | dprintf(" r8:%X r8:%X r10:%X r11:%X\n", istate->r8, istate->r9, istate->r10, istate->r11); |
71 | dprintf(" r12:%X r13:%X lr:%X spsr:%X\n", istate->r12, istate->sp, istate->lr, istate->spsr); |
71 | dprintf(" r12:%X r13:%X lr:%X spsr:%X\n", istate->r12, istate->sp, istate->lr, istate->spsr); |
72 | // dprintf(" prev_lr:%X prev_sp:%X\n", istate->r12, istate->prev_lr, istate->prev_sp); |
72 | // dprintf(" prev_lr:%X prev_sp:%X\n", istate->r12, istate->prev_lr, istate->prev_sp); |
73 | // call kernel to serve syscall |
73 | // call kernel to serve syscall |
74 | istate->r0 = syscall_handler( |
74 | istate->r0 = syscall_handler( |
75 | istate->r0, |
75 | istate->r0, |
76 | istate->r1, |
76 | istate->r1, |
77 | istate->r2, |
77 | istate->r2, |
78 | istate->r3, |
78 | istate->r3, |
79 | istate->r4); |
79 | istate->r4); |
80 | 80 | ||
81 | // TODO: Alf ... remove aftet swi_exception is tested |
81 | // TODO: Alf ... remove aftet swi_exception is tested |
82 | dprintf("\nSWI - Istate dump after :\n"); |
82 | dprintf("\nSWI - Istate dump after :\n"); |
83 | dprintf(" r0:%X r1:%X r2:%X r3:%X\n", istate->r0, istate->r1, istate->r2, istate->r3); |
83 | dprintf(" r0:%X r1:%X r2:%X r3:%X\n", istate->r0, istate->r1, istate->r2, istate->r3); |
84 | dprintf(" r4:%X r5:%X r6:%X r7:%X\n", istate->r4, istate->r5, istate->r6, istate->r7); |
84 | dprintf(" r4:%X r5:%X r6:%X r7:%X\n", istate->r4, istate->r5, istate->r6, istate->r7); |
85 | dprintf(" r8:%X r8:%X r10:%X r11:%X\n", istate->r8, istate->r9, istate->r10, istate->r11); |
85 | dprintf(" r8:%X r8:%X r10:%X r11:%X\n", istate->r8, istate->r9, istate->r10, istate->r11); |
86 | dprintf(" r12:%X r13:%X lr:%X spsr:%X\n", istate->r12, istate->sp, istate->lr, istate->spsr); |
86 | dprintf(" r12:%X r13:%X lr:%X spsr:%X\n", istate->r12, istate->sp, istate->lr, istate->spsr); |
87 | // dprintf(" prev_lr:%X prev_sp:%X\n", istate->r12, istate->prev_lr, istate->prev_sp); |
87 | // dprintf(" prev_lr:%X prev_sp:%X\n", istate->r12, istate->prev_lr, istate->prev_sp); |
88 | } |
88 | } |
89 | 89 | ||
90 | 90 | ||
91 | void arch_pre_main(void) |
91 | void arch_pre_main(void) |
92 | { |
92 | { |
93 | dprintf("arch_pre_main\n"); |
- | |
94 | int i; |
93 | int i; |
95 | 94 | ||
96 | init.cnt = bootinfo.cnt; |
95 | init.cnt = bootinfo.cnt; |
97 | 96 | ||
98 | for (i = 0; i < bootinfo.cnt; ++i) { |
97 | for (i = 0; i < bootinfo.cnt; ++i) { |
99 | init.tasks[i].addr = bootinfo.tasks[i].addr; |
98 | init.tasks[i].addr = bootinfo.tasks[i].addr; |
100 | init.tasks[i].size = bootinfo.tasks[i].size; |
99 | init.tasks[i].size = bootinfo.tasks[i].size; |
101 | } |
100 | } |
102 | } |
101 | } |
103 | 102 | ||
104 | void arch_pre_mm_init(void) |
103 | void arch_pre_mm_init(void) |
105 | { |
104 | { |
106 | dprintf("arch_pre_mm_init\n"); |
- | |
107 | - | ||
108 | /* It is not assumed by default */ |
105 | /* It is not assumed by default */ |
109 | interrupts_disable(); |
106 | interrupts_disable(); |
110 | 107 | ||
111 | setup_exception_stacks(); |
108 | setup_exception_stacks(); |
112 | } |
109 | } |
113 | 110 | ||
114 | void prefetch_exception_generator(void); |
111 | void prefetch_exception_generator(void); |
115 | 112 | ||
116 | void arch_post_mm_init(void) |
113 | void arch_post_mm_init(void) |
117 | { |
114 | { |
118 | // dprintf("arch_post_mm_init start()\n"); |
- | |
119 | gxemul_hw_map_init(); |
115 | gxemul_hw_map_init(); |
120 | 116 | ||
121 | /* Initialize dispatch table */ |
117 | /* Initialize dispatch table */ |
122 | exception_init(); |
118 | exception_init(); |
123 | 119 | ||
124 | // drivers_init(); |
- | |
125 | interrupt_init(); |
120 | interrupt_init(); |
126 | 121 | ||
127 | console_init(device_assign_devno()); |
122 | console_init(device_assign_devno()); |
- | 123 | ||
128 | //fb_init(0x12000000, 640, 480, 1920, VISUAL_RGB_8_8_8); |
124 | //fb_init(0x12000000, 640, 480, 1920, VISUAL_RGB_8_8_8); |
129 | 125 | ||
130 | interrupts_enable(); |
126 | interrupts_enable(); |
131 | dprintf("arch_post_mm_init end()\n"); |
- | |
132 | - | ||
133 | } |
127 | } |
134 | 128 | ||
135 | void arch_post_cpu_init(void) |
129 | void arch_post_cpu_init(void) |
136 | { |
130 | { |
137 | /* TODO */ |
131 | /* TODO */ |
138 | } |
132 | } |
139 | 133 | ||
140 | void arch_pre_smp_init(void) |
134 | void arch_pre_smp_init(void) |
141 | { |
135 | { |
142 | /* TODO */ |
136 | /* TODO */ |
143 | } |
137 | } |
144 | 138 | ||
145 | void arch_post_smp_init(void) |
139 | void arch_post_smp_init(void) |
146 | { |
140 | { |
147 | /* TODO */ |
141 | /* TODO */ |
148 | } |
142 | } |
149 | 143 | ||
150 | /** Perform arm32 specific tasks needed before the new task is run. */ |
144 | /** Perform arm32 specific tasks needed before the new task is run. */ |
151 | void before_task_runs_arch(void) |
145 | void before_task_runs_arch(void) |
152 | { |
146 | { |
153 | /* TODO */ |
147 | /* TODO */ |
154 | } |
148 | } |
155 | 149 | ||
156 | /** Perform arm32 specific tasks needed before the new thread is scheduled. */ |
150 | /** Perform arm32 specific tasks needed before the new thread is scheduled. */ |
157 | void before_thread_runs_arch(void) |
151 | void before_thread_runs_arch(void) |
158 | { |
152 | { |
159 | supervisor_sp = (uintptr_t) &THREAD->kstack/*[THREAD_STACK_SIZE-SP_DELTA]*/; |
153 | supervisor_sp = (uintptr_t) &THREAD->kstack/*[THREAD_STACK_SIZE-SP_DELTA]*/; |
160 | } |
154 | } |
161 | 155 | ||
162 | void after_thread_ran_arch(void) |
156 | void after_thread_ran_arch(void) |
163 | { |
157 | { |
164 | /* TODO */ |
158 | /* TODO */ |
165 | } |
159 | } |
166 | 160 | ||
167 | /** Struct to hold general purpose register values */ |
161 | /** Struct to hold general purpose register values */ |
168 | typedef struct { |
162 | typedef struct { |
169 | uint32_t r0; |
163 | uint32_t r0; |
170 | uint32_t r1; |
164 | uint32_t r1; |
171 | uint32_t r2; |
165 | uint32_t r2; |
172 | uint32_t r3; |
166 | uint32_t r3; |
173 | uint32_t r4; |
167 | uint32_t r4; |
174 | uint32_t r5; |
168 | uint32_t r5; |
175 | uint32_t r6; |
169 | uint32_t r6; |
176 | uint32_t r7; |
170 | uint32_t r7; |
177 | uint32_t r8; |
171 | uint32_t r8; |
178 | uint32_t r9; |
172 | uint32_t r9; |
179 | uint32_t r10; |
173 | uint32_t r10; |
180 | uint32_t r11; |
174 | uint32_t r11; |
181 | uint32_t r12; |
175 | uint32_t r12; |
182 | uint32_t sp; |
176 | uint32_t sp; |
183 | uint32_t lr; |
177 | uint32_t lr; |
184 | uint32_t pc; |
178 | uint32_t pc; |
185 | } ustate_t; |
179 | } ustate_t; |
186 | 180 | ||
187 | 181 | ||
188 | void prefetch_exception_generator(void) { |
182 | void prefetch_exception_generator(void) { |
189 | asm __volatile__ ( |
183 | asm __volatile__ ( |
190 | "ldr pc, =0x7000000" |
184 | "ldr pc, =0x7000000" |
191 | ); |
185 | ); |
192 | 186 | ||
193 | } |
187 | } |
194 | 188 | ||
195 | /** Change processor mode and jump into addres specified in |
189 | /** Change processor mode and jump into addres specified in |
196 | * kernel_uarg.uspace_entry |
190 | * kernel_uarg.uspace_entry |
197 | * \param kernel_uarg information needed for correct setting of userspace |
191 | * \param kernel_uarg information needed for correct setting of userspace |
198 | */ |
192 | */ |
199 | void userspace(uspace_arg_t *kernel_uarg) |
193 | void userspace(uspace_arg_t *kernel_uarg) |
200 | { |
194 | { |
201 | // WILL be changed .. after exception return .. eret will be done |
195 | // WILL be changed .. after exception return .. eret will be done |
202 | /* |
196 | /* |
203 | volatile ustate_t ustate; |
197 | volatile ustate_t ustate; |
204 | dprintf("userspce krnl_uard .uspace_uarg(%X), .uspace_entry(%X), .uspace_stack(%X)\n", |
198 | dprintf("userspce krnl_uard .uspace_uarg(%X), .uspace_entry(%X), .uspace_stack(%X)\n", |
205 | (unsigned int)(kernel_uarg->uspace_uarg), |
199 | (unsigned int)(kernel_uarg->uspace_uarg), |
206 | kernel_uarg->uspace_entry, |
200 | kernel_uarg->uspace_entry, |
207 | kernel_uarg->uspace_stack); |
201 | kernel_uarg->uspace_stack); |
208 | // Step 1 ... prepare user space environmen |
202 | // Step 1 ... prepare user space environmen |
209 | // set first paramater |
203 | // set first paramater |
210 | ustate.r0 = (uintptr_t) kernel_uarg->uspace_uarg; |
204 | ustate.r0 = (uintptr_t) kernel_uarg->uspace_uarg; |
211 | // clear other registers |
205 | // clear other registers |
212 | ustate.r1 = ustate.r2 = ustate.r3 = ustate.r4 = |
206 | ustate.r1 = ustate.r2 = ustate.r3 = ustate.r4 = |
213 | ustate.r5 = ustate.r6 = ustate.r7 = ustate.r8 = |
207 | ustate.r5 = ustate.r6 = ustate.r7 = ustate.r8 = |
214 | ustate.r9 = ustate.r10 = ustate.r11 = ustate.r12 = 1; |
208 | ustate.r9 = ustate.r10 = ustate.r11 = ustate.r12 = 1; |
215 | ustate.lr = 3; |
209 | ustate.lr = 3; |
216 | // set user stack |
210 | // set user stack |
217 | ustate.sp = ((uint32_t)kernel_uarg->uspace_stack)+PAGE_SIZE; |
211 | ustate.sp = ((uint32_t)kernel_uarg->uspace_stack)+PAGE_SIZE; |
218 | // set where uspace executin starts |
212 | // set where uspace executin starts |
219 | ustate.pc = (uintptr_t) kernel_uarg->uspace_entry; |
213 | ustate.pc = (uintptr_t) kernel_uarg->uspace_entry; |
220 | 214 | ||
221 | // status register in user mode |
215 | // status register in user mode |
222 | ipl_t cpsr = current_status_reg_read(); |
216 | ipl_t cpsr = current_status_reg_read(); |
223 | cpsr &= ~STATUS_REG_MODE_MASK | USER_MODE; |
217 | cpsr &= ~STATUS_REG_MODE_MASK | USER_MODE; |
224 | // |
218 | // |
225 | ipl_t tmpsr = (cpsr & ~STATUS_REG_MODE_MASK) | ABORT_MODE; |
219 | ipl_t tmpsr = (cpsr & ~STATUS_REG_MODE_MASK) | ABORT_MODE; |
226 | 220 | ||
227 | asm __volatile__ ( |
221 | asm __volatile__ ( |
228 | "mov r0, %0 \n" // save pointer into ustate struct |
222 | "mov r0, %0 \n" // save pointer into ustate struct |
229 | "mov r1, %1 \n" // save cspr |
223 | "mov r1, %1 \n" // save cspr |
230 | "msr cpsr_c, %2 \n" // change mode into any exception mode |
224 | "msr cpsr_c, %2 \n" // change mode into any exception mode |
231 | "msr spsr_c, r1 \n" // set saved cpsr ... as user mode |
225 | "msr spsr_c, r1 \n" // set saved cpsr ... as user mode |
232 | "ldmfd r0, {r0-r12, sp, lr, pc}^\n" // jump into user mode |
226 | "ldmfd r0, {r0-r12, sp, lr, pc}^\n" // jump into user mode |
233 | : // no output |
227 | : // no output |
234 | : "r"(&ustate), "r"(cpsr), "r"(tmpsr) // |
228 | : "r"(&ustate), "r"(cpsr), "r"(tmpsr) // |
235 | : "r0","r1" |
229 | : "r0","r1" |
236 | ); |
230 | ); |
237 | */ |
231 | */ |
238 | while(1) |
232 | while(1) |
239 | ; |
233 | ; |
240 | 234 | ||
241 | } |
235 | } |
242 | /** @} |
236 | /** @} |
243 | */ |
237 | */ |
244 | 238 | ||
245 | 239 | ||
246 | 240 | ||
247 | 241 | ||
248 | 242 | ||
249 | 243 | ||
250 | 244 | ||
251 | 245 | ||
252 | 246 | ||
253 | 247 | ||
254 | 248 | ||
255 | 249 | ||
256 | 250 | ||
257 | 251 | ||
258 | 252 |