WebSVN – HelenOS – Diff – /branches/arm/kernel/arch/arm32/include/types.h


/*
 * Copyright (c) 2007 Pavel Jancik, Michal Kebrt
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup arm32  
 * @{
 */
/** @file
 */
 
#ifndef KERN_arm32_TYPES_H_
#define KERN_arm32_TYPES_H_
 
#define NULL 0
#define false 0
#define true 1
 
typedef signed char int8_t;
typedef signed short int16_t;
typedef signed long int32_t;
typedef signed long long int64_t;
 
typedef unsigned char uint8_t;
typedef unsigned short uint16_t;
typedef unsigned long uint32_t;
typedef unsigned long long uint64_t;
 
typedef uint32_t size_t;
typedef uint32_t count_t;
typedef uint32_t index_t;
 
typedef uint32_t uintptr_t;
typedef uint32_t pfn_t;
 
typedef uint32_t ipl_t;
 
typedef uint32_t unative_t;
typedef int32_t native_t;
 
typedef uint8_t bool;
typedef uint64_t task_id_t;
typedef uint32_t context_id_t;
 
typedef int32_t inr_t;
typedef int32_t devno_t;
 
 
 
 
/** Page table entry.
 *  
 *  We have different structs for level 0 and level 1 page table entries.
 * */
typedef struct {
  unsigned dummy : 32;
} pte_t;
 
/** Level 0 page table entry. */
typedef struct {
    /* 01b for coarse tables, see below for details */
    unsigned descriptor_type     : 2;
    unsigned impl_specific       : 3;
    unsigned domain              : 4;
    unsigned should_be_zero      : 1;
    /* Pointer to the coarse 2nd level page table (holding entries for small (4KB)
     * or large (64KB) pages. ARM also supports fine 2nd level page tables that
     * may hold even tiny pages (1KB) but they are bigger (4KB per table in comparison
     * with 1KB per the coarse table)
    */
    unsigned coarse_table_addr   : 22;
} __attribute__ ((packed)) pte_level0_t;
 
/** Level 1 page table entry (small (4KB) pages used) */
typedef struct {
    /* 0b10 for small pages */
    unsigned descriptor_type     : 2;
    unsigned bufferable          : 1;
    unsigned cacheable           : 1;
    /* access permissions for each of 4 subparts of a page
     * (for each 1KB when small pages used */
    unsigned access_permission_0 : 2;
    unsigned access_permission_1 : 2;
    unsigned access_permission_2 : 2;
    unsigned access_permission_3 : 2;
    unsigned frame_base_addr     : 20;
} __attribute__ ((packed)) pte_level1_t;
 
 
/* Level 1 page tables access permissions */
 
/** User mode: no access, privileged mode: no access */
#define PTE_AP_USER_NO_KERNEL_NO 0
/** User mode: no access, privileged mode: read/write */
#define PTE_AP_USER_NO_KERNEL_RW 1
/** User mode: read only, privileged mode: read/write */
#define PTE_AP_USER_RO_KERNEL_RW 2
/// User mode: read/write, privileged mode: read/write
#define PTE_AP_USER_RW_KERNEL_RW 3
 
 
/* pte_level0_t and pte_level1_t descriptor_type flags */
 
/** pte_level0_t and pte_level1_t "not present" flag (used in descriptor_type) */
#define PTE_DESCRIPTOR_NOT_PRESENT  0 
/** pte_level0_t coarse page table flag (used in descriptor_type) */
#define PTE_DESCRIPTOR_COARSE_TABLE 1
/** pte_level1_t small page table flag (used in descriptor type) */
#define PTE_DESCRIPTOR_SMALL_PAGE   2
 
 
#endif
 
/** @}
 */
 

Rev 2243	Rev 2256
1	/*	1	/*
2	* Copyright (c) 2007 Pavel Jancik, Michal Kebrt	2	* Copyright (c) 2007 Pavel Jancik, Michal Kebrt
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup arm32	29	/** @addtogroup arm32
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35	#ifndef KERN_arm32_TYPES_H_	35	#ifndef KERN_arm32_TYPES_H_
36	#define KERN_arm32_TYPES_H_	36	#define KERN_arm32_TYPES_H_
37		37
38	#define NULL 0	38	#define NULL 0
39	#define false 0	39	#define false 0
40	#define true 1	40	#define true 1
41		41
42	typedef signed char int8_t;	42	typedef signed char int8_t;
43	typedef signed short int16_t;	43	typedef signed short int16_t;
44	typedef signed long int32_t;	44	typedef signed long int32_t;
45	typedef signed long long int64_t;	45	typedef signed long long int64_t;
46		46
47	typedef unsigned char uint8_t;	47	typedef unsigned char uint8_t;
48	typedef unsigned short uint16_t;	48	typedef unsigned short uint16_t;
49	typedef unsigned long uint32_t;	49	typedef unsigned long uint32_t;
50	typedef unsigned long long uint64_t;	50	typedef unsigned long long uint64_t;
51		51
52	typedef uint32_t size_t;	52	typedef uint32_t size_t;
53	typedef uint32_t count_t;	53	typedef uint32_t count_t;
54	typedef uint32_t index_t;	54	typedef uint32_t index_t;
55		55
56	typedef uint32_t uintptr_t;	56	typedef uint32_t uintptr_t;
57	typedef uint32_t pfn_t;	57	typedef uint32_t pfn_t;
58		58
59	typedef uint32_t ipl_t;	59	typedef uint32_t ipl_t;
60		60
61	typedef uint32_t unative_t;	61	typedef uint32_t unative_t;
62	typedef int32_t native_t;	62	typedef int32_t native_t;
63		63
64	typedef uint8_t bool;	64	typedef uint8_t bool;
65	typedef uint64_t task_id_t;	65	typedef uint64_t task_id_t;
66	typedef uint32_t context_id_t;	66	typedef uint32_t context_id_t;
67		67
68	typedef int32_t inr_t;	68	typedef int32_t inr_t;
69	typedef int32_t devno_t;	69	typedef int32_t devno_t;
70		70
71	typedef uint32_t __address;	-
72		-
73		71
74	/** Page table entry.	72	/** Page table entry.
75	*	73	*
76	* We have different structs for level 0 and level 1 page table entries.	74	* We have different structs for level 0 and level 1 page table entries.
77	* */	75	* */
78	typedef struct {	76	typedef struct {
79	unsigned dummy : 32;	77	unsigned dummy : 32;
80	} pte_t;	78	} pte_t;
81		79
82	/** Level 0 page table entry. */	80	/** Level 0 page table entry. */
83	typedef struct {	81	typedef struct {
84	/* 01b for coarse tables, see below for details */	82	/* 01b for coarse tables, see below for details */
85	unsigned descriptor_type : 2;	83	unsigned descriptor_type : 2;
86	unsigned impl_specific : 3;	84	unsigned impl_specific : 3;
87	unsigned domain : 4;	85	unsigned domain : 4;
88	unsigned should_be_zero : 1;	86	unsigned should_be_zero : 1;
89	/* Pointer to the coarse 2nd level page table (holding entries for small (4KB)	87	/* Pointer to the coarse 2nd level page table (holding entries for small (4KB)
90	* or large (64KB) pages. ARM also supports fine 2nd level page tables that	88	* or large (64KB) pages. ARM also supports fine 2nd level page tables that
91	* may hold even tiny pages (1KB) but they are bigger (4KB per table in comparison	89	* may hold even tiny pages (1KB) but they are bigger (4KB per table in comparison
92	* with 1KB per the coarse table)	90	* with 1KB per the coarse table)
93	*/	91	*/
94	unsigned coarse_table_addr : 22;	92	unsigned coarse_table_addr : 22;
95	} __attribute__ ((packed)) pte_level0_t;	93	} __attribute__ ((packed)) pte_level0_t;
96		94
97	/** Level 1 page table entry (small (4KB) pages used) */	95	/** Level 1 page table entry (small (4KB) pages used) */
98	typedef struct {	96	typedef struct {
99	/* 0b10 for small pages */	97	/* 0b10 for small pages */
100	unsigned descriptor_type : 2;	98	unsigned descriptor_type : 2;
101	unsigned bufferable : 1;	99	unsigned bufferable : 1;
102	unsigned cacheable : 1;	100	unsigned cacheable : 1;
103	/* access permissions for each of 4 subparts of a page	101	/* access permissions for each of 4 subparts of a page
104	* (for each 1KB when small pages used */	102	* (for each 1KB when small pages used */
105	unsigned access_permission_0 : 2;	103	unsigned access_permission_0 : 2;
106	unsigned access_permission_1 : 2;	104	unsigned access_permission_1 : 2;
107	unsigned access_permission_2 : 2;	105	unsigned access_permission_2 : 2;
108	unsigned access_permission_3 : 2;	106	unsigned access_permission_3 : 2;
109	unsigned frame_base_addr : 20;	107	unsigned frame_base_addr : 20;
110	} __attribute__ ((packed)) pte_level1_t;	108	} __attribute__ ((packed)) pte_level1_t;
111		109
112		110
113	/* Level 1 page tables access permissions */	111	/* Level 1 page tables access permissions */
114		112
115	/** User mode: no access, privileged mode: no access */	113	/** User mode: no access, privileged mode: no access */
116	#define pte_ap_user_no_kernel_no 0	114	#define PTE_AP_USER_NO_KERNEL_NO 0
117	/** User mode: no access, privileged mode: read/write */	115	/** User mode: no access, privileged mode: read/write */
118	#define pte_ap_user_no_kernel_rw 1	116	#define PTE_AP_USER_NO_KERNEL_RW 1
119	/** User mode: read only, privileged mode: read/write */	117	/** User mode: read only, privileged mode: read/write */
120	#define pte_ap_user_ro_kernel_rw 2	118	#define PTE_AP_USER_RO_KERNEL_RW 2
121	/// User mode: read/write, privileged mode: read/write	119	/// User mode: read/write, privileged mode: read/write
122	#define pte_ap_user_rw_kernel_rw 3	120	#define PTE_AP_USER_RW_KERNEL_RW 3
123		121
124		122
125	/* pte_level0_t and pte_level1_t descriptor_type flags */	123	/* pte_level0_t and pte_level1_t descriptor_type flags */
126		124
127	/** pte_level0_t and pte_level1_t "not present" flag (used in descriptor_type) */	125	/** pte_level0_t and pte_level1_t "not present" flag (used in descriptor_type) */
128	#define pte_descriptor_not_preset 0	126	#define PTE_DESCRIPTOR_NOT_PRESENT 0
129	/** pte_level0_t coarse page table flag (used in descriptor_type) */	127	/** pte_level0_t coarse page table flag (used in descriptor_type) */
130	#define pte_descriptor_coarse_table 1	128	#define PTE_DESCRIPTOR_COARSE_TABLE 1
131	/** pte_level1_t small page table flag (used in descriptor type) */	129	/** pte_level1_t small page table flag (used in descriptor type) */
132	#define pte_descriptor_small_page 2	130	#define PTE_DESCRIPTOR_SMALL_PAGE 2
133		131
134		132
135	#endif	133	#endif
136		134
137	/** @}	135	/** @}
138	*/	136	*/
139		137

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