WebSVN – HelenOS – Diff – /branches/arm/kernel/arch/arm32/include/exception.h


/*
 * Copyright (c) 2007 Michal Kebrt, Petr Stepan
 *
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup arm32  
 * @{
 */
/** @file
 */
 
#ifndef KERN_arm32_EXCEPTION_H_
#define KERN_arm32_EXCEPTION_H_
 
#include <arch/types.h>
#include <arch/regutils.h>
 
 
#define HIGH_EXCEPTION_VECTORS
 
#ifdef HIGH_EXCEPTION_VECTORS
    #define EXC_BASE_ADDRESS    0xffff0000
#else
    #define EXC_BASE_ADDRESS    0x0
#endif
 
/* Exception Vectors */
#define EXC_RESET_VEC          (EXC_BASE_ADDRESS + 0x0)
#define EXC_UNDEF_INSTR_VEC    (EXC_BASE_ADDRESS + 0x4)
#define EXC_SWI_VEC            (EXC_BASE_ADDRESS + 0x8)
#define EXC_PREFETCH_ABORT_VEC (EXC_BASE_ADDRESS + 0xc)
#define EXC_DATA_ABORT_VEC     (EXC_BASE_ADDRESS + 0x10)
#define EXC_IRQ_VEC            (EXC_BASE_ADDRESS + 0x18)
#define EXC_FIQ_VEC            (EXC_BASE_ADDRESS + 0x1c)
 
/* Exception numbers */
#define EXC_RESET           0
#define EXC_UNDEF_INSTR     1
#define EXC_SWI             2
#define EXC_PREFETCH_ABORT  3
#define EXC_DATA_ABORT      4
#define EXC_IRQ             5
#define EXC_FIQ             6
 
 
/** Structure representing CPU state saved when an exception occurs. */
typedef struct {
    uint32_t spsr;
    uint32_t sp;
    uint32_t lr;
 
    uint32_t r0;
    uint32_t r1;
    uint32_t r2;
    uint32_t r3;
    uint32_t r4;
    uint32_t r5;
    uint32_t r6;
    uint32_t r7;
    uint32_t r8;
    uint32_t r9;
    uint32_t r10;
    uint32_t r11;
    uint32_t r12;
 
    uint32_t pc;
} istate_t;
 
 
/** Sets Program Counter member of given istate structure.
 *
 * @param istate istate structure
 * @param retaddr new value of istate's PC member
 */
static inline void istate_set_retaddr(istate_t *istate, uintptr_t retaddr)
{
    istate->pc = retaddr;
}
 
 
/** Returns true if exception happened while in userspace. */
static inline int istate_from_uspace(istate_t *istate)
{
    return (istate->spsr & STATUS_REG_MODE_MASK) == USER_MODE;
}
 
 
/** Returns Program Counter member of given istate structure. */
static inline unative_t istate_get_pc(istate_t *istate)
{
    return istate->pc;
}
 
 
extern void setup_exception_stacks(void);
extern void install_exception_handlers(void);
extern void exception_init(void);
extern void print_istate(istate_t *istate);
 
 
#endif
 
/** @}
 */
 

Rev 2329	Rev 2355
1	/*	1	/*
2	* Copyright (c) 2007 Michal Kebrt, Petr Stepan	2	* Copyright (c) 2007 Michal Kebrt, Petr Stepan
3	*	3	*
4	* All rights reserved.	4	* All rights reserved.
5	*	5	*
6	* Redistribution and use in source and binary forms, with or without	6	* Redistribution and use in source and binary forms, with or without
7	* modification, are permitted provided that the following conditions	7	* modification, are permitted provided that the following conditions
8	* are met:	8	* are met:
9	*	9	*
10	* - Redistributions of source code must retain the above copyright	10	* - Redistributions of source code must retain the above copyright
11	* notice, this list of conditions and the following disclaimer.	11	* notice, this list of conditions and the following disclaimer.
12	* - Redistributions in binary form must reproduce the above copyright	12	* - Redistributions in binary form must reproduce the above copyright
13	* notice, this list of conditions and the following disclaimer in the	13	* notice, this list of conditions and the following disclaimer in the
14	* documentation and/or other materials provided with the distribution.	14	* documentation and/or other materials provided with the distribution.
15	* - The name of the author may not be used to endorse or promote products	15	* - The name of the author may not be used to endorse or promote products
16	* derived from this software without specific prior written permission.	16	* derived from this software without specific prior written permission.
17	*	17	*
18	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	18	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	19	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	20	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	21	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	22	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	23	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	24	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	25	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	26	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	27	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28	*/	28	*/
29		29
30	/** @addtogroup arm32	30	/** @addtogroup arm32
31	* @{	31	* @{
32	*/	32	*/
33	/** @file	33	/** @file
34	*/	34	*/
35		35
36	#ifndef KERN_arm32_EXCEPTION_H_	36	#ifndef KERN_arm32_EXCEPTION_H_
37	#define KERN_arm32_EXCEPTION_H_	37	#define KERN_arm32_EXCEPTION_H_
38		38
39	#include <arch/types.h>	39	#include <arch/types.h>
40	#include <arch/regutils.h>	40	#include <arch/regutils.h>
41		41
42		42
43	#define HIGH_EXCEPTION_VECTORS	43	#define HIGH_EXCEPTION_VECTORS
44		44
45	#ifdef HIGH_EXCEPTION_VECTORS	45	#ifdef HIGH_EXCEPTION_VECTORS
46	#define EXC_BASE_ADDRESS 0xffff0000	46	#define EXC_BASE_ADDRESS 0xffff0000
47	#else	47	#else
48	#define EXC_BASE_ADDRESS 0x0	48	#define EXC_BASE_ADDRESS 0x0
49	#endif	49	#endif
50		50
51	/* Exception Vectors */	51	/* Exception Vectors */
52	#define EXC_RESET_VEC (EXC_BASE_ADDRESS + 0x0)	52	#define EXC_RESET_VEC (EXC_BASE_ADDRESS + 0x0)
53	#define EXC_UNDEF_INSTR_VEC (EXC_BASE_ADDRESS + 0x4)	53	#define EXC_UNDEF_INSTR_VEC (EXC_BASE_ADDRESS + 0x4)
54	#define EXC_SWI_VEC (EXC_BASE_ADDRESS + 0x8)	54	#define EXC_SWI_VEC (EXC_BASE_ADDRESS + 0x8)
55	#define EXC_PREFETCH_ABORT_VEC (EXC_BASE_ADDRESS + 0xc)	55	#define EXC_PREFETCH_ABORT_VEC (EXC_BASE_ADDRESS + 0xc)
56	#define EXC_DATA_ABORT_VEC (EXC_BASE_ADDRESS + 0x10)	56	#define EXC_DATA_ABORT_VEC (EXC_BASE_ADDRESS + 0x10)
57	#define EXC_IRQ_VEC (EXC_BASE_ADDRESS + 0x18)	57	#define EXC_IRQ_VEC (EXC_BASE_ADDRESS + 0x18)
58	#define EXC_FIQ_VEC (EXC_BASE_ADDRESS + 0x1c)	58	#define EXC_FIQ_VEC (EXC_BASE_ADDRESS + 0x1c)
59		59
60	/* Exception numbers */	60	/* Exception numbers */
61	#define EXC_RESET 0	61	#define EXC_RESET 0
62	#define EXC_UNDEF_INSTR 1	62	#define EXC_UNDEF_INSTR 1
63	#define EXC_SWI 2	63	#define EXC_SWI 2
64	#define EXC_PREFETCH_ABORT 3	64	#define EXC_PREFETCH_ABORT 3
65	#define EXC_DATA_ABORT 4	65	#define EXC_DATA_ABORT 4
66	#define EXC_IRQ 5	66	#define EXC_IRQ 5
67	#define EXC_FIQ 6	67	#define EXC_FIQ 6
68		68
69		69
70	/** Structure representing CPU state saved when an exception occurs. */	70	/** Structure representing CPU state saved when an exception occurs. */
71	typedef struct {	71	typedef struct {
72	uint32_t spsr;	72	uint32_t spsr;
73	uint32_t sp;	73	uint32_t sp;
74	uint32_t lr;	74	uint32_t lr;
75		75
76	uint32_t r0;	76	uint32_t r0;
77	uint32_t r1;	77	uint32_t r1;
78	uint32_t r2;	78	uint32_t r2;
79	uint32_t r3;	79	uint32_t r3;
80	uint32_t r4;	80	uint32_t r4;
81	uint32_t r5;	81	uint32_t r5;
82	uint32_t r6;	82	uint32_t r6;
83	uint32_t r7;	83	uint32_t r7;
84	uint32_t r8;	84	uint32_t r8;
85	uint32_t r9;	85	uint32_t r9;
86	uint32_t r10;	86	uint32_t r10;
87	uint32_t r11;	87	uint32_t r11;
88	uint32_t r12;	88	uint32_t r12;
89		89
90	uint32_t pc;	90	uint32_t pc;
91	} istate_t;	91	} istate_t;
92		92
93		93
-		94	/** Sets Program Counter member of given istate structure.
94		95	*
-		96	* @param istate istate structure
-		97	* @param retaddr new value of istate's PC member
-		98	*/
95	static inline void istate_set_retaddr(istate_t *istate, uintptr_t retaddr)	99	static inline void istate_set_retaddr(istate_t *istate, uintptr_t retaddr)
96	{	100	{
97	istate->pc = retaddr;	101	istate->pc = retaddr;
98	}	102	}
99		103
100		104
101	/** Return true if exception happened while in userspace. */	105	/** Returns true if exception happened while in userspace. */
102	static inline int istate_from_uspace(istate_t *istate)	106	static inline int istate_from_uspace(istate_t *istate)
103	{	107	{
104	return (istate->spsr & STATUS_REG_MODE_MASK) == USER_MODE;	108	return (istate->spsr & STATUS_REG_MODE_MASK) == USER_MODE;
105	}	109	}
106		110
107		-
-		111	/** Returns Program Counter member of given istate structure. */
108	static inline unative_t istate_get_pc(istate_t *istate)	112	static inline unative_t istate_get_pc(istate_t *istate)
109	{	113	{
110	return istate->pc;	114	return istate->pc;
111	}	115	}
112		116
113		117
114	extern void setup_exception_stacks(void);	118	extern void setup_exception_stacks(void);
115	extern void install_exception_handlers(void);	119	extern void install_exception_handlers(void);
116	extern void exception_init(void);	120	extern void exception_init(void);
117	extern void print_istate(istate_t *istate);	121	extern void print_istate(istate_t *istate);
118		122
119		123
120	#endif	124	#endif
121		125
122	/** @}	126	/** @}
123	*/	127	*/
124		128

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(root)/branches/arm/kernel/arch/arm32/include/exception.h – Rev 2329 → 2355