WebSVN – HelenOS – Diff – /branches/arm/kernel/arch/arm32/include/exception.h


/*
 * Copyright (c) 2007 Michal Kebrt
 * Copyright (c) 2007 Petr Stepan
 *
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup arm32  
 * @{
 */
/** @file
 */
 
#ifndef KERN_arm32_EXCEPTION_H_
#define KERN_arm32_EXCEPTION_H_
 
#include <arch/types.h>
 
#define HIGH_EXCEPTION_VECTORS
 
#ifdef HIGH_EXCEPTION_VECTORS
    #define EXC_BASE_ADDRESS    0xffff0000
#else
    #define EXC_BASE_ADDRESS    0x0
#endif
 
/* Exception Vectors */
#define EXC_RESET_VEC       EXC_BASE_ADDRESS + 0x0
#define EXC_UNDEF_INSTR_VEC EXC_BASE_ADDRESS + 0x4
#define EXC_SWI_VEC     EXC_BASE_ADDRESS + 0x8
#define EXC_PREFETCH_ABORT_VEC  EXC_BASE_ADDRESS + 0xc
#define EXC_DATA_ABORT_VEC  EXC_BASE_ADDRESS + 0x10
#define EXC_IRQ_VEC     EXC_BASE_ADDRESS + 0x18
#define EXC_FIQ_VEC     EXC_BASE_ADDRESS + 0x1c
 
/* Exception numbers */
#define EXC_RESET       0
#define EXC_UNDEF_INSTR     1
#define EXC_SWI         2
#define EXC_PREFETCH_ABORT  3
#define EXC_DATA_ABORT      4
#define EXC_IRQ         5
#define EXC_FIQ         6
 
 
 
typedef struct {
    uint32_t r0;
    uint32_t r1;
    uint32_t r2;
    uint32_t r3;
    uint32_t r4;
    uint32_t r5;
    uint32_t r6;
    uint32_t r7;
    uint32_t r8;
    uint32_t r9;
    uint32_t r10;
    uint32_t r11;
    uint32_t r12;
    uint32_t sp;
    uint32_t lr;
 
    uint32_t spsr;
} istate_t;
 
static inline void istate_set_retaddr(istate_t *istate, uintptr_t retaddr)
{
    istate->lr = retaddr;
}
 
/** Return true if exception happened while in userspace */
static inline int istate_from_uspace(istate_t *istate)
{
    return !(istate->lr & 0x80000000);
    return 0;
}
static inline unative_t istate_get_pc(istate_t *istate)
{
    return istate->lr;
}
 
extern void setup_exception_stacks(void);
extern void install_exception_handlers(void);
extern void exception_init(void);
 
#endif
 
/** @}
 */
 

Rev 2240	Rev 2262
1	/*	1	/*
2	* Copyright (c) 2007 Michal Kebrt	2	* Copyright (c) 2007 Michal Kebrt
3	* Copyright (c) 2007 Petr Stepan	3	* Copyright (c) 2007 Petr Stepan
4	*	4	*
5	* All rights reserved.	5	* All rights reserved.
6	*	6	*
7	* Redistribution and use in source and binary forms, with or without	7	* Redistribution and use in source and binary forms, with or without
8	* modification, are permitted provided that the following conditions	8	* modification, are permitted provided that the following conditions
9	* are met:	9	* are met:
10	*	10	*
11	* - Redistributions of source code must retain the above copyright	11	* - Redistributions of source code must retain the above copyright
12	* notice, this list of conditions and the following disclaimer.	12	* notice, this list of conditions and the following disclaimer.
13	* - Redistributions in binary form must reproduce the above copyright	13	* - Redistributions in binary form must reproduce the above copyright
14	* notice, this list of conditions and the following disclaimer in the	14	* notice, this list of conditions and the following disclaimer in the
15	* documentation and/or other materials provided with the distribution.	15	* documentation and/or other materials provided with the distribution.
16	* - The name of the author may not be used to endorse or promote products	16	* - The name of the author may not be used to endorse or promote products
17	* derived from this software without specific prior written permission.	17	* derived from this software without specific prior written permission.
18	*	18	*
19	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	19	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
20	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	20	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
21	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	21	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
22	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	22	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
23	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	23	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
24	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	24	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	25	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	26	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	27	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
28	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	28	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29	*/	29	*/
30		30
31	/** @addtogroup arm32	31	/** @addtogroup arm32
32	* @{	32	* @{
33	*/	33	*/
34	/** @file	34	/** @file
35	*/	35	*/
36		36
37	#ifndef KERN_arm32_EXCEPTION_H_	37	#ifndef KERN_arm32_EXCEPTION_H_
38	#define KERN_arm32_EXCEPTION_H_	38	#define KERN_arm32_EXCEPTION_H_
39		39
40	#include <arch/types.h>	40	#include <arch/types.h>
41		41
-		42	#define HIGH_EXCEPTION_VECTORS
-		43
-		44	#ifdef HIGH_EXCEPTION_VECTORS
-		45	#define EXC_BASE_ADDRESS 0xffff0000
-		46	#else
-		47	#define EXC_BASE_ADDRESS 0x0
-		48	#endif
-		49
42	/* Exception Vectors */	50	/* Exception Vectors */
43	#define EXC_RESET_VEC 0x0	51	#define EXC_RESET_VEC EXC_BASE_ADDRESS + 0x0
44	#define EXC_UNDEF_INSTR_VEC 0x4	52	#define EXC_UNDEF_INSTR_VEC EXC_BASE_ADDRESS + 0x4
45	#define EXC_SWI_VEC 0x8	53	#define EXC_SWI_VEC EXC_BASE_ADDRESS + 0x8
46	#define EXC_PREFETCH_ABORT_VEC 0xc	54	#define EXC_PREFETCH_ABORT_VEC EXC_BASE_ADDRESS + 0xc
47	#define EXC_DATA_ABORT_VEC 0x10	55	#define EXC_DATA_ABORT_VEC EXC_BASE_ADDRESS + 0x10
48	#define EXC_IRQ_VEC 0x18	56	#define EXC_IRQ_VEC EXC_BASE_ADDRESS + 0x18
49	#define EXC_FIQ_VEC 0x1c	57	#define EXC_FIQ_VEC EXC_BASE_ADDRESS + 0x1c
50		58
51	/* Exception numbers */	59	/* Exception numbers */
52	#define EXC_RESET 0	60	#define EXC_RESET 0
53	#define EXC_UNDEF_INSTR 1	61	#define EXC_UNDEF_INSTR 1
54	#define EXC_SWI 2	62	#define EXC_SWI 2
55	#define EXC_PREFETCH_ABORT 3	63	#define EXC_PREFETCH_ABORT 3
56	#define EXC_DATA_ABORT 4	64	#define EXC_DATA_ABORT 4
57	#define EXC_IRQ 5	65	#define EXC_IRQ 5
58	#define EXC_FIQ 6	66	#define EXC_FIQ 6
59		67
60		68
61		69
62	typedef struct {	70	typedef struct {
63	uint32_t r0;	71	uint32_t r0;
64	uint32_t r1;	72	uint32_t r1;
65	uint32_t r2;	73	uint32_t r2;
66	uint32_t r3;	74	uint32_t r3;
67	uint32_t r4;	75	uint32_t r4;
68	uint32_t r5;	76	uint32_t r5;
69	uint32_t r6;	77	uint32_t r6;
70	uint32_t r7;	78	uint32_t r7;
71	uint32_t r8;	79	uint32_t r8;
72	uint32_t r9;	80	uint32_t r9;
73	uint32_t r10;	81	uint32_t r10;
74	uint32_t r11;	82	uint32_t r11;
75	uint32_t r12;	83	uint32_t r12;
76	uint32_t sp;	84	uint32_t sp;
77	uint32_t lr;	85	uint32_t lr;
78		86
79	uint32_t spsr;	87	uint32_t spsr;
80	} istate_t;	88	} istate_t;
81		89
82	static inline void istate_set_retaddr(istate_t *istate, uintptr_t retaddr)	90	static inline void istate_set_retaddr(istate_t *istate, uintptr_t retaddr)
83	{	91	{
84	istate->lr = retaddr;	92	istate->lr = retaddr;
85	}	93	}
86		94
87	/** Return true if exception happened while in userspace */	95	/** Return true if exception happened while in userspace */
88	static inline int istate_from_uspace(istate_t *istate)	96	static inline int istate_from_uspace(istate_t *istate)
89	{	97	{
90	return !(istate->lr & 0x80000000);	98	return !(istate->lr & 0x80000000);
91	return 0;	99	return 0;
92	}	100	}
93	static inline unative_t istate_get_pc(istate_t *istate)	101	static inline unative_t istate_get_pc(istate_t *istate)
94	{	102	{
95	return istate->lr;	103	return istate->lr;
96	}	104	}
97		105
98	extern void setup_exception_stacks(void);	106	extern void setup_exception_stacks(void);
99	extern void install_exception_handlers(void);	107	extern void install_exception_handlers(void);
100	extern void exception_init(void);	108	extern void exception_init(void);
101		109
102	#endif	110	#endif
103		111
104	/** @}	112	/** @}
105	*/	113	*/
106		114

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(root)/branches/arm/kernel/arch/arm32/include/exception.h – Rev 2240 → 2262