WebSVN – HelenOS – Diff – /branches/arm/boot/arch/arm32/loader/mm.h


/*
 * Copyright (c) 2007 Pavel Jancik, Michal Kebrt
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup arm32boot
 * @{
 */
/** @file
 */
 
 
#ifndef __MM_H__
#define __MM_H__
 
#ifndef __ASM__
#include "types.h"
#endif
 
 
#define FRAME_WIDTH                 12                  /* 4KB frames */
#define FRAME_SIZE                  (1 << FRAME_WIDTH)
 
#define PAGE_WIDTH                  FRAME_WIDTH
#define PAGE_SIZE                   FRAME_SIZE
 
#ifndef __ASM__
#   define KA2PA(x)                 (((uintptr_t) (x)) - 0x80000000)
#   define PA2KA(x)                 (((uintptr_t) (x)) + 0x80000000)
#else
#   define KA2PA(x)                 ((x) - 0x80000000)
#   define PA2KA(x)                 ((x) + 0x80000000)
#endif
 
/** Number of entries in PTL0 */
#define PTL0_ENTRIES_ARCH               (1<<12)             /* 4096 */
 
/** Frames per 1MB section */
#define FRAMES_PER_SECTION              ( ( 1 << 20 ) / FRAME_SIZE )
 
/** Converts adress to frame number */
#define ADDR2PFN( addr )                ( ((uintptr_t)(addr))>>FRAME_WIDTH )
 
/** Descriptor type that signs "section" page table entry
 * (one-level paging with 1MB sized pages)  */  
#define PTE_DESCRIPTOR_SECTION              2
 
/** Access rights to page table: user-no access, kernel-read/write */
#define PTE_AP_USER_NO_KERNEL_RW            1
 
#ifndef __ASM__
 
 
/** Page table level 0 entry - "section" format (one-level paging, 1MB sized
 * pages). Used only for booting the kernel. */
typedef struct {
    unsigned descriptor_type     : 2;
    unsigned bufferable          : 1;
    unsigned cacheable           : 1;
    unsigned impl_specific       : 1;
    unsigned domain              : 4;
    unsigned should_be_zero_1    : 1;
    unsigned access_permission   : 2;  
    unsigned should_be_zero_2    : 8;
    unsigned section_base_addr   : 12;
} __attribute__ ((packed)) pte_level0_section_t;
 
 
/** Page table that holds 1:1 mapping for booting the kernel. */
extern pte_level0_section_t page_table[PTL0_ENTRIES_ARCH];
 
 
/** Starts the MMU - initializes page table and enables paging. */
void mmu_start(void);
 
 
/** Enables paging. */
static inline void enable_paging()
{
    /* c3 - each two bits controls access to the one of domains (16)
     *      0b01 - behave as a client (user) of a domain
     */
    asm volatile (
        // behave as a client of domains
        "ldr r0, =0x55555555       \n"
        "mcr p15, 0, r0, c3, c0, 0 \n"
        // current settings
        "mrc p15, 0, r0, c1, c0, 0 \n"
        /* TODO: talk to Alf why needed
        // mask to disable aligment checks; system & rom bit set to 0 (has no
        // special effect)
        "ldr r1, =0xfffffe8f       \n"
        "and r0, r0, r1            \n"
        */
        // mask to enable paging
        "ldr r1, =0x00000001       \n"
        "orr r0, r0, r1            \n"
        // store settings
        "mcr p15, 0, r0, c1, c0, 0 \n"
        :
        :
        : "r0", "r1"
    );
}
 
 
/** Sets the address of level 0 page table.
 * \param pt pointer to the page table to set
 */  
static inline void set_ptl0_address(pte_level0_section_t* pt)
{
    asm volatile ( "mcr p15, 0, %0, c2, c0, 0 \n"
        :
        : "r"(pt)
    );
}
 
#endif
 
#endif
 
/** @}
 */
 
 

Subversion Repositories HelenOS

(root)/branches/arm/boot/arch/arm32/loader/mm.h – Rev 2254 → 2257

Rev 2254		Rev 2257
1	/*	1	/*
2	* Copyright (c) 2007 Pavel Jancik, Michal Kebrt	2	* Copyright (c) 2007 Pavel Jancik, Michal Kebrt
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	/** @addtogroup arm32boot	29	/** @addtogroup arm32boot
30	* @{	30	* @{
31	*/	31	*/
32	/** @file	32	/** @file
33	*/	33	*/
34		34
35		35
36	#ifndef __MM_H__	36	#ifndef __MM_H__
37	#define __MM_H__	37	#define __MM_H__
38		38
39	#ifndef __ASM__	39	#ifndef __ASM__
40	#include "types.h"	40	#include "types.h"
41	#endif	41	#endif
42		42
43		43
44	#define FRAME_WIDTH 12 /* 4KB frames */	44	#define FRAME_WIDTH 12 /* 4KB frames */
45	#define FRAME_SIZE (1 << FRAME_WIDTH)	45	#define FRAME_SIZE (1 << FRAME_WIDTH)
46		46
47	#define PAGE_WIDTH FRAME_WIDTH	47	#define PAGE_WIDTH FRAME_WIDTH
48	#define PAGE_SIZE FRAME_SIZE	48	#define PAGE_SIZE FRAME_SIZE
49		49
50	#ifndef __ASM__	50	#ifndef __ASM__
51	# define KA2PA(x) (((uintptr_t) (x)) - 0x80000000)	51	# define KA2PA(x) (((uintptr_t) (x)) - 0x80000000)
52	# define PA2KA(x) (((uintptr_t) (x)) + 0x80000000)	52	# define PA2KA(x) (((uintptr_t) (x)) + 0x80000000)
53	#else	53	#else
54	# define KA2PA(x) ((x) - 0x80000000)	54	# define KA2PA(x) ((x) - 0x80000000)
55	# define PA2KA(x) ((x) + 0x80000000)	55	# define PA2KA(x) ((x) + 0x80000000)
56	#endif	56	#endif
57		57
58	/** Number of entries in PTL0 */	58	/** Number of entries in PTL0 */
59	#define PTL0_ENTRIES_ARCH (1<<12) /* 4096 */	59	#define PTL0_ENTRIES_ARCH (1<<12) /* 4096 */
60		60
61	/** Frames per 1MB section */	61	/** Frames per 1MB section */
62	#define FRAMES_PER_SECTION ( ( 1 << 20 ) / FRAME_SIZE )	62	#define FRAMES_PER_SECTION ( ( 1 << 20 ) / FRAME_SIZE )
63		63
64	/** Converts adress to frame number */	64	/** Converts adress to frame number */
65	#define ADDR2PFN( addr ) ( ((uintptr_t)(addr))>>FRAME_WIDTH )	65	#define ADDR2PFN( addr ) ( ((uintptr_t)(addr))>>FRAME_WIDTH )
66		66
67	/** Descriptor type that signs "section" page table entry	67	/** Descriptor type that signs "section" page table entry
68	* (one-level paging with 1MB sized pages) */	68	* (one-level paging with 1MB sized pages) */
69	#define PTE_DESCRIPTOR_SECTION 2	69	#define PTE_DESCRIPTOR_SECTION 2
70		70
71	/** Access rights to page table: user-no access, kernel-read/write */	71	/** Access rights to page table: user-no access, kernel-read/write */
72	#define PTE_AP_USER_NO_KERNEL_RW 1	72	#define PTE_AP_USER_NO_KERNEL_RW 1
73		73
74	#ifndef __ASM__	74	#ifndef __ASM__
75		75
76		76
77	/** Page table level 0 entry - "section" format (one-level paging, 1MB sized	77	/** Page table level 0 entry - "section" format (one-level paging, 1MB sized
78	* pages). Used only for booting the kernel. */	78	* pages). Used only for booting the kernel. */
79	typedef struct {	79	typedef struct {
80	unsigned descriptor_type : 2;	80	unsigned descriptor_type : 2;
81	unsigned bufferable : 1;	81	unsigned bufferable : 1;
82	unsigned cacheable : 1;	82	unsigned cacheable : 1;
83	unsigned impl_specific : 1;	83	unsigned impl_specific : 1;
84	unsigned domain : 4;	84	unsigned domain : 4;
85	unsigned should_be_zero_1 : 1;	85	unsigned should_be_zero_1 : 1;
86	unsigned access_permission : 2;	86	unsigned access_permission : 2;
87	unsigned should_be_zero_2 : 8;	87	unsigned should_be_zero_2 : 8;
88	unsigned section_base_addr : 12;	88	unsigned section_base_addr : 12;
89	} __attribute__ ((packed)) pte_level0_section;	89	} __attribute__ ((packed)) pte_level0_section_t;
90		90
91		91
92	/** Page table that holds 1:1 mapping for booting the kernel. */	92	/** Page table that holds 1:1 mapping for booting the kernel. */
93	extern pte_level0_section page_table[PTL0_ENTRIES_ARCH];	93	extern pte_level0_section_t page_table[PTL0_ENTRIES_ARCH];
94		94
95		95
96	/** Starts the MMU - initializes page table and enables paging. */	96	/** Starts the MMU - initializes page table and enables paging. */
97	void mmu_start(void);	97	void mmu_start(void);
98		98
99		99
100	/** Enables paging. */	100	/** Enables paging. */
101	static inline void enable_paging()	101	static inline void enable_paging()
102	{	102	{
103	/* c3 - each two bits controls access to the one of domains (16)	103	/* c3 - each two bits controls access to the one of domains (16)
104	* 0b01 - behave as a client (user) of a domain	104	* 0b01 - behave as a client (user) of a domain
105	*/	105	*/
106	asm volatile (	106	asm volatile (
107	// behave as a client of domains	107	// behave as a client of domains
108	"ldr r0, =0x55555555 \n"	108	"ldr r0, =0x55555555 \n"
109	"mcr p15, 0, r0, c3, c0, 0 \n"	109	"mcr p15, 0, r0, c3, c0, 0 \n"
110	// current settings	110	// current settings
111	"mrc p15, 0, r0, c1, c0, 0 \n"	111	"mrc p15, 0, r0, c1, c0, 0 \n"
112	/* TODO: talk to Alf why needed	112	/* TODO: talk to Alf why needed
113	// mask to disable aligment checks; system & rom bit set to 0 (has no	113	// mask to disable aligment checks; system & rom bit set to 0 (has no
114	// special effect)	114	// special effect)
115	"ldr r1, =0xfffffe8f \n"	115	"ldr r1, =0xfffffe8f \n"
116	"and r0, r0, r1 \n"	116	"and r0, r0, r1 \n"
117	*/	117	*/
118	// mask to enable paging	118	// mask to enable paging
119	"ldr r1, =0x00000001 \n"	119	"ldr r1, =0x00000001 \n"
120	"orr r0, r0, r1 \n"	120	"orr r0, r0, r1 \n"
121	// store settings	121	// store settings
122	"mcr p15, 0, r0, c1, c0, 0 \n"	122	"mcr p15, 0, r0, c1, c0, 0 \n"
123	:	123	:
124	:	124	:
125	: "r0", "r1"	125	: "r0", "r1"
126	);	126	);
127	}	127	}
128		128
129		129
130	/** Sets the address of level 0 page table.	130	/** Sets the address of level 0 page table.
131	* \param pt pointer to the page table to set	131	* \param pt pointer to the page table to set
132	*/	132	*/
133	static inline void set_ptl0_address(pte_level0_section* pt)	133	static inline void set_ptl0_address(pte_level0_section_t* pt)
134	{	134	{
135	asm volatile ( "mcr p15, 0, %0, c2, c0, 0 \n"	135	asm volatile ( "mcr p15, 0, %0, c2, c0, 0 \n"
136	:	136	:
137	: "r"(pt)	137	: "r"(pt)
138	);	138	);
139	}	139	}
140		140
141	#endif	141	#endif
142		142
143	#endif	143	#endif
144		144
145	/** @}	145	/** @}
146	*/	146	*/
147		147
148		148