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| 1 | /* |
1 | /* |
| 2 | * Copyright (C) 2001-2004 Jakub Jermar |
2 | * Copyright (C) 2001-2004 Jakub Jermar |
| 3 | * All rights reserved. |
3 | * All rights reserved. |
| 4 | * |
4 | * |
| 5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
| 6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
| 7 | * are met: |
7 | * are met: |
| 8 | * |
8 | * |
| 9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
| 10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
| 11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
| 12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
| 13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
| 14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
| 15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
| 16 | * |
16 | * |
| 17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
| 18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
| 19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
| 20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
| 21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
| 22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
| 23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
| 24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
| 25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
| 26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| 27 | */ |
27 | */ |
| 28 | 28 | ||
| 29 | #include <mm/tlb.h> |
29 | #include <mm/tlb.h> |
| 30 | #include <arch/mm/tlb.h> |
30 | #include <arch/mm/tlb.h> |
| 31 | #include <smp/ipi.h> |
31 | #include <smp/ipi.h> |
| 32 | #include <synch/spinlock.h> |
32 | #include <synch/spinlock.h> |
| 33 | #include <typedefs.h> |
33 | #include <typedefs.h> |
| 34 | #include <arch/atomic.h> |
34 | #include <arch/atomic.h> |
| 35 | #include <arch/interrupt.h> |
35 | #include <arch/interrupt.h> |
| 36 | #include <config.h> |
36 | #include <config.h> |
| 37 | #include <arch.h> |
37 | #include <arch.h> |
| 38 | 38 | ||
| 39 | #ifdef __SMP__ |
39 | #ifdef CONFIG_SMP |
| 40 | static spinlock_t tlblock; |
40 | static spinlock_t tlblock; |
| 41 | #endif |
41 | #endif |
| 42 | 42 | ||
| 43 | void tlb_init(void) |
43 | void tlb_init(void) |
| 44 | { |
44 | { |
| 45 | if (config.cpu_active == 1) |
45 | if (config.cpu_active == 1) |
| 46 | spinlock_initialize(&tlblock); |
46 | spinlock_initialize(&tlblock); |
| 47 | 47 | ||
| 48 | tlb_init_arch(); |
48 | tlb_init_arch(); |
| 49 | } |
49 | } |
| 50 | 50 | ||
| 51 | #ifdef __SMP__ |
51 | #ifdef CONFIG_SMP |
| 52 | /* must be called with interrupts disabled */ |
52 | /* must be called with interrupts disabled */ |
| 53 | void tlb_shootdown_start(void) |
53 | void tlb_shootdown_start(void) |
| 54 | { |
54 | { |
| 55 | int i; |
55 | int i; |
| 56 | 56 | ||
| 57 | CPU->tlb_active = 0; |
57 | CPU->tlb_active = 0; |
| 58 | spinlock_lock(&tlblock); |
58 | spinlock_lock(&tlblock); |
| 59 | tlb_shootdown_ipi_send(); |
59 | tlb_shootdown_ipi_send(); |
| 60 | tlb_invalidate(0); /* TODO: use valid ASID */ |
60 | tlb_invalidate(0); /* TODO: use valid ASID */ |
| 61 | 61 | ||
| 62 | busy_wait: |
62 | busy_wait: |
| 63 | for (i = 0; i<config.cpu_count; i++) |
63 | for (i = 0; i<config.cpu_count; i++) |
| 64 | if (cpus[i].tlb_active) |
64 | if (cpus[i].tlb_active) |
| 65 | goto busy_wait; |
65 | goto busy_wait; |
| 66 | } |
66 | } |
| 67 | 67 | ||
| 68 | void tlb_shootdown_finalize(void) |
68 | void tlb_shootdown_finalize(void) |
| 69 | { |
69 | { |
| 70 | spinlock_unlock(&tlblock); |
70 | spinlock_unlock(&tlblock); |
| 71 | CPU->tlb_active = 1; |
71 | CPU->tlb_active = 1; |
| 72 | } |
72 | } |
| 73 | 73 | ||
| 74 | void tlb_shootdown_ipi_send(void) |
74 | void tlb_shootdown_ipi_send(void) |
| 75 | { |
75 | { |
| 76 | ipi_broadcast(VECTOR_TLB_SHOOTDOWN_IPI); |
76 | ipi_broadcast(VECTOR_TLB_SHOOTDOWN_IPI); |
| 77 | } |
77 | } |
| 78 | 78 | ||
| 79 | void tlb_shootdown_ipi_recv(void) |
79 | void tlb_shootdown_ipi_recv(void) |
| 80 | { |
80 | { |
| 81 | CPU->tlb_active = 0; |
81 | CPU->tlb_active = 0; |
| 82 | spinlock_lock(&tlblock); |
82 | spinlock_lock(&tlblock); |
| 83 | spinlock_unlock(&tlblock); |
83 | spinlock_unlock(&tlblock); |
| 84 | tlb_invalidate(0); /* TODO: use valid ASID */ |
84 | tlb_invalidate(0); /* TODO: use valid ASID */ |
| 85 | CPU->tlb_active = 1; |
85 | CPU->tlb_active = 1; |
| 86 | } |
86 | } |
| 87 | #endif /* __SMP__ */ |
87 | #endif /* CONFIG_SMP */ |
| 88 | 88 | ||