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1 | SPARTAN kernel currently supports emulated MIPS R4000 32-bit |
1 | SPARTAN kernel currently supports emulated MIPS R4000 32-bit |
2 | little-endian architecture. In other words, it can only run in MIPS |
2 | little-endian architecture. In other words, it can only run in MIPS |
3 | R4000 emulator called msim. This emulator is being developed by Viliam |
3 | R4000 emulator called msim. This emulator is being developed by Viliam |
4 | Holub: |
4 | Holub: |
5 | 5 | ||
6 | http://nenya.ms.mff.cuni.cz/~holub/msim |
6 | http://nenya.ms.mff.cuni.cz/~holub/msim |
7 | 7 | ||
8 | Note that msim diverges from real MIPS hardware in some aspects. |
8 | Note that msim diverges from real MIPS hardware in some aspects. |
9 | Therefore, some non-trivial changes will be necessary for a real |
9 | Therefore, some non-trivial changes will be necessary for a real |
10 | hardware port. The simulator is described in this manual: |
10 | hardware port. The simulator is described in this manual: |
11 | 11 | ||
12 | http://nenya.ms.mff.cuni.cz/~holub/msim/msim.ps |
12 | http://nenya.ms.mff.cuni.cz/~holub/msim/msim.ps |
13 | 13 | ||
14 | You'll need a msim.conf script like this: |
14 | You'll need a msim.conf script like this: |
15 | 15 | ||
16 | # |
16 | # |
17 | # MSIM configuration script |
17 | # MSIM configuration script |
18 | # |
18 | # |
19 | 19 | ||
20 | add dcpu mips1 |
20 | add dcpu mips1 |
21 | 21 | ||
22 | add rwm mainmem 0 16M load "kernel.bin" |
22 | add rwm mainmem 0 16M load "kernel.bin" |
23 | add rom startmem 0x1fc00000 1k load "load.bin" |
23 | add rom startmem 0x1fc00000 1k load "load.bin" |
24 | 24 | ||
25 | add dprinter printer 0xA000000 |
25 | add dprinter printer 0xA000000 |
26 | 26 | ||
27 | 27 | ||
28 | 28 | ||
29 | BOOTSTRAP |
29 | BOOTSTRAP |
30 | ========= |
30 | ========= |
31 | Because the mips port uses binary executable format and for some other |
31 | Because the mips port uses binary executable format and for some other |
32 | architectural reasons, it shares one address for bootstrap entry |
32 | architectural reasons, it shares one address for bootstrap entry |
33 | (address where control is passed from loader) and for TLB refill |
33 | (address where control is passed from loader) and for TLB refill |
34 | exception entry. The former is used only once during system bootstrap. |
34 | exception entry. The former is used only once during system bootstrap. |
35 | From that point further, only TLB refill exception entry uses that |
35 | From that point further, only TLB refill exception entry uses that |
36 | address. Note that this is the reason why main_bsp() is called from |
36 | address. Note that this is the reason why main_bsp() is called from |
37 | tlb_refill() code. |
37 | tlb_refill() code. |
38 | 38 |