WebSVN – HelenOS-historic – Diff – /SPARTAN/trunk/arch/ppc32/include/asm.h


/*
 * Copyright (C) 2005 Martin Decky
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
#ifndef __ppc32_ASM_H__
#define __ppc32_ASM_H__
 
#include <arch/types.h>
#include <config.h>
 
/** Enable interrupts.
 *
 * Enable interrupts and return previous
 * value of EE.
 *
 * @return Old interrupt priority level.
 */
static inline ipl_t interrupts_enable(void) {
    ipl_t v;
    ipl_t tmp;
   
    __asm__ volatile (
        "mfmsr %0\n"
        "mfmsr %1\n"
        "ori %1, %1, 1 << 15\n"
        "mtmsr %1\n"
        : "=r" (v), "=r" (tmp)
    );
    return v;
}
 
/** Disable interrupts.
 *
 * Disable interrupts and return previous
 * value of EE.
 *
 * @return Old interrupt priority level.
 */
static inline ipl_t interrupts_disable(void) {
    ipl_t v;
    ipl_t tmp;
   
    __asm__ volatile (
        "mfmsr %0\n"
        "mfmsr %1\n"
        "rlwinm %1, %1, 0, 17, 15\n"
        "mtmsr %1\n"
        : "=r" (v), "=r" (tmp)
    );
    return v;
}
 
/** Restore interrupt priority level.
 *
 * Restore EE.
 *
 * @param ipl Saved interrupt priority level.
 */
static inline void interrupts_restore(ipl_t ipl) {
    ipl_t tmp;
   
    __asm__ volatile (
        "mfmsr %1\n"
        "rlwimi  %0, %1, 0, 17, 15\n"
        "cmpw 0, %0, %1\n"
        "beq 0f\n"
        "mtmsr %0\n"
        "0:\n"
        : "=r" (ipl), "=r" (tmp)
        : "0" (ipl)
    );
}
 
/** Return interrupt priority level.
 *
 * Return EE.
 *
 * @return Current interrupt priority level.
 */
static inline ipl_t interrupts_read(void) {
    ipl_t v;
    __asm__ volatile (
        "mfmsr %0\n"
        : "=r" (v)
    );
    return v;
}
 
/** Return base address of current stack.
 *
 * Return the base address of the current stack.
 * The stack is assumed to be STACK_SIZE bytes long.
 * The stack must start on page boundary.
 */
static inline __address get_stack_base(void)
{
    __address v;
   
    __asm__ volatile ("and %0, %%r1, %1\n" : "=r" (v) : "r" (~(STACK_SIZE-1)));
   
    return v;
}
 
void cpu_halt(void);
void cpu_sleep(void);
void asm_delay_loop(__u32 t);
 
#endif
 

Rev 342	Rev 413
1	/*	1	/*
2	* Copyright (C) 2005 Martin Decky	2	* Copyright (C) 2005 Martin Decky
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	#ifndef __ppc32_ASM_H__	29	#ifndef __ppc32_ASM_H__
30	#define __ppc32_ASM_H__	30	#define __ppc32_ASM_H__
31		31
32	#include <arch/types.h>	32	#include <arch/types.h>
33	#include <config.h>	33	#include <config.h>
34		34
35	/** Set priority level low	35	/** Enable interrupts.
36	*	36	*
37	* Enable interrupts and return previous	37	* Enable interrupts and return previous
38	* value of EE.	38	* value of EE.
-		39	*
-		40	* @return Old interrupt priority level.
39	*/	41	*/
40	static inline pri_t cpu_priority_low(void) {	42	static inline ipl_t interrupts_enable(void) {
41	pri_t v;	43	ipl_t v;
42	pri_t tmp;	44	ipl_t tmp;
43		45
44	__asm__ volatile (	46	__asm__ volatile (
45	"mfmsr %0\n"	47	"mfmsr %0\n"
46	"mfmsr %1\n"	48	"mfmsr %1\n"
47	"ori %1, %1, 1 << 15\n"	49	"ori %1, %1, 1 << 15\n"
48	"mtmsr %1\n"	50	"mtmsr %1\n"
49	: "=r" (v), "=r" (tmp)	51	: "=r" (v), "=r" (tmp)
50	);	52	);
51	return v;	53	return v;
52	}	54	}
53		55
54	/** Set priority level high	56	/** Disable interrupts.
55	*	57	*
56	* Disable interrupts and return previous	58	* Disable interrupts and return previous
57	* value of EE.	59	* value of EE.
-		60	*
-		61	* @return Old interrupt priority level.
58	*/	62	*/
59	static inline pri_t cpu_priority_high(void) {	63	static inline ipl_t interrupts_disable(void) {
60	pri_t v;	64	ipl_t v;
61	pri_t tmp;	65	ipl_t tmp;
62		66
63	__asm__ volatile (	67	__asm__ volatile (
64	"mfmsr %0\n"	68	"mfmsr %0\n"
65	"mfmsr %1\n"	69	"mfmsr %1\n"
66	"rlwinm %1, %1, 0, 17, 15\n"	70	"rlwinm %1, %1, 0, 17, 15\n"
67	"mtmsr %1\n"	71	"mtmsr %1\n"
68	: "=r" (v), "=r" (tmp)	72	: "=r" (v), "=r" (tmp)
69	);	73	);
70	return v;	74	return v;
71	}	75	}
72		76
73	/** Restore priority level	77	/** Restore interrupt priority level.
74	*	78	*
75	* Restore EE.	79	* Restore EE.
-		80	*
-		81	* @param ipl Saved interrupt priority level.
76	*/	82	*/
77	static inline void cpu_priority_restore(pri_t pri) {	83	static inline void interrupts_restore(ipl_t ipl) {
78	pri_t tmp;	84	ipl_t tmp;
79		85
80	__asm__ volatile (	86	__asm__ volatile (
81	"mfmsr %1\n"	87	"mfmsr %1\n"
82	"rlwimi %0, %1, 0, 17, 15\n"	88	"rlwimi %0, %1, 0, 17, 15\n"
83	"cmpw 0, %0, %1\n"	89	"cmpw 0, %0, %1\n"
84	"beq 0f\n"	90	"beq 0f\n"
85	"mtmsr %0\n"	91	"mtmsr %0\n"
86	"0:\n"	92	"0:\n"
87	: "=r" (pri), "=r" (tmp)	93	: "=r" (ipl), "=r" (tmp)
88	: "0" (pri)	94	: "0" (ipl)
89	);	95	);
90	}	96	}
91		97
92	/** Return raw priority level	98	/** Return interrupt priority level.
93	*	99	*
94	* Return EE.	100	* Return EE.
-		101	*
-		102	* @return Current interrupt priority level.
95	*/	103	*/
96	static inline pri_t cpu_priority_read(void) {	104	static inline ipl_t interrupts_read(void) {
97	pri_t v;	105	ipl_t v;
98	__asm__ volatile (	106	__asm__ volatile (
99	"mfmsr %0\n"	107	"mfmsr %0\n"
100	: "=r" (v)	108	: "=r" (v)
101	);	109	);
102	return v;	110	return v;
103	}	111	}
104		112
105	/** Return base address of current stack.	113	/** Return base address of current stack.
106	*	114	*
107	* Return the base address of the current stack.	115	* Return the base address of the current stack.
108	* The stack is assumed to be STACK_SIZE bytes long.	116	* The stack is assumed to be STACK_SIZE bytes long.
109	* The stack must start on page boundary.	117	* The stack must start on page boundary.
110	*/	118	*/
111	static inline __address get_stack_base(void)	119	static inline __address get_stack_base(void)
112	{	120	{
113	__address v;	121	__address v;
114		122
115	__asm__ volatile ("and %0, %%r1, %1\n" : "=r" (v) : "r" (~(STACK_SIZE-1)));	123	__asm__ volatile ("and %0, %%r1, %1\n" : "=r" (v) : "r" (~(STACK_SIZE-1)));
116		124
117	return v;	125	return v;
118	}	126	}
119		127
120	void cpu_halt(void);	128	void cpu_halt(void);
121	void cpu_sleep(void);	129	void cpu_sleep(void);
122	void asm_delay_loop(__u32 t);	130	void asm_delay_loop(__u32 t);
123		131
124	#endif	132	#endif
125		133

Subversion Repositories HelenOS-historic

(root)/SPARTAN/trunk/arch/ppc32/include/asm.h – Rev 342 → 413