WebSVN – HelenOS-historic – Diff – /SPARTAN/trunk/arch/mips32/include/atomic.h


/*
 * Copyright (C) 2005 Ondrej Palkovsky
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
#ifndef __mips32_ATOMIC_H__
#define __mips32_ATOMIC_H__
 
#include <arch/types.h>
 
#define atomic_inc(x)   (a_add(x,1))
#define atomic_dec(x)   (a_sub(x,1))
 
typedef volatile __u32 atomic_t;
 
/*
 * Atomic addition
 *
 * This case is harder, and we have to use the special LL and SC operations
 * to achieve atomicity. The instructions are similar to LW (load) and SW
 * (store), except that the LL (load-linked) instruction loads the address
 * of the variable to a special register and if another process writes to
 * the same location, the SC (store-conditional) instruction fails.
 */
static inline atomic_t a_add(atomic_t *val, int i)
{
    atomic_t tmp, tmp2;
 
    asm volatile (
        "   .set    push\n"
        "   .set    noreorder\n"
        "   nop\n"
        "1:\n"
        "   ll  %0, %1\n"
        "   addu    %0, %0, %3\n"
        "       move    %2, %0\n"
        "   sc  %0, %1\n"
        "   beq %0, 0x0, 1b\n"
        "   move    %0, %2\n"
        "   .set    pop\n"
        : "=&r" (tmp), "=o" (*val), "=r" (tmp2)
        : "r" (i)
        );
    return tmp;
}
 
 
/*
 * Atomic subtraction
 *
 * Implemented in the same manner as a_add, except we substract the value.
 */
static inline atomic_t a_sub(atomic_t *val, int i)
 
{
    atomic_t tmp, tmp2;
 
    asm volatile (
        "   .set    push\n"
        "   .set    noreorder\n"
        "   nop\n"
        "1:\n"
        "   ll  %0, %1\n"
        "   subu    %0, %0, %3\n"
        "       move    %2, %0\n"
        "   sc  %0, %1\n"
        "   beq %0, 0x0, 1b\n"
        "       move    %0, %2\n"
        "   .set    pop\n"
        : "=&r" (tmp), "=o" (*val), "=r" (tmp2)
        : "r" (i)
        );
    return tmp;
}
 
 
#endif
 

Rev 341	Rev 475
1	/*	1	/*
2	* Copyright (C) 2005 Ondrej Palkovsky	2	* Copyright (C) 2005 Ondrej Palkovsky
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	#ifndef __mips32_ATOMIC_H__	29	#ifndef __mips32_ATOMIC_H__
30	#define __mips32_ATOMIC_H__	30	#define __mips32_ATOMIC_H__
31		31
-		32	#include <arch/types.h>
-		33
32	#define atomic_inc(x) (a_add(x,1))	34	#define atomic_inc(x) (a_add(x,1))
33	#define atomic_dec(x) (a_sub(x,1))	35	#define atomic_dec(x) (a_sub(x,1))
34		36
-		37	typedef volatile __u32 atomic_t;
-		38
35	/*	39	/*
36	* Atomic addition	40	* Atomic addition
37	*	41	*
38	* This case is harder, and we have to use the special LL and SC operations	42	* This case is harder, and we have to use the special LL and SC operations
39	* to achieve atomicity. The instructions are similar to LW (load) and SW	43	* to achieve atomicity. The instructions are similar to LW (load) and SW
40	* (store), except that the LL (load-linked) instruction loads the address	44	* (store), except that the LL (load-linked) instruction loads the address
41	* of the variable to a special register and if another process writes to	45	* of the variable to a special register and if another process writes to
42	* the same location, the SC (store-conditional) instruction fails.	46	* the same location, the SC (store-conditional) instruction fails.
43	*/	47	*/
44	static inline int a_add( volatile int *val, int i)	48	static inline atomic_t a_add(atomic_t *val, int i)
45	{	49	{
46	int tmp, tmp2;	50	atomic_t tmp, tmp2;
47		51
48	asm volatile (	52	asm volatile (
49	" .set push\n"	53	" .set push\n"
50	" .set noreorder\n"	54	" .set noreorder\n"
51	" nop\n"	55	" nop\n"
52	"1:\n"	56	"1:\n"
53	" ll %0, %1\n"	57	" ll %0, %1\n"
54	" addu %0, %0, %3\n"	58	" addu %0, %0, %3\n"
55	" move %2, %0\n"	59	" move %2, %0\n"
56	" sc %0, %1\n"	60	" sc %0, %1\n"
57	" beq %0, 0x0, 1b\n"	61	" beq %0, 0x0, 1b\n"
58	" move %0, %2\n"	62	" move %0, %2\n"
59	" .set pop\n"	63	" .set pop\n"
60	: "=&r" (tmp), "=o" (*val), "=r" (tmp2)	64	: "=&r" (tmp), "=o" (*val), "=r" (tmp2)
61	: "r" (i)	65	: "r" (i)
62	);	66	);
63	return tmp;	67	return tmp;
64	}	68	}
65		69
66		70
67	/*	71	/*
68	* Atomic subtraction	72	* Atomic subtraction
69	*	73	*
70	* Implemented in the same manner as a_add, except we substract the value.	74	* Implemented in the same manner as a_add, except we substract the value.
71	*/	75	*/
72	static inline int a_sub( volatile int *val, int i)	76	static inline atomic_t a_sub(atomic_t *val, int i)
73		77
74	{	78	{
75	int tmp, tmp2;	79	atomic_t tmp, tmp2;
76		80
77	asm volatile (	81	asm volatile (
78	" .set push\n"	82	" .set push\n"
79	" .set noreorder\n"	83	" .set noreorder\n"
80	" nop\n"	84	" nop\n"
81	"1:\n"	85	"1:\n"
82	" ll %0, %1\n"	86	" ll %0, %1\n"
83	" subu %0, %0, %3\n"	87	" subu %0, %0, %3\n"
84	" move %2, %0\n"	88	" move %2, %0\n"
85	" sc %0, %1\n"	89	" sc %0, %1\n"
86	" beq %0, 0x0, 1b\n"	90	" beq %0, 0x0, 1b\n"
87	" move %0, %2\n"	91	" move %0, %2\n"
88	" .set pop\n"	92	" .set pop\n"
89	: "=&r" (tmp), "=o" (*val), "=r" (tmp2)	93	: "=&r" (tmp), "=o" (*val), "=r" (tmp2)
90	: "r" (i)	94	: "r" (i)
91	);	95	);
92	return tmp;	96	return tmp;
93	}	97	}
94		98
95		99
96	#endif	100	#endif
97		101

Subversion Repositories HelenOS-historic

(root)/SPARTAN/trunk/arch/mips32/include/atomic.h – Rev 341 → 475