WebSVN – HelenOS-historic – Diff – /SPARTAN/trunk/arch/mips/src/asm.S


#
# Copyright (C) 2003-2004 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
#   notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
#   notice, this list of conditions and the following disclaimer in the
#   documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
#   derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
#include <arch/asm/regname.h>
	
.text
 
.macro cp0_read reg
	mfc0 $2,\reg
	j $31
	nop
.endm
 
.macro cp0_write reg
	mtc0 $4,\reg
	j $31
	nop
.endm
 
.set noat
.set noreorder
.set nomacro
 
.global cp0_index_read
.global cp0_index_write
.global cp0_random_read
.global cp0_entry_lo0_read
.global cp0_entry_lo0_write
.global cp0_entry_lo1_read
.global cp0_entry_lo1_write
.global cp0_context_read
.global cp0_context_write
.global cp0_pagemask_read
.global cp0_pagemask_write
.global cp0_wired_read
.global cp0_wired_write
.global cp0_badvaddr_read
.global cp0_count_read
.global cp0_count_write
.global cp0_hi_read
.global cp0_hi_write
.global cp0_compare_read
.global cp0_compare_write
.global cp0_status_read
.global cp0_status_write
.global cp0_cause_read
.global cp0_cause_write
.global cp0_epc_read
.global cp0_epc_write
.global cp0_prid_read
 
cp0_index_read:		cp0_read $0
cp0_index_write:	cp0_write $0
 
cp0_random_read:	cp0_read $1
 
cp0_entry_lo0_read:	cp0_read $2
cp0_entry_lo0_write:	cp0_write $2
 
cp0_entry_lo1_read:	cp0_read $3
cp0_entry_lo1_write:	cp0_write $3
 
cp0_context_read:	cp0_read $4
cp0_context_write:	cp0_write $4
 
cp0_pagemask_read:	cp0_read $5
cp0_pagemask_write:	cp0_write $5
 
cp0_wired_read:		cp0_read $6
cp0_wired_write:	cp0_write $6
 
cp0_badvaddr_read:	cp0_read $8
 
cp0_count_read:		cp0_read $9
cp0_count_write:	cp0_write $9
 
cp0_entry_hi_read:	cp0_read $10
cp0_entry_hi_write:	cp0_write $10
 
cp0_compare_read:	cp0_read $11
cp0_compare_write:	cp0_write $11
 
cp0_status_read:	cp0_read $12
cp0_status_write:	cp0_write $12
 
cp0_cause_read:		cp0_read $13
cp0_cause_write:	cp0_write $13
 
cp0_epc_read:		cp0_read $14
cp0_epc_write:		cp0_write $14
 
cp0_prid_read:		cp0_read $15
 
 
 
 
 
 
 
 
 
.global cpu_halt
cpu_halt:
	j cpu_halt
	nop
 
 
.global memsetb
memsetb:
	j _memsetb
	nop
 
.global memcpy
memcpy:
	j _memcpy
	nop
 
.macro fpu_gp_save reg ctx
	mfc1 $t0,$\reg
	sw $t0, \reg*4(\ctx)
.endm
 
.macro fpu_gp_restore reg ctx
	lw $t0, \reg*4(\ctx)
	mtc1 $t0,$\reg
.endm
 
.macro fpu_ct_save reg ctx
	cfc1 $t0,$1
	sw $t0, (\reg+32)*4(\ctx)
.endm	
 
.macro fpu_ct_restore reg ctx
	lw $t0, (\reg+32)*4(\ctx)
	ctc1 $t0,$\reg
.endm
 
 
.global fpu_context_save
fpu_context_save:
#ifdef HAVE_FPU
	fpu_gp_save 0,$a0
	fpu_gp_save 1,$a0
	fpu_gp_save 2,$a0
	fpu_gp_save 3,$a0
	fpu_gp_save 4,$a0
	fpu_gp_save 5,$a0
	fpu_gp_save 6,$a0
	fpu_gp_save 7,$a0
	fpu_gp_save 8,$a0
	fpu_gp_save 9,$a0
	fpu_gp_save 10,$a0
	fpu_gp_save 11,$a0
	fpu_gp_save 12,$a0
	fpu_gp_save 13,$a0
	fpu_gp_save 14,$a0
	fpu_gp_save 15,$a0
	fpu_gp_save 16,$a0
	fpu_gp_save 17,$a0
	fpu_gp_save 18,$a0
	fpu_gp_save 19,$a0
	fpu_gp_save 20,$a0
	fpu_gp_save 21,$a0
	fpu_gp_save 22,$a0
	fpu_gp_save 23,$a0
	fpu_gp_save 24,$a0
	fpu_gp_save 25,$a0
	fpu_gp_save 26,$a0
	fpu_gp_save 27,$a0
	fpu_gp_save 28,$a0
	fpu_gp_save 29,$a0
	fpu_gp_save 30,$a0
	fpu_gp_save 31,$a0
 
	fpu_ct_save 1,$a0
	fpu_ct_save 2,$a0
	fpu_ct_save 3,$a0
	fpu_ct_save 4,$a0
	fpu_ct_save 5,$a0
	fpu_ct_save 6,$a0
	fpu_ct_save 7,$a0
	fpu_ct_save 8,$a0
	fpu_ct_save 9,$a0
	fpu_ct_save 10,$a0
	fpu_ct_save 11,$a0
	fpu_ct_save 12,$a0
	fpu_ct_save 13,$a0
	fpu_ct_save 14,$a0
	fpu_ct_save 15,$a0
	fpu_ct_save 16,$a0
	fpu_ct_save 17,$a0
	fpu_ct_save 18,$a0
	fpu_ct_save 19,$a0
	fpu_ct_save 20,$a0
	fpu_ct_save 21,$a0
	fpu_ct_save 22,$a0
	fpu_ct_save 23,$a0
	fpu_ct_save 24,$a0
	fpu_ct_save 25,$a0
	fpu_ct_save 26,$a0
	fpu_ct_save 27,$a0
	fpu_ct_save 28,$a0
	fpu_ct_save 29,$a0
	fpu_ct_save 30,$a0
	fpu_ct_save 31,$a0
#endif		
	j $ra
	nop
 
.global fpu_context_restore
fpu_context_restore:
#ifdef HAVE_FPU
	fpu_gp_restore 0,$a0
	fpu_gp_restore 1,$a0
	fpu_gp_restore 2,$a0
	fpu_gp_restore 3,$a0
	fpu_gp_restore 4,$a0
	fpu_gp_restore 5,$a0
	fpu_gp_restore 6,$a0
	fpu_gp_restore 7,$a0
	fpu_gp_restore 8,$a0
	fpu_gp_restore 9,$a0
	fpu_gp_restore 10,$a0
	fpu_gp_restore 11,$a0
	fpu_gp_restore 12,$a0
	fpu_gp_restore 13,$a0
	fpu_gp_restore 14,$a0
	fpu_gp_restore 15,$a0
	fpu_gp_restore 16,$a0
	fpu_gp_restore 17,$a0
	fpu_gp_restore 18,$a0
	fpu_gp_restore 19,$a0
	fpu_gp_restore 20,$a0
	fpu_gp_restore 21,$a0
	fpu_gp_restore 22,$a0
	fpu_gp_restore 23,$a0
	fpu_gp_restore 24,$a0
	fpu_gp_restore 25,$a0
	fpu_gp_restore 26,$a0
	fpu_gp_restore 27,$a0
	fpu_gp_restore 28,$a0
	fpu_gp_restore 29,$a0
	fpu_gp_restore 30,$a0
	fpu_gp_restore 31,$a0
 
	fpu_ct_restore 1,$a0
	fpu_ct_restore 2,$a0
	fpu_ct_restore 3,$a0
	fpu_ct_restore 4,$a0
	fpu_ct_restore 5,$a0
	fpu_ct_restore 6,$a0
	fpu_ct_restore 7,$a0
	fpu_ct_restore 8,$a0
	fpu_ct_restore 9,$a0
	fpu_ct_restore 10,$a0
	fpu_ct_restore 11,$a0
	fpu_ct_restore 12,$a0
	fpu_ct_restore 13,$a0
	fpu_ct_restore 14,$a0
	fpu_ct_restore 15,$a0
	fpu_ct_restore 16,$a0
	fpu_ct_restore 17,$a0
	fpu_ct_restore 18,$a0
	fpu_ct_restore 19,$a0
	fpu_ct_restore 20,$a0
	fpu_ct_restore 21,$a0
	fpu_ct_restore 22,$a0
	fpu_ct_restore 23,$a0
	fpu_ct_restore 24,$a0
	fpu_ct_restore 25,$a0
	fpu_ct_restore 26,$a0
	fpu_ct_restore 27,$a0
	fpu_ct_restore 28,$a0
	fpu_ct_restore 29,$a0
	fpu_ct_restore 30,$a0
	fpu_ct_restore 31,$a0
#endif	
	j $ra
	nop
	
# THIS IS USERSPACE CODE
.global utext
utext:
	j $31
	nop
utext_end:
 
.data
.global utext_size
utext_size:
	.long utext_end-utext
 
 
 

Rev 329	Rev 332
1	#	1	#
2	# Copyright (C) 2003-2004 Jakub Jermar	2	# Copyright (C) 2003-2004 Jakub Jermar
3	# All rights reserved.	3	# All rights reserved.
4	#	4	#
5	# Redistribution and use in source and binary forms, with or without	5	# Redistribution and use in source and binary forms, with or without
6	# modification, are permitted provided that the following conditions	6	# modification, are permitted provided that the following conditions
7	# are met:	7	# are met:
8	#	8	#
9	# - Redistributions of source code must retain the above copyright	9	# - Redistributions of source code must retain the above copyright
10	# notice, this list of conditions and the following disclaimer.	10	# notice, this list of conditions and the following disclaimer.
11	# - Redistributions in binary form must reproduce the above copyright	11	# - Redistributions in binary form must reproduce the above copyright
12	# notice, this list of conditions and the following disclaimer in the	12	# notice, this list of conditions and the following disclaimer in the
13	# documentation and/or other materials provided with the distribution.	13	# documentation and/or other materials provided with the distribution.
14	# - The name of the author may not be used to endorse or promote products	14	# - The name of the author may not be used to endorse or promote products
15	# derived from this software without specific prior written permission.	15	# derived from this software without specific prior written permission.
16	#	16	#
17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	#	27	#
28		28
29	#include <arch/asm/regname.h>	29	#include <arch/asm/regname.h>
30		30
31	.text	31	.text
32		32
33	.macro cp0_read reg	33	.macro cp0_read reg
34	mfc0 $2,\reg	34	mfc0 $2,\reg
35	j $31	35	j $31
36	nop	36	nop
37	.endm	37	.endm
38		38
39	.macro cp0_write reg	39	.macro cp0_write reg
40	mtc0 $4,\reg	40	mtc0 $4,\reg
41	j $31	41	j $31
42	nop	42	nop
43	.endm	43	.endm
44		44
45	.set noat	45	.set noat
46	.set noreorder	46	.set noreorder
47	.set nomacro	47	.set nomacro
48		48
49	.global cp0_index_read	49	.global cp0_index_read
50	.global cp0_index_write	50	.global cp0_index_write
51	.global cp0_random_read	51	.global cp0_random_read
52	.global cp0_entry_lo0_read	52	.global cp0_entry_lo0_read
53	.global cp0_entry_lo0_write	53	.global cp0_entry_lo0_write
54	.global cp0_entry_lo1_read	54	.global cp0_entry_lo1_read
55	.global cp0_entry_lo1_write	55	.global cp0_entry_lo1_write
56	.global cp0_context_read	56	.global cp0_context_read
57	.global cp0_context_write	57	.global cp0_context_write
58	.global cp0_pagemask_read	58	.global cp0_pagemask_read
59	.global cp0_pagemask_write	59	.global cp0_pagemask_write
60	.global cp0_wired_read	60	.global cp0_wired_read
61	.global cp0_wired_write	61	.global cp0_wired_write
62	.global cp0_badvaddr_read	62	.global cp0_badvaddr_read
63	.global cp0_count_read	63	.global cp0_count_read
64	.global cp0_count_write	64	.global cp0_count_write
65	.global cp0_hi_read	65	.global cp0_hi_read
66	.global cp0_hi_write	66	.global cp0_hi_write
67	.global cp0_compare_read	67	.global cp0_compare_read
68	.global cp0_compare_write	68	.global cp0_compare_write
69	.global cp0_status_read	69	.global cp0_status_read
70	.global cp0_status_write	70	.global cp0_status_write
71	.global cp0_cause_read	71	.global cp0_cause_read
72	.global cp0_cause_write	72	.global cp0_cause_write
73	.global cp0_epc_read	73	.global cp0_epc_read
74	.global cp0_epc_write	74	.global cp0_epc_write
75	.global cp0_prid_read	75	.global cp0_prid_read
76		76
77	cp0_index_read: cp0_read $0	77	cp0_index_read: cp0_read $0
78	cp0_index_write: cp0_write $0	78	cp0_index_write: cp0_write $0
79		79
80	cp0_random_read: cp0_read $1	80	cp0_random_read: cp0_read $1
81		81
82	cp0_entry_lo0_read: cp0_read $2	82	cp0_entry_lo0_read: cp0_read $2
83	cp0_entry_lo0_write: cp0_write $2	83	cp0_entry_lo0_write: cp0_write $2
84		84
85	cp0_entry_lo1_read: cp0_read $3	85	cp0_entry_lo1_read: cp0_read $3
86	cp0_entry_lo1_write: cp0_write $3	86	cp0_entry_lo1_write: cp0_write $3
87		87
88	cp0_context_read: cp0_read $4	88	cp0_context_read: cp0_read $4
89	cp0_context_write: cp0_write $4	89	cp0_context_write: cp0_write $4
90		90
91	cp0_pagemask_read: cp0_read $5	91	cp0_pagemask_read: cp0_read $5
92	cp0_pagemask_write: cp0_write $5	92	cp0_pagemask_write: cp0_write $5
93		93
94	cp0_wired_read: cp0_read $6	94	cp0_wired_read: cp0_read $6
95	cp0_wired_write: cp0_write $6	95	cp0_wired_write: cp0_write $6
96		96
97	cp0_badvaddr_read: cp0_read $8	97	cp0_badvaddr_read: cp0_read $8
98		98
99	cp0_count_read: cp0_read $9	99	cp0_count_read: cp0_read $9
100	cp0_count_write: cp0_write $9	100	cp0_count_write: cp0_write $9
101		101
102	cp0_entry_hi_read: cp0_read $10	102	cp0_entry_hi_read: cp0_read $10
103	cp0_entry_hi_write: cp0_write $10	103	cp0_entry_hi_write: cp0_write $10
104		104
105	cp0_compare_read: cp0_read $11	105	cp0_compare_read: cp0_read $11
106	cp0_compare_write: cp0_write $11	106	cp0_compare_write: cp0_write $11
107		107
108	cp0_status_read: cp0_read $12	108	cp0_status_read: cp0_read $12
109	cp0_status_write: cp0_write $12	109	cp0_status_write: cp0_write $12
110		110
111	cp0_cause_read: cp0_read $13	111	cp0_cause_read: cp0_read $13
112	cp0_cause_write: cp0_write $13	112	cp0_cause_write: cp0_write $13
113		113
114	cp0_epc_read: cp0_read $14	114	cp0_epc_read: cp0_read $14
115	cp0_epc_write: cp0_write $14	115	cp0_epc_write: cp0_write $14
116		116
117	cp0_prid_read: cp0_read $15	117	cp0_prid_read: cp0_read $15
118		118
119		119
120	.global bios_write	-
121	bios_write:	-
122	lw $2, 0x80001020	-
123	lw $2, 0x6c($2)	-
124	j $2	-
125	nop	-
126		-
127	.global cpu_halt	120	.global cpu_halt
128	cpu_halt:	121	cpu_halt:
129	j cpu_halt	122	j cpu_halt
130	nop	123	nop
131		124
132		125
133	.global memsetb	126	.global memsetb
134	memsetb:	127	memsetb:
135	j _memsetb	128	j _memsetb
136	nop	129	nop
137		130
138	.global memcpy	131	.global memcpy
139	memcpy:	132	memcpy:
140	j _memcpy	133	j _memcpy
141	nop	134	nop
142		135
143	.macro fpu_gp_save reg ctx	136	.macro fpu_gp_save reg ctx
144	mfc1 $t0,$\reg	137	mfc1 $t0,$\reg
145	sw $t0, \reg*4(\ctx)	138	sw $t0, \reg*4(\ctx)
146	.endm	139	.endm
147		140
148	.macro fpu_gp_restore reg ctx	141	.macro fpu_gp_restore reg ctx
149	lw $t0, \reg*4(\ctx)	142	lw $t0, \reg*4(\ctx)
150	mtc1 $t0,$\reg	143	mtc1 $t0,$\reg
151	.endm	144	.endm
152		145
153	.macro fpu_ct_save reg ctx	146	.macro fpu_ct_save reg ctx
154	cfc1 $t0,$1	147	cfc1 $t0,$1
155	sw $t0, (\reg+32)*4(\ctx)	148	sw $t0, (\reg+32)*4(\ctx)
156	.endm	149	.endm
157		150
158	.macro fpu_ct_restore reg ctx	151	.macro fpu_ct_restore reg ctx
159	lw $t0, (\reg+32)*4(\ctx)	152	lw $t0, (\reg+32)*4(\ctx)
160	ctc1 $t0,$\reg	153	ctc1 $t0,$\reg
161	.endm	154	.endm
162		155
163		156
164	.global fpu_context_save	157	.global fpu_context_save
165	fpu_context_save:	158	fpu_context_save:
166	#ifdef HAVE_FPU	159	#ifdef HAVE_FPU
167	fpu_gp_save 0,$a0	160	fpu_gp_save 0,$a0
168	fpu_gp_save 1,$a0	161	fpu_gp_save 1,$a0
169	fpu_gp_save 2,$a0	162	fpu_gp_save 2,$a0
170	fpu_gp_save 3,$a0	163	fpu_gp_save 3,$a0
171	fpu_gp_save 4,$a0	164	fpu_gp_save 4,$a0
172	fpu_gp_save 5,$a0	165	fpu_gp_save 5,$a0
173	fpu_gp_save 6,$a0	166	fpu_gp_save 6,$a0
174	fpu_gp_save 7,$a0	167	fpu_gp_save 7,$a0
175	fpu_gp_save 8,$a0	168	fpu_gp_save 8,$a0
176	fpu_gp_save 9,$a0	169	fpu_gp_save 9,$a0
177	fpu_gp_save 10,$a0	170	fpu_gp_save 10,$a0
178	fpu_gp_save 11,$a0	171	fpu_gp_save 11,$a0
179	fpu_gp_save 12,$a0	172	fpu_gp_save 12,$a0
180	fpu_gp_save 13,$a0	173	fpu_gp_save 13,$a0
181	fpu_gp_save 14,$a0	174	fpu_gp_save 14,$a0
182	fpu_gp_save 15,$a0	175	fpu_gp_save 15,$a0
183	fpu_gp_save 16,$a0	176	fpu_gp_save 16,$a0
184	fpu_gp_save 17,$a0	177	fpu_gp_save 17,$a0
185	fpu_gp_save 18,$a0	178	fpu_gp_save 18,$a0
186	fpu_gp_save 19,$a0	179	fpu_gp_save 19,$a0
187	fpu_gp_save 20,$a0	180	fpu_gp_save 20,$a0
188	fpu_gp_save 21,$a0	181	fpu_gp_save 21,$a0
189	fpu_gp_save 22,$a0	182	fpu_gp_save 22,$a0
190	fpu_gp_save 23,$a0	183	fpu_gp_save 23,$a0
191	fpu_gp_save 24,$a0	184	fpu_gp_save 24,$a0
192	fpu_gp_save 25,$a0	185	fpu_gp_save 25,$a0
193	fpu_gp_save 26,$a0	186	fpu_gp_save 26,$a0
194	fpu_gp_save 27,$a0	187	fpu_gp_save 27,$a0
195	fpu_gp_save 28,$a0	188	fpu_gp_save 28,$a0
196	fpu_gp_save 29,$a0	189	fpu_gp_save 29,$a0
197	fpu_gp_save 30,$a0	190	fpu_gp_save 30,$a0
198	fpu_gp_save 31,$a0	191	fpu_gp_save 31,$a0
199		192
200	fpu_ct_save 1,$a0	193	fpu_ct_save 1,$a0
201	fpu_ct_save 2,$a0	194	fpu_ct_save 2,$a0
202	fpu_ct_save 3,$a0	195	fpu_ct_save 3,$a0
203	fpu_ct_save 4,$a0	196	fpu_ct_save 4,$a0
204	fpu_ct_save 5,$a0	197	fpu_ct_save 5,$a0
205	fpu_ct_save 6,$a0	198	fpu_ct_save 6,$a0
206	fpu_ct_save 7,$a0	199	fpu_ct_save 7,$a0
207	fpu_ct_save 8,$a0	200	fpu_ct_save 8,$a0
208	fpu_ct_save 9,$a0	201	fpu_ct_save 9,$a0
209	fpu_ct_save 10,$a0	202	fpu_ct_save 10,$a0
210	fpu_ct_save 11,$a0	203	fpu_ct_save 11,$a0
211	fpu_ct_save 12,$a0	204	fpu_ct_save 12,$a0
212	fpu_ct_save 13,$a0	205	fpu_ct_save 13,$a0
213	fpu_ct_save 14,$a0	206	fpu_ct_save 14,$a0
214	fpu_ct_save 15,$a0	207	fpu_ct_save 15,$a0
215	fpu_ct_save 16,$a0	208	fpu_ct_save 16,$a0
216	fpu_ct_save 17,$a0	209	fpu_ct_save 17,$a0
217	fpu_ct_save 18,$a0	210	fpu_ct_save 18,$a0
218	fpu_ct_save 19,$a0	211	fpu_ct_save 19,$a0
219	fpu_ct_save 20,$a0	212	fpu_ct_save 20,$a0
220	fpu_ct_save 21,$a0	213	fpu_ct_save 21,$a0
221	fpu_ct_save 22,$a0	214	fpu_ct_save 22,$a0
222	fpu_ct_save 23,$a0	215	fpu_ct_save 23,$a0
223	fpu_ct_save 24,$a0	216	fpu_ct_save 24,$a0
224	fpu_ct_save 25,$a0	217	fpu_ct_save 25,$a0
225	fpu_ct_save 26,$a0	218	fpu_ct_save 26,$a0
226	fpu_ct_save 27,$a0	219	fpu_ct_save 27,$a0
227	fpu_ct_save 28,$a0	220	fpu_ct_save 28,$a0
228	fpu_ct_save 29,$a0	221	fpu_ct_save 29,$a0
229	fpu_ct_save 30,$a0	222	fpu_ct_save 30,$a0
230	fpu_ct_save 31,$a0	223	fpu_ct_save 31,$a0
231	#endif	224	#endif
232	j $ra	225	j $ra
233	nop	226	nop
234		227
235	.global fpu_context_restore	228	.global fpu_context_restore
236	fpu_context_restore:	229	fpu_context_restore:
237	#ifdef HAVE_FPU	230	#ifdef HAVE_FPU
238	fpu_gp_restore 0,$a0	231	fpu_gp_restore 0,$a0
239	fpu_gp_restore 1,$a0	232	fpu_gp_restore 1,$a0
240	fpu_gp_restore 2,$a0	233	fpu_gp_restore 2,$a0
241	fpu_gp_restore 3,$a0	234	fpu_gp_restore 3,$a0
242	fpu_gp_restore 4,$a0	235	fpu_gp_restore 4,$a0
243	fpu_gp_restore 5,$a0	236	fpu_gp_restore 5,$a0
244	fpu_gp_restore 6,$a0	237	fpu_gp_restore 6,$a0
245	fpu_gp_restore 7,$a0	238	fpu_gp_restore 7,$a0
246	fpu_gp_restore 8,$a0	239	fpu_gp_restore 8,$a0
247	fpu_gp_restore 9,$a0	240	fpu_gp_restore 9,$a0
248	fpu_gp_restore 10,$a0	241	fpu_gp_restore 10,$a0
249	fpu_gp_restore 11,$a0	242	fpu_gp_restore 11,$a0
250	fpu_gp_restore 12,$a0	243	fpu_gp_restore 12,$a0
251	fpu_gp_restore 13,$a0	244	fpu_gp_restore 13,$a0
252	fpu_gp_restore 14,$a0	245	fpu_gp_restore 14,$a0
253	fpu_gp_restore 15,$a0	246	fpu_gp_restore 15,$a0
254	fpu_gp_restore 16,$a0	247	fpu_gp_restore 16,$a0
255	fpu_gp_restore 17,$a0	248	fpu_gp_restore 17,$a0
256	fpu_gp_restore 18,$a0	249	fpu_gp_restore 18,$a0
257	fpu_gp_restore 19,$a0	250	fpu_gp_restore 19,$a0
258	fpu_gp_restore 20,$a0	251	fpu_gp_restore 20,$a0
259	fpu_gp_restore 21,$a0	252	fpu_gp_restore 21,$a0
260	fpu_gp_restore 22,$a0	253	fpu_gp_restore 22,$a0
261	fpu_gp_restore 23,$a0	254	fpu_gp_restore 23,$a0
262	fpu_gp_restore 24,$a0	255	fpu_gp_restore 24,$a0
263	fpu_gp_restore 25,$a0	256	fpu_gp_restore 25,$a0
264	fpu_gp_restore 26,$a0	257	fpu_gp_restore 26,$a0
265	fpu_gp_restore 27,$a0	258	fpu_gp_restore 27,$a0
266	fpu_gp_restore 28,$a0	259	fpu_gp_restore 28,$a0
267	fpu_gp_restore 29,$a0	260	fpu_gp_restore 29,$a0
268	fpu_gp_restore 30,$a0	261	fpu_gp_restore 30,$a0
269	fpu_gp_restore 31,$a0	262	fpu_gp_restore 31,$a0
270		263
271	fpu_ct_restore 1,$a0	264	fpu_ct_restore 1,$a0
272	fpu_ct_restore 2,$a0	265	fpu_ct_restore 2,$a0
273	fpu_ct_restore 3,$a0	266	fpu_ct_restore 3,$a0
274	fpu_ct_restore 4,$a0	267	fpu_ct_restore 4,$a0
275	fpu_ct_restore 5,$a0	268	fpu_ct_restore 5,$a0
276	fpu_ct_restore 6,$a0	269	fpu_ct_restore 6,$a0
277	fpu_ct_restore 7,$a0	270	fpu_ct_restore 7,$a0
278	fpu_ct_restore 8,$a0	271	fpu_ct_restore 8,$a0
279	fpu_ct_restore 9,$a0	272	fpu_ct_restore 9,$a0
280	fpu_ct_restore 10,$a0	273	fpu_ct_restore 10,$a0
281	fpu_ct_restore 11,$a0	274	fpu_ct_restore 11,$a0
282	fpu_ct_restore 12,$a0	275	fpu_ct_restore 12,$a0
283	fpu_ct_restore 13,$a0	276	fpu_ct_restore 13,$a0
284	fpu_ct_restore 14,$a0	277	fpu_ct_restore 14,$a0
285	fpu_ct_restore 15,$a0	278	fpu_ct_restore 15,$a0
286	fpu_ct_restore 16,$a0	279	fpu_ct_restore 16,$a0
287	fpu_ct_restore 17,$a0	280	fpu_ct_restore 17,$a0
288	fpu_ct_restore 18,$a0	281	fpu_ct_restore 18,$a0
289	fpu_ct_restore 19,$a0	282	fpu_ct_restore 19,$a0
290	fpu_ct_restore 20,$a0	283	fpu_ct_restore 20,$a0
291	fpu_ct_restore 21,$a0	284	fpu_ct_restore 21,$a0
292	fpu_ct_restore 22,$a0	285	fpu_ct_restore 22,$a0
293	fpu_ct_restore 23,$a0	286	fpu_ct_restore 23,$a0
294	fpu_ct_restore 24,$a0	287	fpu_ct_restore 24,$a0
295	fpu_ct_restore 25,$a0	288	fpu_ct_restore 25,$a0
296	fpu_ct_restore 26,$a0	289	fpu_ct_restore 26,$a0
297	fpu_ct_restore 27,$a0	290	fpu_ct_restore 27,$a0
298	fpu_ct_restore 28,$a0	291	fpu_ct_restore 28,$a0
299	fpu_ct_restore 29,$a0	292	fpu_ct_restore 29,$a0
300	fpu_ct_restore 30,$a0	293	fpu_ct_restore 30,$a0
301	fpu_ct_restore 31,$a0	294	fpu_ct_restore 31,$a0
302	#endif	295	#endif
303	j $ra	296	j $ra
304	nop	297	nop
305		298
306	# THIS IS USERSPACE CODE	299	# THIS IS USERSPACE CODE
307	.global utext	300	.global utext
308	utext:	301	utext:
309	j $31	302	j $31
310	nop	303	nop
311	utext_end:	304	utext_end:
312		305
313	.data	306	.data
314	.global utext_size	307	.global utext_size
315	utext_size:	308	utext_size:
316	.long utext_end-utext	309	.long utext_end-utext
317		310
318		311
319		312

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(root)/SPARTAN/trunk/arch/mips/src/asm.S – Rev 329 → 332