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1 
#
 1 
#
2 
# Copyright (C) 2005 Jakub Vana
 2 
# Copyright (C) 2005 Jakub Vana
3 
# All rights reserved.
 3 
# All rights reserved.
4 
#
 4 
#
5 
# Redistribution and use in source and binary forms, with or without
 5 
# Redistribution and use in source and binary forms, with or without
6 
# modification, are permitted provided that the following conditions
 6 
# modification, are permitted provided that the following conditions
7 
# are met:
 7 
# are met:
8 
#
 8 
#
9 
# - Redistributions of source code must retain the above copyright
 9 
# - Redistributions of source code must retain the above copyright
10 
#   notice, this list of conditions and the following disclaimer.
 10 
#   notice, this list of conditions and the following disclaimer.
11 
# - Redistributions in binary form must reproduce the above copyright
 11 
# - Redistributions in binary form must reproduce the above copyright
12 
#   notice, this list of conditions and the following disclaimer in the
 12 
#   notice, this list of conditions and the following disclaimer in the
13 
#   documentation and/or other materials provided with the distribution.
 13 
#   documentation and/or other materials provided with the distribution.
14 
# - The name of the author may not be used to endorse or promote products
 14 
# - The name of the author may not be used to endorse or promote products
15 
#   derived from this software without specific prior written permission.
 15 
#   derived from this software without specific prior written permission.
16 
#
 16 
#
17 
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 17 
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18 
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 18 
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19 
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 19 
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20 
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 20 
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21 
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 21 
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22 
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 22 
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 23 
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 24 
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 25 
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26 
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 26 
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 
#
 27 
#
28 
 
 28 
 
- 
 
 29 
#include <arch/stack.h>
- 
 
 30 
 
- 
 
 31 
#define STACK_ITEMS		12
- 
 
 32 
#define STACK_FRAME_SIZE	((STACK_ITEMS*STACK_ITEM_SIZE) + STACK_SCRATCH_AREA_SIZE)
- 
 
 33 
 
- 
 
 34 
#if (STACK_FRAME_SIZE % STACK_ALIGNMENT != 0)
- 
 
 35 
#error Memory stack must be 16-byte aligned.
- 
 
 36 
#endif
29 
 
 37 
 
30 
/** Heavyweight interrupt handler
 38 
/** Heavyweight interrupt handler
31 
 *
 39 
 *
32 
 * This macro roughly follows steps from 1 to 19 described in
 40 
 * This macro roughly follows steps from 1 to 19 described in
33 
 * Intel Itanium Architecture Software Developer's Manual, Chapter 3.4.2.
 41 
 * Intel Itanium Architecture Software Developer's Manual, Chapter 3.4.2.
34 
 *
 42 
 *
35 
 * HEAVYWEIGHT_HANDLER macro must cram into 16 bundles (48 instructions).
 43 
 * HEAVYWEIGHT_HANDLER macro must cram into 16 bundles (48 instructions).
36 
 * This goal is achieved by using procedure calls after RSE becomes operational.
 44 
 * This goal is achieved by using procedure calls after RSE becomes operational.
37 
 *
 45 
 *
38 
 * Some steps are skipped (enabling and disabling interrupts).
 46 
 * Some steps are skipped (enabling and disabling interrupts).
39 
 * Some steps are not fully supported yet (e.g. interruptions
 47 
 * Some steps are not fully supported yet (e.g. interruptions
40 
 * from userspace and floating-point context).
 48 
 * from userspace and floating-point context).
41 
 */
 49 
 */
42 
.macro HEAVYWEIGHT_HANDLER offs handler
 50 
.macro HEAVYWEIGHT_HANDLER offs handler
43 
    .org IVT + \offs
 51 
    .org IVT + \offs
44 
 
 52 
 
45 
    /* 1. copy interrupt registers into bank 0 */
 53 
    /* 1. copy interrupt registers into bank 0 */
46 
	mov r24 = cr.iip
 54 
	mov r24 = cr.iip
47 
	mov r25 = cr.ipsr
 55 
	mov r25 = cr.ipsr
48 
	mov r26 = cr.iipa
 56 
	mov r26 = cr.iipa
49 
	mov r27 = cr.isr
 57 
	mov r27 = cr.isr
50 
	mov r28 = cr.ifa
 58 
	mov r28 = cr.ifa
51
59
52 
    /* 2. preserve predicate register into bank 0 */
 60 
    /* 2. preserve predicate register into bank 0 */
53 
	mov r29 = pr ;;
 61 
	mov r29 = pr ;;
54
62
55 
    /* 3. switch to kernel memory stack */
 63 
    /* 3. switch to kernel memory stack */
56 
	/* TODO: support interruptions from userspace */
 64 
	/* TODO: support interruptions from userspace */
57 
	/* assume kernel stack */
 65 
	/* assume kernel stack */
58
66
59 
    /* 4. save registers in bank 0 into memory stack */
 67 
    /* 4. save registers in bank 0 into memory stack */
60 
	add r12 = -8, r12 ;;
 68 
	add r31 = -8, r12 ;;
- 
 
 69 
	add r12 = -STACK_FRAME_SIZE, r12 ;;
61
70
62 
	st8 [r12] = r29, -8 ;;	/* save predicate registers */
 71 
	st8 [r31] = r29, -8 ;;	/* save predicate registers */
63 
 
 72 
 
64 
	st8 [r12] = r24, -8 ;;	/* save cr.iip */
 73 
	st8 [r31] = r24, -8 ;;	/* save cr.iip */
65 
	st8 [r12] = r25, -8 ;;	/* save cr.ipsr */
 74 
	st8 [r31] = r25, -8 ;;	/* save cr.ipsr */
66 
	st8 [r12] = r26, -8 ;;	/* save cr.iipa */
 75 
	st8 [r31] = r26, -8 ;;	/* save cr.iipa */
67 
	st8 [r12] = r27, -8 ;;	/* save cr.isr */
 76 
	st8 [r31] = r27, -8 ;;	/* save cr.isr */
68 
	st8 [r12] = r28, -8 ;;	/* save cr.ifa */
77 
	st8 [r31] = r28, -8 ;;	/* save cr.ifa */
69 
 
 78 
 
70 
    /* 5. RSE switch from interrupted context */
 79 
    /* 5. RSE switch from interrupted context */
71 
    	.auto
 80 
    	.auto
72 
	mov r24 = ar.rsc
 81 
	mov r24 = ar.rsc
73 
	mov r25 = ar.pfs
 82 
	mov r25 = ar.pfs
74 
	cover
 83 
	cover
75 
	mov r26 = cr.ifs
 84 
	mov r26 = cr.ifs
76
85
77 
	st8 [r12] = r24, -8	/* save ar.rsc */
 86 
	st8 [r31] = r24, -8	/* save ar.rsc */
78 
	st8 [r12] = r25, -8	/* save ar.pfs */
 87 
	st8 [r31] = r25, -8	/* save ar.pfs */
79 
	st8 [r12] = r26, -8	/* save ar.ifs */
 88 
	st8 [r31] = r26, -8	/* save ar.ifs */
80
89
81 
	and r30 = ~3, r24
 90 
	and r30 = ~3, r24
82 
	mov ar.rsc = r30	/* place RSE in enforced lazy mode */
 91 
	mov ar.rsc = r30	/* place RSE in enforced lazy mode */
83
92
84 
	mov r27 = ar.rnat
 93 
	mov r27 = ar.rnat
85 
	mov r28 = ar.bspstore
 94 
	mov r28 = ar.bspstore
86
95
87 
	/* assume kernel backing store */
 96 
	/* assume kernel backing store */
88 
	mov ar.bspstore = r28
 97 
	mov ar.bspstore = r28
89
98
90 
	mov r29 = ar.bsp
 99 
	mov r29 = ar.bsp
91
100
92 
	st8 [r12] = r27, -8	/* save ar.rnat */
 101 
	st8 [r31] = r27, -8	/* save ar.rnat */
93 
	st8 [r12] = r28, -8	/* save ar.bspstore */
 102 
	st8 [r31] = r28, -8	/* save ar.bspstore */
94 
	st8 [r12] = r29		/* save ar.bsp */
 103 
	st8 [r31] = r29		/* save ar.bsp */
95
104
96 
	mov ar.rsc = r24	/* restore RSE's setting */
 105 
	mov ar.rsc = r24	/* restore RSE's setting */
97 
	.explicit
 106 
	.explicit
98
107
99 
    /* the rest of the save-handler can be kept outside IVT */
 108 
    /* the rest of the save-handler can be kept outside IVT */
100 
 
 109 
 
101 
	movl r24 = \handler
 110 
	movl r24 = \handler
102 
	mov r25 = b0
 111 
	mov r25 = b0
103 
	br.call.sptk.many rp = heavyweight_handler_inner
 112 
	br.call.sptk.many rp = heavyweight_handler_inner
104 
0:	mov b0 = r25
113 
0:	mov b0 = r25
105 
 
 114 
 
106 
	br heavyweight_handler_finalize
 115 
	br heavyweight_handler_finalize
107 
.endm
 116 
.endm
108 
 
 117 
 
109 
.global heavyweight_handler_inner
 118 
.global heavyweight_handler_inner
110 
heavyweight_handler_inner:
 119 
heavyweight_handler_inner:
111 
	/*
 120 
	/*
112 
	 * From this point, the rest of the interrupted context
 121 
	 * From this point, the rest of the interrupted context
113 
	 * will be preserved in stacked registers and backing store.
 122 
	 * will be preserved in stacked registers and backing store.
114 
	 */
 123 
	 */
115 
	alloc loc0 = ar.pfs, 0, 46, 0, 0 ;;
 124 
	alloc loc0 = ar.pfs, 0, 46, 0, 0 ;;
116
125
117 
	/* copy handler address (r24 from bank 0 will be invisible soon) */
 126 
	/* copy handler address (r24 from bank 0 will be invisible soon) */
118 
	mov loc1 = r24
 127 
	mov loc1 = r24
119 
 
 128 
 
120 
    /* 6. switch to bank 1 and reenable PSR.ic */
 129 
    /* 6. switch to bank 1 and reenable PSR.ic */
121 
	ssm 0x2000
 130 
	ssm 0x2000
122 
	bsw.1 ;;
 131 
	bsw.1 ;;
123 
	srlz.d
 132 
	srlz.d
124
133
125 
    /* 7. preserve branch and application registers */
 134 
    /* 7. preserve branch and application registers */
126 
    	mov loc2 = ar.unat
 135 
    	mov loc2 = ar.unat
127 
	mov loc3 = ar.lc
 136 
	mov loc3 = ar.lc
128 
	mov loc4 = ar.ec
 137 
	mov loc4 = ar.ec
129 
	mov loc5 = ar.ccv
 138 
	mov loc5 = ar.ccv
130 
	mov loc6 = ar.csd
 139 
	mov loc6 = ar.csd
131 
	mov loc7 = ar.ssd
 140 
	mov loc7 = ar.ssd
132
141
133 
	mov loc8 = b0
 142 
	mov loc8 = b0
134 
	mov loc9 = b1
 143 
	mov loc9 = b1
135 
	mov loc10 = b2
 144 
	mov loc10 = b2
136 
	mov loc11 = b3
 145 
	mov loc11 = b3
137 
	mov loc12 = b4
 146 
	mov loc12 = b4
138 
	mov loc13 = b5
 147 
	mov loc13 = b5
139 
	mov loc14 = b6
 148 
	mov loc14 = b6
140 
	mov loc15 = b7
 149 
	mov loc15 = b7
141
150
142 
    /* 8. preserve general and floating-point registers */
 151 
    /* 8. preserve general and floating-point registers */
143 
	/* TODO: save floating-point context */
 152 
	/* TODO: save floating-point context */
144 
	mov loc16 = r1
 153 
	mov loc16 = r1
145 
	mov loc17 = r2
 154 
	mov loc17 = r2
146 
	mov loc18 = r3
 155 
	mov loc18 = r3
147 
	mov loc19 = r4
 156 
	mov loc19 = r4
148 
	mov loc20 = r5
 157 
	mov loc20 = r5
149 
	mov loc21 = r6
 158 
	mov loc21 = r6
150 
	mov loc22 = r7
 159 
	mov loc22 = r7
151 
	mov loc23 = r8
 160 
	mov loc23 = r8
152 
	mov loc24 = r9
 161 
	mov loc24 = r9
153 
	mov loc25 = r10
 162 
	mov loc25 = r10
154 
	mov loc26 = r11
 163 
	mov loc26 = r11
155 
	/* skip r12 (stack pointer) */
 164 
	/* skip r12 (stack pointer) */
156 
	mov loc27 = r13
 165 
	mov loc27 = r13
157 
	mov loc28 = r14
 166 
	mov loc28 = r14
158 
	mov loc29 = r15
 167 
	mov loc29 = r15
159 
	mov loc30 = r16
 168 
	mov loc30 = r16
160 
	mov loc31 = r17
 169 
	mov loc31 = r17
161 
	mov loc32 = r18
 170 
	mov loc32 = r18
162 
	mov loc33 = r19
 171 
	mov loc33 = r19
163 
	mov loc34 = r20
 172 
	mov loc34 = r20
164 
	mov loc35 = r21
 173 
	mov loc35 = r21
165 
	mov loc36 = r22
 174 
	mov loc36 = r22
166 
	mov loc37 = r23
 175 
	mov loc37 = r23
167 
	mov loc38 = r24
 176 
	mov loc38 = r24
168 
	mov loc39 = r25
 177 
	mov loc39 = r25
169 
	mov loc40 = r26
 178 
	mov loc40 = r26
170 
	mov loc41 = r27
 179 
	mov loc41 = r27
171 
	mov loc42 = r28
 180 
	mov loc42 = r28
172 
	mov loc43 = r29
 181 
	mov loc43 = r29
173 
	mov loc44 = r30
 182 
	mov loc44 = r30
174 
	mov loc45 = r31
 183 
	mov loc45 = r31
175
184
176 
    /* 9. skipped (will not enable interrupts) */
 185 
    /* 9. skipped (will not enable interrupts) */
177 
 
 186 
 
178 
    /* 10. call handler */
 187 
    /* 10. call handler */
179 
    	mov b1 = loc1
 188 
    	mov b1 = loc1
180 
	br.call.sptk.many b0 = b1
 189 
	br.call.sptk.many b0 = b1
181 
 
 190 
 
182 
    /* 11. return from handler */
 191 
    /* 11. return from handler */
183 
0:
 192 
0:
184
193
185 
    /* 12. skipped (will not disable interrupts) */
 194 
    /* 12. skipped (will not disable interrupts) */
186 
 
 195 
 
187 
    /* 13. restore general and floating-point registers */
 196 
    /* 13. restore general and floating-point registers */
188 
	/* TODO: restore floating-point context */
 197 
	/* TODO: restore floating-point context */
189 
	mov r1 = loc16
 198 
	mov r1 = loc16
190 
	mov r2 = loc17
 199 
	mov r2 = loc17
191 
	mov r3 = loc18
 200 
	mov r3 = loc18
192 
	mov r4 = loc19
 201 
	mov r4 = loc19
193 
	mov r5 = loc20
 202 
	mov r5 = loc20
194 
	mov r6 = loc21
 203 
	mov r6 = loc21
195 
	mov r7 = loc22
 204 
	mov r7 = loc22
196 
	mov r8 = loc23
 205 
	mov r8 = loc23
197 
	mov r9 = loc24
 206 
	mov r9 = loc24
198 
	mov r10 = loc25
 207 
	mov r10 = loc25
199 
	mov r11 = loc26
 208 
	mov r11 = loc26
200 
	/* skip r12 (stack pointer) */
 209 
	/* skip r12 (stack pointer) */
201 
	mov r13 = loc27
 210 
	mov r13 = loc27
202 
	mov r14 = loc28
 211 
	mov r14 = loc28
203 
	mov r15 = loc29
 212 
	mov r15 = loc29
204 
	mov r16 = loc30
 213 
	mov r16 = loc30
205 
	mov r17 = loc31
 214 
	mov r17 = loc31
206 
	mov r18 = loc32
 215 
	mov r18 = loc32
207 
	mov r19 = loc33
 216 
	mov r19 = loc33
208 
	mov r20 = loc34
 217 
	mov r20 = loc34
209 
	mov r21 = loc35
 218 
	mov r21 = loc35
210 
	mov r22 = loc36
 219 
	mov r22 = loc36
211 
	mov r23 = loc37
 220 
	mov r23 = loc37
212 
	mov r24 = loc38
 221 
	mov r24 = loc38
213 
	mov r25 = loc39
 222 
	mov r25 = loc39
214 
	mov r26 = loc40
 223 
	mov r26 = loc40
215 
	mov r27 = loc41
 224 
	mov r27 = loc41
216 
	mov r28 = loc42
 225 
	mov r28 = loc42
217 
	mov r29 = loc43
 226 
	mov r29 = loc43
218 
	mov r30 = loc44
 227 
	mov r30 = loc44
219 
	mov r31 = loc45
 228 
	mov r31 = loc45
220
229
221 
    /* 14. restore branch and application registers */
 230 
    /* 14. restore branch and application registers */
222 
    	mov ar.unat = loc2
 231 
    	mov ar.unat = loc2
223 
	mov ar.lc = loc3
 232 
	mov ar.lc = loc3
224 
	mov ar.ec = loc4
 233 
	mov ar.ec = loc4
225 
	mov ar.ccv = loc5
 234 
	mov ar.ccv = loc5
226 
	mov ar.csd = loc6
 235 
	mov ar.csd = loc6
227 
	mov ar.ssd = loc7
 236 
	mov ar.ssd = loc7
228
237
229 
	mov b0 = loc8
 238 
	mov b0 = loc8
230 
	mov b1 = loc9
 239 
	mov b1 = loc9
231 
	mov b2 = loc10
 240 
	mov b2 = loc10
232 
	mov b3 = loc11
 241 
	mov b3 = loc11
233 
	mov b4 = loc12
 242 
	mov b4 = loc12
234 
	mov b5 = loc13
 243 
	mov b5 = loc13
235 
	mov b6 = loc14
 244 
	mov b6 = loc14
236 
	mov b7 = loc15
 245 
	mov b7 = loc15
237
246
238 
    /* 15. disable PSR.ic and switch to bank 0 */
 247 
    /* 15. disable PSR.ic and switch to bank 0 */
239 
	rsm 0x2000
 248 
	rsm 0x2000
240 
	bsw.0 ;;
 249 
	bsw.0 ;;
241 
	srlz.d
 250 
	srlz.d
242 
 
 251 
 
243 
	mov ar.pfs = loc0
 252 
	mov ar.pfs = loc0
244 
	br.ret.sptk.many rp
 253 
	br.ret.sptk.many rp
245 
 
 254 
 
246 
.global heavyweight_handler_finalize
 255 
.global heavyweight_handler_finalize
247 
heavyweight_handler_finalize:
 256 
heavyweight_handler_finalize:
248 
    /* 16. RSE switch to interrupted context */
 257 
    /* 16. RSE switch to interrupted context */
249
258
250 
    /* 17. restore interruption state from memory stack */
 259 
    /* 17. restore interruption state from memory stack */
251
260
252 
    /* 18. restore predicate registers from memory stack */
 261 
    /* 18. restore predicate registers from memory stack */
253
262
254 
    /* 19. return from interruption */
 263 
    /* 19. return from interruption */
255 
	rfi
 264 
	rfi
256 
 
 265 
 
257 
 
 266 
 
258 
 
 267 
 
259 
 
 268 
 
260 
dump_gregs:
 269 
dump_gregs:
261 
mov r16 = REG_DUMP;;
 270 
mov r16 = REG_DUMP;;
262 
st8 [r16] = r0;;
 271 
st8 [r16] = r0;;
263 
add r16 = 8,r16 ;;
 272 
add r16 = 8,r16 ;;
264 
st8 [r16] = r1;;
 273 
st8 [r16] = r1;;
265 
add r16 = 8,r16 ;;
 274 
add r16 = 8,r16 ;;
266 
st8 [r16] = r2;;
 275 
st8 [r16] = r2;;
267 
add r16 = 8,r16 ;;
 276 
add r16 = 8,r16 ;;
268 
st8 [r16] = r3;;
 277 
st8 [r16] = r3;;
269 
add r16 = 8,r16 ;;
 278 
add r16 = 8,r16 ;;
270 
st8 [r16] = r4;;
 279 
st8 [r16] = r4;;
271 
add r16 = 8,r16 ;;
 280 
add r16 = 8,r16 ;;
272 
st8 [r16] = r5;;
 281 
st8 [r16] = r5;;
273 
add r16 = 8,r16 ;;
 282 
add r16 = 8,r16 ;;
274 
st8 [r16] = r6;;
 283 
st8 [r16] = r6;;
275 
add r16 = 8,r16 ;;
 284 
add r16 = 8,r16 ;;
276 
st8 [r16] = r7;;
 285 
st8 [r16] = r7;;
277 
add r16 = 8,r16 ;;
 286 
add r16 = 8,r16 ;;
278 
st8 [r16] = r8;;
 287 
st8 [r16] = r8;;
279 
add r16 = 8,r16 ;;
 288 
add r16 = 8,r16 ;;
280 
st8 [r16] = r9;;
 289 
st8 [r16] = r9;;
281 
add r16 = 8,r16 ;;
 290 
add r16 = 8,r16 ;;
282 
st8 [r16] = r10;;
 291 
st8 [r16] = r10;;
283 
add r16 = 8,r16 ;;
 292 
add r16 = 8,r16 ;;
284 
st8 [r16] = r11;;
 293 
st8 [r16] = r11;;
285 
add r16 = 8,r16 ;;
 294 
add r16 = 8,r16 ;;
286 
st8 [r16] = r12;;
 295 
st8 [r16] = r12;;
287 
add r16 = 8,r16 ;;
 296 
add r16 = 8,r16 ;;
288 
st8 [r16] = r13;;
 297 
st8 [r16] = r13;;
289 
add r16 = 8,r16 ;;
 298 
add r16 = 8,r16 ;;
290 
st8 [r16] = r14;;
 299 
st8 [r16] = r14;;
291 
add r16 = 8,r16 ;;
 300 
add r16 = 8,r16 ;;
292 
st8 [r16] = r15;;
 301 
st8 [r16] = r15;;
293 
add r16 = 8,r16 ;;
 302 
add r16 = 8,r16 ;;
294 
 
 303 
 
295 
bsw.1;;
 304 
bsw.1;;
296 
mov r15 = r16;;
 305 
mov r15 = r16;;
297 
bsw.0;;
 306 
bsw.0;;
298 
st8 [r16] = r15;;
 307 
st8 [r16] = r15;;
299 
add r16 = 8,r16 ;;
 308 
add r16 = 8,r16 ;;
300 
bsw.1;;
 309 
bsw.1;;
301 
mov r15 = r17;;
 310 
mov r15 = r17;;
302 
bsw.0;;
 311 
bsw.0;;
303 
st8 [r16] = r15;;
 312 
st8 [r16] = r15;;
304 
add r16 = 8,r16 ;;
 313 
add r16 = 8,r16 ;;
305 
bsw.1;;
 314 
bsw.1;;
306 
mov r15 = r18;;
 315 
mov r15 = r18;;
307 
bsw.0;;
 316 
bsw.0;;
308 
st8 [r16] = r15;;
 317 
st8 [r16] = r15;;
309 
add r16 = 8,r16 ;;
 318 
add r16 = 8,r16 ;;
310 
bsw.1;;
 319 
bsw.1;;
311 
mov r15 = r19;;
 320 
mov r15 = r19;;
312 
bsw.0;;
 321 
bsw.0;;
313 
st8 [r16] = r15;;
 322 
st8 [r16] = r15;;
314 
add r16 = 8,r16 ;;
 323 
add r16 = 8,r16 ;;
315 
bsw.1;;
 324 
bsw.1;;
316 
mov r15 = r20;;
 325 
mov r15 = r20;;
317 
bsw.0;;
 326 
bsw.0;;
318 
st8 [r16] = r15;;
 327 
st8 [r16] = r15;;
319 
add r16 = 8,r16 ;;
 328 
add r16 = 8,r16 ;;
320 
bsw.1;;
 329 
bsw.1;;
321 
mov r15 = r21;;
 330 
mov r15 = r21;;
322 
bsw.0;;
 331 
bsw.0;;
323 
st8 [r16] = r15;;
 332 
st8 [r16] = r15;;
324 
add r16 = 8,r16 ;;
 333 
add r16 = 8,r16 ;;
325 
bsw.1;;
 334 
bsw.1;;
326 
mov r15 = r22;;
 335 
mov r15 = r22;;
327 
bsw.0;;
 336 
bsw.0;;
328 
st8 [r16] = r15;;
 337 
st8 [r16] = r15;;
329 
add r16 = 8,r16 ;;
 338 
add r16 = 8,r16 ;;
330 
bsw.1;;
 339 
bsw.1;;
331 
mov r15 = r23;;
 340 
mov r15 = r23;;
332 
bsw.0;;
 341 
bsw.0;;
333 
st8 [r16] = r15;;
 342 
st8 [r16] = r15;;
334 
add r16 = 8,r16 ;;
 343 
add r16 = 8,r16 ;;
335 
bsw.1;;
 344 
bsw.1;;
336 
mov r15 = r24;;
 345 
mov r15 = r24;;
337 
bsw.0;;
 346 
bsw.0;;
338 
st8 [r16] = r15;;
 347 
st8 [r16] = r15;;
339 
add r16 = 8,r16 ;;
 348 
add r16 = 8,r16 ;;
340 
bsw.1;;
 349 
bsw.1;;
341 
mov r15 = r25;;
 350 
mov r15 = r25;;
342 
bsw.0;;
 351 
bsw.0;;
343 
st8 [r16] = r15;;
 352 
st8 [r16] = r15;;
344 
add r16 = 8,r16 ;;
 353 
add r16 = 8,r16 ;;
345 
bsw.1;;
 354 
bsw.1;;
346 
mov r15 = r26;;
 355 
mov r15 = r26;;
347 
bsw.0;;
 356 
bsw.0;;
348 
st8 [r16] = r15;;
 357 
st8 [r16] = r15;;
349 
add r16 = 8,r16 ;;
 358 
add r16 = 8,r16 ;;
350 
bsw.1;;
 359 
bsw.1;;
351 
mov r15 = r27;;
 360 
mov r15 = r27;;
352 
bsw.0;;
 361 
bsw.0;;
353 
st8 [r16] = r15;;
 362 
st8 [r16] = r15;;
354 
add r16 = 8,r16 ;;
 363 
add r16 = 8,r16 ;;
355 
bsw.1;;
 364 
bsw.1;;
356 
mov r15 = r28;;
 365 
mov r15 = r28;;
357 
bsw.0;;
 366 
bsw.0;;
358 
st8 [r16] = r15;;
 367 
st8 [r16] = r15;;
359 
add r16 = 8,r16 ;;
 368 
add r16 = 8,r16 ;;
360 
bsw.1;;
 369 
bsw.1;;
361 
mov r15 = r29;;
 370 
mov r15 = r29;;
362 
bsw.0;;
 371 
bsw.0;;
363 
st8 [r16] = r15;;
 372 
st8 [r16] = r15;;
364 
add r16 = 8,r16 ;;
 373 
add r16 = 8,r16 ;;
365 
bsw.1;;
 374 
bsw.1;;
366 
mov r15 = r30;;
 375 
mov r15 = r30;;
367 
bsw.0;;
 376 
bsw.0;;
368 
st8 [r16] = r15;;
 377 
st8 [r16] = r15;;
369 
add r16 = 8,r16 ;;
 378 
add r16 = 8,r16 ;;
370 
bsw.1;;
 379 
bsw.1;;
371 
mov r15 = r31;;
 380 
mov r15 = r31;;
372 
bsw.0;;
 381 
bsw.0;;
373 
st8 [r16] = r15;;
 382 
st8 [r16] = r15;;
374 
add r16 = 8,r16 ;;
 383 
add r16 = 8,r16 ;;
375 
 
 384 
 
376 
 
 385 
 
377 
st8 [r16] = r32;;
 386 
st8 [r16] = r32;;
378 
add r16 = 8,r16 ;;
 387 
add r16 = 8,r16 ;;
379 
st8 [r16] = r33;;
 388 
st8 [r16] = r33;;
380 
add r16 = 8,r16 ;;
 389 
add r16 = 8,r16 ;;
381 
st8 [r16] = r34;;
 390 
st8 [r16] = r34;;
382 
add r16 = 8,r16 ;;
 391 
add r16 = 8,r16 ;;
383 
st8 [r16] = r35;;
 392 
st8 [r16] = r35;;
384 
add r16 = 8,r16 ;;
 393 
add r16 = 8,r16 ;;
385 
st8 [r16] = r36;;
 394 
st8 [r16] = r36;;
386 
add r16 = 8,r16 ;;
 395 
add r16 = 8,r16 ;;
387 
st8 [r16] = r37;;
 396 
st8 [r16] = r37;;
388 
add r16 = 8,r16 ;;
 397 
add r16 = 8,r16 ;;
389 
st8 [r16] = r38;;
 398 
st8 [r16] = r38;;
390 
add r16 = 8,r16 ;;
 399 
add r16 = 8,r16 ;;
391 
st8 [r16] = r39;;
 400 
st8 [r16] = r39;;
392 
add r16 = 8,r16 ;;
 401 
add r16 = 8,r16 ;;
393 
st8 [r16] = r40;;
 402 
st8 [r16] = r40;;
394 
add r16 = 8,r16 ;;
 403 
add r16 = 8,r16 ;;
395 
st8 [r16] = r41;;
 404 
st8 [r16] = r41;;
396 
add r16 = 8,r16 ;;
 405 
add r16 = 8,r16 ;;
397 
st8 [r16] = r42;;
 406 
st8 [r16] = r42;;
398 
add r16 = 8,r16 ;;
 407 
add r16 = 8,r16 ;;
399 
st8 [r16] = r43;;
 408 
st8 [r16] = r43;;
400 
add r16 = 8,r16 ;;
 409 
add r16 = 8,r16 ;;
401 
st8 [r16] = r44;;
 410 
st8 [r16] = r44;;
402 
add r16 = 8,r16 ;;
 411 
add r16 = 8,r16 ;;
403 
st8 [r16] = r45;;
 412 
st8 [r16] = r45;;
404 
add r16 = 8,r16 ;;
 413 
add r16 = 8,r16 ;;
405 
st8 [r16] = r46;;
 414 
st8 [r16] = r46;;
406 
add r16 = 8,r16 ;;
 415 
add r16 = 8,r16 ;;
407 
st8 [r16] = r47;;
 416 
st8 [r16] = r47;;
408 
add r16 = 8,r16 ;;
 417 
add r16 = 8,r16 ;;
409 
st8 [r16] = r48;;
 418 
st8 [r16] = r48;;
410 
add r16 = 8,r16 ;;
 419 
add r16 = 8,r16 ;;
411 
st8 [r16] = r49;;
 420 
st8 [r16] = r49;;
412 
add r16 = 8,r16 ;;
 421 
add r16 = 8,r16 ;;
413 
st8 [r16] = r50;;
 422 
st8 [r16] = r50;;
414 
add r16 = 8,r16 ;;
 423 
add r16 = 8,r16 ;;
415 
st8 [r16] = r51;;
 424 
st8 [r16] = r51;;
416 
add r16 = 8,r16 ;;
 425 
add r16 = 8,r16 ;;
417 
st8 [r16] = r52;;
 426 
st8 [r16] = r52;;
418 
add r16 = 8,r16 ;;
 427 
add r16 = 8,r16 ;;
419 
st8 [r16] = r53;;
 428 
st8 [r16] = r53;;
420 
add r16 = 8,r16 ;;
 429 
add r16 = 8,r16 ;;
421 
st8 [r16] = r54;;
 430 
st8 [r16] = r54;;
422 
add r16 = 8,r16 ;;
 431 
add r16 = 8,r16 ;;
423 
st8 [r16] = r55;;
 432 
st8 [r16] = r55;;
424 
add r16 = 8,r16 ;;
 433 
add r16 = 8,r16 ;;
425 
st8 [r16] = r56;;
 434 
st8 [r16] = r56;;
426 
add r16 = 8,r16 ;;
 435 
add r16 = 8,r16 ;;
427 
st8 [r16] = r57;;
 436 
st8 [r16] = r57;;
428 
add r16 = 8,r16 ;;
 437 
add r16 = 8,r16 ;;
429 
st8 [r16] = r58;;
 438 
st8 [r16] = r58;;
430 
add r16 = 8,r16 ;;
 439 
add r16 = 8,r16 ;;
431 
st8 [r16] = r59;;
 440 
st8 [r16] = r59;;
432 
add r16 = 8,r16 ;;
 441 
add r16 = 8,r16 ;;
433 
st8 [r16] = r60;;
 442 
st8 [r16] = r60;;
434 
add r16 = 8,r16 ;;
 443 
add r16 = 8,r16 ;;
435 
st8 [r16] = r61;;
 444 
st8 [r16] = r61;;
436 
add r16 = 8,r16 ;;
 445 
add r16 = 8,r16 ;;
437 
st8 [r16] = r62;;
 446 
st8 [r16] = r62;;
438 
add r16 = 8,r16 ;;
 447 
add r16 = 8,r16 ;;
439 
st8 [r16] = r63;;
 448 
st8 [r16] = r63;;
440 
add r16 = 8,r16 ;;
 449 
add r16 = 8,r16 ;;
441 
 
 450 
 
442 
 
 451 
 
443 
 
 452 
 
444 
st8 [r16] = r64;;
 453 
st8 [r16] = r64;;
445 
add r16 = 8,r16 ;;
 454 
add r16 = 8,r16 ;;
446 
st8 [r16] = r65;;
 455 
st8 [r16] = r65;;
447 
add r16 = 8,r16 ;;
 456 
add r16 = 8,r16 ;;
448 
st8 [r16] = r66;;
 457 
st8 [r16] = r66;;
449 
add r16 = 8,r16 ;;
 458 
add r16 = 8,r16 ;;
450 
st8 [r16] = r67;;
 459 
st8 [r16] = r67;;
451 
add r16 = 8,r16 ;;
 460 
add r16 = 8,r16 ;;
452 
st8 [r16] = r68;;
 461 
st8 [r16] = r68;;
453 
add r16 = 8,r16 ;;
 462 
add r16 = 8,r16 ;;
454 
st8 [r16] = r69;;
 463 
st8 [r16] = r69;;
455 
add r16 = 8,r16 ;;
 464 
add r16 = 8,r16 ;;
456 
st8 [r16] = r70;;
 465 
st8 [r16] = r70;;
457 
add r16 = 8,r16 ;;
 466 
add r16 = 8,r16 ;;
458 
st8 [r16] = r71;;
 467 
st8 [r16] = r71;;
459 
add r16 = 8,r16 ;;
 468 
add r16 = 8,r16 ;;
460 
st8 [r16] = r72;;
 469 
st8 [r16] = r72;;
461 
add r16 = 8,r16 ;;
 470 
add r16 = 8,r16 ;;
462 
st8 [r16] = r73;;
 471 
st8 [r16] = r73;;
463 
add r16 = 8,r16 ;;
 472 
add r16 = 8,r16 ;;
464 
st8 [r16] = r74;;
 473 
st8 [r16] = r74;;
465 
add r16 = 8,r16 ;;
 474 
add r16 = 8,r16 ;;
466 
st8 [r16] = r75;;
 475 
st8 [r16] = r75;;
467 
add r16 = 8,r16 ;;
 476 
add r16 = 8,r16 ;;
468 
st8 [r16] = r76;;
 477 
st8 [r16] = r76;;
469 
add r16 = 8,r16 ;;
 478 
add r16 = 8,r16 ;;
470 
st8 [r16] = r77;;
 479 
st8 [r16] = r77;;
471 
add r16 = 8,r16 ;;
 480 
add r16 = 8,r16 ;;
472 
st8 [r16] = r78;;
 481 
st8 [r16] = r78;;
473 
add r16 = 8,r16 ;;
 482 
add r16 = 8,r16 ;;
474 
st8 [r16] = r79;;
 483 
st8 [r16] = r79;;
475 
add r16 = 8,r16 ;;
 484 
add r16 = 8,r16 ;;
476 
st8 [r16] = r80;;
 485 
st8 [r16] = r80;;
477 
add r16 = 8,r16 ;;
 486 
add r16 = 8,r16 ;;
478 
st8 [r16] = r81;;
 487 
st8 [r16] = r81;;
479 
add r16 = 8,r16 ;;
 488 
add r16 = 8,r16 ;;
480 
st8 [r16] = r82;;
 489 
st8 [r16] = r82;;
481 
add r16 = 8,r16 ;;
 490 
add r16 = 8,r16 ;;
482 
st8 [r16] = r83;;
 491 
st8 [r16] = r83;;
483 
add r16 = 8,r16 ;;
 492 
add r16 = 8,r16 ;;
484 
st8 [r16] = r84;;
 493 
st8 [r16] = r84;;
485 
add r16 = 8,r16 ;;
 494 
add r16 = 8,r16 ;;
486 
st8 [r16] = r85;;
 495 
st8 [r16] = r85;;
487 
add r16 = 8,r16 ;;
 496 
add r16 = 8,r16 ;;
488 
st8 [r16] = r86;;
 497 
st8 [r16] = r86;;
489 
add r16 = 8,r16 ;;
 498 
add r16 = 8,r16 ;;
490 
st8 [r16] = r87;;
 499 
st8 [r16] = r87;;
491 
add r16 = 8,r16 ;;
 500 
add r16 = 8,r16 ;;
492 
st8 [r16] = r88;;
 501 
st8 [r16] = r88;;
493 
add r16 = 8,r16 ;;
 502 
add r16 = 8,r16 ;;
494 
st8 [r16] = r89;;
 503 
st8 [r16] = r89;;
495 
add r16 = 8,r16 ;;
 504 
add r16 = 8,r16 ;;
496 
st8 [r16] = r90;;
 505 
st8 [r16] = r90;;
497 
add r16 = 8,r16 ;;
 506 
add r16 = 8,r16 ;;
498 
st8 [r16] = r91;;
 507 
st8 [r16] = r91;;
499 
add r16 = 8,r16 ;;
 508 
add r16 = 8,r16 ;;
500 
st8 [r16] = r92;;
 509 
st8 [r16] = r92;;
501 
add r16 = 8,r16 ;;
 510 
add r16 = 8,r16 ;;
502 
st8 [r16] = r93;;
 511 
st8 [r16] = r93;;
503 
add r16 = 8,r16 ;;
 512 
add r16 = 8,r16 ;;
504 
st8 [r16] = r94;;
 513 
st8 [r16] = r94;;
505 
add r16 = 8,r16 ;;
 514 
add r16 = 8,r16 ;;
506 
st8 [r16] = r95;;
 515 
st8 [r16] = r95;;
507 
add r16 = 8,r16 ;;
 516 
add r16 = 8,r16 ;;
508 
 
 517 
 
509 
 
 518 
 
510 
 
 519 
 
511 
st8 [r16] = r96;;
 520 
st8 [r16] = r96;;
512 
add r16 = 8,r16 ;;
 521 
add r16 = 8,r16 ;;
513 
st8 [r16] = r97;;
 522 
st8 [r16] = r97;;
514 
add r16 = 8,r16 ;;
 523 
add r16 = 8,r16 ;;
515 
st8 [r16] = r98;;
 524 
st8 [r16] = r98;;
516 
add r16 = 8,r16 ;;
 525 
add r16 = 8,r16 ;;
517 
st8 [r16] = r99;;
 526 
st8 [r16] = r99;;
518 
add r16 = 8,r16 ;;
 527 
add r16 = 8,r16 ;;
519 
st8 [r16] = r100;;
 528 
st8 [r16] = r100;;
520 
add r16 = 8,r16 ;;
 529 
add r16 = 8,r16 ;;
521 
st8 [r16] = r101;;
 530 
st8 [r16] = r101;;
522 
add r16 = 8,r16 ;;
 531 
add r16 = 8,r16 ;;
523 
st8 [r16] = r102;;
 532 
st8 [r16] = r102;;
524 
add r16 = 8,r16 ;;
 533 
add r16 = 8,r16 ;;
525 
st8 [r16] = r103;;
 534 
st8 [r16] = r103;;
526 
add r16 = 8,r16 ;;
 535 
add r16 = 8,r16 ;;
527 
st8 [r16] = r104;;
 536 
st8 [r16] = r104;;
528 
add r16 = 8,r16 ;;
 537 
add r16 = 8,r16 ;;
529 
st8 [r16] = r105;;
 538 
st8 [r16] = r105;;
530 
add r16 = 8,r16 ;;
 539 
add r16 = 8,r16 ;;
531 
st8 [r16] = r106;;
 540 
st8 [r16] = r106;;
532 
add r16 = 8,r16 ;;
 541 
add r16 = 8,r16 ;;
533 
st8 [r16] = r107;;
 542 
st8 [r16] = r107;;
534 
add r16 = 8,r16 ;;
 543 
add r16 = 8,r16 ;;
535 
st8 [r16] = r108;;
 544 
st8 [r16] = r108;;
536 
add r16 = 8,r16 ;;
 545 
add r16 = 8,r16 ;;
537 
st8 [r16] = r109;;
 546 
st8 [r16] = r109;;
538 
add r16 = 8,r16 ;;
 547 
add r16 = 8,r16 ;;
539 
st8 [r16] = r110;;
 548 
st8 [r16] = r110;;
540 
add r16 = 8,r16 ;;
 549 
add r16 = 8,r16 ;;
541 
st8 [r16] = r111;;
 550 
st8 [r16] = r111;;
542 
add r16 = 8,r16 ;;
 551 
add r16 = 8,r16 ;;
543 
st8 [r16] = r112;;
 552 
st8 [r16] = r112;;
544 
add r16 = 8,r16 ;;
 553 
add r16 = 8,r16 ;;
545 
st8 [r16] = r113;;
 554 
st8 [r16] = r113;;
546 
add r16 = 8,r16 ;;
 555 
add r16 = 8,r16 ;;
547 
st8 [r16] = r114;;
 556 
st8 [r16] = r114;;
548 
add r16 = 8,r16 ;;
 557 
add r16 = 8,r16 ;;
549 
st8 [r16] = r115;;
 558 
st8 [r16] = r115;;
550 
add r16 = 8,r16 ;;
 559 
add r16 = 8,r16 ;;
551 
st8 [r16] = r116;;
 560 
st8 [r16] = r116;;
552 
add r16 = 8,r16 ;;
 561 
add r16 = 8,r16 ;;
553 
st8 [r16] = r117;;
 562 
st8 [r16] = r117;;
554 
add r16 = 8,r16 ;;
 563 
add r16 = 8,r16 ;;
555 
st8 [r16] = r118;;
 564 
st8 [r16] = r118;;
556 
add r16 = 8,r16 ;;
 565 
add r16 = 8,r16 ;;
557 
st8 [r16] = r119;;
 566 
st8 [r16] = r119;;
558 
add r16 = 8,r16 ;;
 567 
add r16 = 8,r16 ;;
559 
st8 [r16] = r120;;
 568 
st8 [r16] = r120;;
560 
add r16 = 8,r16 ;;
 569 
add r16 = 8,r16 ;;
561 
st8 [r16] = r121;;
 570 
st8 [r16] = r121;;
562 
add r16 = 8,r16 ;;
 571 
add r16 = 8,r16 ;;
563 
st8 [r16] = r122;;
 572 
st8 [r16] = r122;;
564 
add r16 = 8,r16 ;;
 573 
add r16 = 8,r16 ;;
565 
st8 [r16] = r123;;
 574 
st8 [r16] = r123;;
566 
add r16 = 8,r16 ;;
 575 
add r16 = 8,r16 ;;
567 
st8 [r16] = r124;;
 576 
st8 [r16] = r124;;
568 
add r16 = 8,r16 ;;
 577 
add r16 = 8,r16 ;;
569 
st8 [r16] = r125;;
 578 
st8 [r16] = r125;;
570 
add r16 = 8,r16 ;;
 579 
add r16 = 8,r16 ;;
571 
st8 [r16] = r126;;
 580 
st8 [r16] = r126;;
572 
add r16 = 8,r16 ;;
 581 
add r16 = 8,r16 ;;
573 
st8 [r16] = r127;;
 582 
st8 [r16] = r127;;
574 
add r16 = 8,r16 ;;
 583 
add r16 = 8,r16 ;;
575 
 
 584 
 
576 
 
 585 
 
577 
 
 586 
 
578 
br.ret.sptk.many b0;;
 587 
br.ret.sptk.many b0;;
579 
 
 588 
 
580 
 
 589 
 
581 
 
 590 
 
582 
 
 591 
 
583 
 
 592 
 
584 
.macro Handler o h
 593 
.macro Handler o h
585 
.org IVT + \o
 594 
.org IVT + \o
586 
br \h;;
 595 
br \h;;
587 
.endm
 596 
.endm
588 
 
 597 
 
589 
.macro Handler2 o
598 
.macro Handler2 o
590 
.org IVT + \o
 599 
.org IVT + \o
591 
br.call.sptk.many b0 = dump_gregs;;
 600 
br.call.sptk.many b0 = dump_gregs;;
592 
mov r16 = \o ;;
 601 
mov r16 = \o ;;
593 
bsw.1;;
 602 
bsw.1;;
594 
br universal_handler;;
 603 
br universal_handler;;
595 
.endm
 604 
.endm
596 
 
 605 
 
597 
 
 606 
 
598 
 
 607 
 
599 
.global IVT
 608 
.global IVT
600 
.align 32768
 609 
.align 32768
601 
IVT:
 610 
IVT:
602 
 
 611 
 
603 
 
 612 
 
604 
Handler2 0x0000
 613 
Handler2 0x0000
605 
Handler2 0x0400
 614 
Handler2 0x0400
606 
Handler2 0x0800
 615 
Handler2 0x0800
607 
Handler2 0x0c00
 616 
Handler2 0x0c00
608 
Handler2 0x1000
 617 
Handler2 0x1000
609 
Handler2 0x1400
 618 
Handler2 0x1400
610 
Handler2 0x1800
 619 
Handler2 0x1800
611 
Handler2 0x1c00
 620 
Handler2 0x1c00
612 
Handler2 0x2000
 621 
Handler2 0x2000
613 
Handler2 0x2400
 622 
Handler2 0x2400
614 
Handler2 0x2800
 623 
Handler2 0x2800
615 
Handler 0x2c00 break_instruction
 624 
Handler 0x2c00 break_instruction
616 
HEAVYWEIGHT_HANDLER 0x3000 external_interrupt	/* For external interrupt, heavyweight handler is used. */
 625 
HEAVYWEIGHT_HANDLER 0x3000 external_interrupt	/* For external interrupt, heavyweight handler is used. */
617 
Handler2 0x3400
 626 
Handler2 0x3400
618 
Handler2 0x3800
 627 
Handler2 0x3800
619 
Handler2 0x3c00
 628 
Handler2 0x3c00
620 
Handler2 0x4000
 629 
Handler2 0x4000
621 
Handler2 0x4400
 630 
Handler2 0x4400
622 
Handler2 0x4800
 631 
Handler2 0x4800
623 
Handler2 0x4c00
 632 
Handler2 0x4c00
624 
 
 633 
 
625 
Handler2 0x5000
 634 
Handler2 0x5000
626 
Handler2 0x5100
 635 
Handler2 0x5100
627 
Handler2 0x5200
 636 
Handler2 0x5200
628 
Handler2 0x5300
 637 
Handler2 0x5300
629 
#Handler 0x5400 general_exception
 638 
#Handler 0x5400 general_exception
630 
Handler2 0x5400
 639 
Handler2 0x5400
631 
Handler2 0x5500
 640 
Handler2 0x5500
632 
Handler2 0x5600
 641 
Handler2 0x5600
633 
Handler2 0x5700
 642 
Handler2 0x5700
634 
Handler2 0x5800
 643 
Handler2 0x5800
635 
Handler2 0x5900
 644 
Handler2 0x5900
636 
Handler2 0x5a00
 645 
Handler2 0x5a00
637 
Handler2 0x5b00
 646 
Handler2 0x5b00
638 
Handler2 0x5c00
 647 
Handler2 0x5c00
639 
Handler2 0x5d00
 648 
Handler2 0x5d00
640 
Handler2 0x5e00
 649 
Handler2 0x5e00
641 
Handler2 0x5f00
 650 
Handler2 0x5f00
642 
 
 651 
 
643 
Handler2 0x6000
 652 
Handler2 0x6000
644 
Handler2 0x6100
 653 
Handler2 0x6100
645 
Handler2 0x6200
 654 
Handler2 0x6200
646 
Handler2 0x6300
 655 
Handler2 0x6300
647 
Handler2 0x6400
 656 
Handler2 0x6400
648 
Handler2 0x6500
 657 
Handler2 0x6500
649 
Handler2 0x6600
 658 
Handler2 0x6600
650 
Handler2 0x6700
 659 
Handler2 0x6700
651 
Handler2 0x6800
 660 
Handler2 0x6800
652 
Handler2 0x6900
 661 
Handler2 0x6900
653 
Handler2 0x6a00
 662 
Handler2 0x6a00
654 
Handler2 0x6b00
 663 
Handler2 0x6b00
655 
Handler2 0x6c00
 664 
Handler2 0x6c00
656 
Handler2 0x6d00
 665 
Handler2 0x6d00
657 
Handler2 0x6e00
 666 
Handler2 0x6e00
658 
Handler2 0x6f00
 667 
Handler2 0x6f00
659 
 
 668 
 
660 
Handler2 0x7000
 669 
Handler2 0x7000
661 
Handler2 0x7100
 670 
Handler2 0x7100
662 
Handler2 0x7200
 671 
Handler2 0x7200
663 
Handler2 0x7300
 672 
Handler2 0x7300
664 
Handler2 0x7400
 673 
Handler2 0x7400
665 
Handler2 0x7500
 674 
Handler2 0x7500
666 
Handler2 0x7600
 675 
Handler2 0x7600
667 
Handler2 0x7700
 676 
Handler2 0x7700
668 
Handler2 0x7800
 677 
Handler2 0x7800
669 
Handler2 0x7900
 678 
Handler2 0x7900
670 
Handler2 0x7a00
 679 
Handler2 0x7a00
671 
Handler2 0x7b00
 680 
Handler2 0x7b00
672 
Handler2 0x7c00
 681 
Handler2 0x7c00
673 
Handler2 0x7d00
 682 
Handler2 0x7d00
674 
Handler2 0x7e00
 683 
Handler2 0x7e00
675 
Handler2 0x7f00
 684 
Handler2 0x7f00
676 
 
 685 
 
677 
 
 686 
 
678 
 
 687 
 
679 
 
 688 
 
680 
 
 689 
 
681 
 
 690 
 
682 
 
 691 
 
683 
 
 692 
 
684 
.align 32768
 693 
.align 32768
685 
.global REG_DUMP
 694 
.global REG_DUMP
686 
 
 695 
 
687 
REG_DUMP:
 696 
REG_DUMP:
688 
.space 128*8
 697 
.space 128*8
689 
 
 698 
 
690 
 
 699