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| 1 | #include <cpu.h> |
1 | #include <cpu.h> |
| 2 | #include <print.h> |
2 | #include <print.h> |
| 3 | #include <panic.h> |
3 | #include <panic.h> |
| 4 | #include <arch/types.h> |
4 | #include <arch/types.h> |
| 5 | 5 | ||
| 6 | extern int IVT; |
6 | extern int IVT; |
| 7 | 7 | ||
| 8 | 8 | ||
| 9 | 9 | ||
| 10 | 10 | ||
| 11 | void cpu_arch_init(void) |
11 | void cpu_arch_init(void) |
| 12 | { |
12 | { |
| 13 | 13 | ||
| 14 | 14 | ||
| 15 | 15 | ||
| 16 | int *p=&IVT; |
16 | int *p=&IVT; |
| 17 | 17 | ||
| 18 | volatile __u64 hlp,hlp2; |
18 | volatile __u64 hlp,hlp2; |
| 19 | 19 | ||
| 20 | 20 | ||
| 21 | int psr = 0x2000; |
21 | int psr = 0x2000; |
| 22 | 22 | ||
| 23 | __asm__ volatile ( |
23 | __asm__ volatile ( |
| 24 | "mov r15 = %0;;" |
24 | "mov r15 = %0;;" |
| 25 | "mov cr2 = r15;;" |
25 | "mov cr2 = r15;;" |
| 26 | "mov psr.l = %1;;" |
26 | "mov psr.l = %1;;" |
| 27 | : |
27 | : |
| 28 | : "r" (p), "r" (psr) |
28 | : "r" (p), "r" (psr) |
| 29 | : "r15" |
29 | : "r15" |
| 30 | ); |
30 | ); |
| 31 | 31 | ||
| 32 | 32 | ||
| 33 | 33 | ||
| 34 | /*Switch register bank of regs r16 .. r31 to 1 It is automaticly cleared on exception*/ |
34 | /*Switch register bank of regs r16 .. r31 to 1 It is automaticly cleared on exception*/ |
| 35 | __asm__ volatile ("bsw.1;;"); |
35 | __asm__ volatile ("bsw.1;;"); |
| 36 | 36 | ||
| 37 | 37 | ||
| 38 | } |
38 | } |
| 39 | 39 | ||
| 40 | 40 | ||
| 41 | void gugux_pokus(void); |
- | |
| 42 | void gugux_pokus(void) |
- | |
| 43 | { |
- | |
| 44 | panic("\n\nGUGUX Exception\n\n"); |
- | |
| 45 | } |
- | |
| 46 | - | ||
| 47 | - | ||
| 48 | - | ||
| 49 | 41 | ||