WebSVN – HelenOS – Diff – /SPARTAN/trunk/arch/ia64/src/context.S


#
# Copyright (C) 2005 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
#   notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
#   notice, this list of conditions and the following disclaimer in the
#   documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
#   derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
.text
 
.global context_save
.global context_restore
 
context_save:
	alloc loc0 = ar.pfs, 1, 11, 0, 0
	mov loc1 = ar.unat	;;
	/* loc2 */
	mov loc3 = ar.rsc
 
	.auto
 
	/*
	 * Flush dirty registers to backing store.
	 * After this ar.bsp and ar.bspstore are equal.
	 */
	flushrs
	mov loc4 = ar.bsp	
	
	/*
	 * Put RSE to enforced lazy mode.
	 * So that ar.rnat can be read.
	 */
	movl loc5 = ~3
	and loc5 = loc3, loc5
	mov ar.rsc = loc5
	mov loc5 = ar.rnat
 
	.explicit
 
	mov loc6 = ar.lc
	mov loc7 = ar.ec
	mov loc8 = ar.ccv
	mov loc9 = ar.csd
	mov loc10 = ar.ssd
	
	/*
	 * Save application registers
	 */
	st8 [in0] = loc0, 8	;;	/* save ar.pfs */
	st8 [in0] = loc1, 8	;;	/* save ar.unat (caller) */
	mov loc2 = in0		;;
	add in0 = 8, in0	;;	/* skip ar.unat (callee) */
	st8 [in0] = loc3, 8	;;	/* save ar.rsc */
	st8 [in0] = loc4, 8	;;	/* save ar.bsp */
	st8 [in0] = loc5, 8	;;	/* save ar.rnat */
	st8 [in0] = loc6, 8	;;	/* save ar.lc */
	st8 [in0] = loc7, 8	;;	/* save ar.ec */
	st8 [in0] = loc8, 8	;;	/* save ar.ccv */
	st8 [in0] = loc9, 8	;;	/* save ar.csd */
	st8 [in0] = loc10, 8	;;	/* save ar.ssd */	
	
	/*
	 * Save general registers including NaT bits
	 */
	st8.spill [in0] = r1, 8		;;
	st8.spill [in0] = r2, 8		;;
	st8.spill [in0] = r3, 8		;;
	st8.spill [in0] = r4, 8		;;
	st8.spill [in0] = r5, 8		;;
	st8.spill [in0] = r6, 8		;;
	st8.spill [in0] = r7, 8		;;
	st8.spill [in0] = r8, 8		;;
	st8.spill [in0] = r9, 8		;;
	st8.spill [in0] = r10, 8	;;
	st8.spill [in0] = r11, 8	;;
	st8.spill [in0] = r12, 8	;;	/* save sp */
	st8.spill [in0] = r13, 8	;;
	st8.spill [in0] = r14, 8	;;
	st8.spill [in0] = r15, 8	;;
	st8.spill [in0] = r16, 8	;;
	st8.spill [in0] = r17, 8	;;
	st8.spill [in0] = r18, 8	;;
	st8.spill [in0] = r19, 8	;;
	st8.spill [in0] = r20, 8	;;
	st8.spill [in0] = r21, 8	;;
	st8.spill [in0] = r22, 8	;;
	st8.spill [in0] = r23, 8	;;
	st8.spill [in0] = r24, 8	;;
	st8.spill [in0] = r25, 8	;;
	st8.spill [in0] = r26, 8	;;
	st8.spill [in0] = r27, 8	;;
	st8.spill [in0] = r28, 8	;;
	st8.spill [in0] = r29, 8	;;
	st8.spill [in0] = r30, 8	;;
	st8.spill [in0] = r31, 8	;;
 
	mov loc3 = ar.unat		;;
	st8 [loc2] = loc3		/* save ar.unat (callee) */
 
	/*
	 * Save branch registers
	 */
	mov loc2 = b0		;;
	st8 [in0] = loc2, 8		/* save pc */
	mov loc3 = b1		;;
	st8 [in0] = loc3, 8
	mov loc4 = b2		;;
	st8 [in0] = loc4, 8
	mov loc5 = b3		;;
	st8 [in0] = loc5, 8
	mov loc6 = b4		;;
	st8 [in0] = loc6, 8
	mov loc7 = b5		;;
	st8 [in0] = loc7, 8
	mov loc8 = b6		;;
	st8 [in0] = loc8, 8
	mov loc9 = b7		;;
	st8 [in0] = loc9, 8
 
	/*
	 * Save predicate registers
	 */
	mov loc2 = pr		;;
	st8 [in0] = loc2, 8
	
	mov ar.pfs = loc0
	mov ar.unat = loc1
	
	add r8 = r0, r0, 1 		/* context_save returns 1 */
	br.ret.sptk.many b0
 
context_restore:
	alloc loc0 = ar.pfs, 1, 11, 0, 0	;;
 
	ld8 loc0 = [in0], 8	;;	/* load ar.pfs */
	ld8 loc1 = [in0], 8	;;	/* load ar.unat (caller) */
	ld8 loc2 = [in0], 8	;;	/* load ar.unat (callee) */
	ld8 loc3 = [in0], 8	;;	/* load ar.rsc */
	ld8 loc4 = [in0], 8	;;	/* load ar.bsp */
	ld8 loc5 = [in0], 8	;;	/* load ar.rnat */
	ld8 loc6 = [in0], 8	;;	/* load ar.lc */
	ld8 loc7 = [in0], 8	;;	/* load ar.ec */
	ld8 loc8 = [in0], 8	;;	/* load ar.ccv */
	ld8 loc9 = [in0], 8	;;	/* load ar.csd */
	ld8 loc10 = [in0], 8	;;	/* load ar.ssd */
	
	.auto	
 
	/*
	 * Invalidate the ALAT
	 */
	invala
 
	/*
	 * Restore application registers
	 */
 
	mov ar.bspstore = loc4
	mov ar.rnat = loc5
	mov ar.pfs = loc0
	mov ar.rsc = loc3
 
	.explicit
 
	mov ar.unat = loc2	;;
 
	mov ar.lc = loc6
	mov ar.ec = loc7
	mov ar.ccv = loc8
	mov ar.csd = loc9
	mov ar.ssd = loc10
	
	/*
	 * Restore general registers including NaT bits
	 */
	ld8.fill r1 = [in0], 8	;;
	ld8.fill r2 = [in0], 8	;;
	ld8.fill r3 = [in0], 8	;;
	ld8.fill r4 = [in0], 8	;;
	ld8.fill r5 = [in0], 8	;;
	ld8.fill r6 = [in0], 8	;;
	ld8.fill r7 = [in0], 8	;;
	ld8.fill r8 = [in0], 8	;;
	ld8.fill r9 = [in0], 8	;;
	ld8.fill r10 = [in0], 8	;;
	ld8.fill r11 = [in0], 8	;;
	ld8.fill r12 = [in0], 8	;;	/* restore sp */
	ld8.fill r13 = [in0], 8	;;
	ld8.fill r14 = [in0], 8	;;
	ld8.fill r15 = [in0], 8	;;
	ld8.fill r16 = [in0], 8	;;
	ld8.fill r17 = [in0], 8	;;
	ld8.fill r18 = [in0], 8	;;
	ld8.fill r19 = [in0], 8	;;
	ld8.fill r20 = [in0], 8	;;
	ld8.fill r21 = [in0], 8	;;
	ld8.fill r22 = [in0], 8	;;
	ld8.fill r23 = [in0], 8	;;
	ld8.fill r24 = [in0], 8	;;
	ld8.fill r25 = [in0], 8	;;
	ld8.fill r26 = [in0], 8	;;
	ld8.fill r27 = [in0], 8	;;
	ld8.fill r28 = [in0], 8	;;
	ld8.fill r29 = [in0], 8	;;
	ld8.fill r30 = [in0], 8	;;
	ld8.fill r31 = [in0], 8	;;
 
	/* 
	 * Restore branch registers
	 */
	ld8 loc2 = [in0], 8	;;	/* restore pc */
	mov b0 = loc2
	ld8 loc3 = [in0], 8	;;
	mov b1 = loc3
	ld8 loc4 = [in0], 8	;;
	mov b2 = loc4
	ld8 loc5 = [in0], 8	;;
	mov b3 = loc5
	ld8 loc6 = [in0], 8	;;
	mov b4 = loc6
	ld8 loc7 = [in0], 8	;;
	mov b5 = loc7
	ld8 loc8 = [in0], 8	;;
	mov b6 = loc8
	ld8 loc9 = [in0], 8	;;
	mov b7 = loc9
 
	/*
	 * Restore predicate registers
	 */
	ld8 loc2 = [in0], 8	;;
	mov pr = loc2, ~0
	
 
	mov ar.unat = loc1
	
	mov r8 = r0			/* context_restore returns 0 */
	br.ret.sptk.many b0
 

Rev 94	Rev 100
1	#	1	#
2	# Copyright (C) 2005 Jakub Jermar	2	# Copyright (C) 2005 Jakub Jermar
3	# All rights reserved.	3	# All rights reserved.
4	#	4	#
5	# Redistribution and use in source and binary forms, with or without	5	# Redistribution and use in source and binary forms, with or without
6	# modification, are permitted provided that the following conditions	6	# modification, are permitted provided that the following conditions
7	# are met:	7	# are met:
8	#	8	#
9	# - Redistributions of source code must retain the above copyright	9	# - Redistributions of source code must retain the above copyright
10	# notice, this list of conditions and the following disclaimer.	10	# notice, this list of conditions and the following disclaimer.
11	# - Redistributions in binary form must reproduce the above copyright	11	# - Redistributions in binary form must reproduce the above copyright
12	# notice, this list of conditions and the following disclaimer in the	12	# notice, this list of conditions and the following disclaimer in the
13	# documentation and/or other materials provided with the distribution.	13	# documentation and/or other materials provided with the distribution.
14	# - The name of the author may not be used to endorse or promote products	14	# - The name of the author may not be used to endorse or promote products
15	# derived from this software without specific prior written permission.	15	# derived from this software without specific prior written permission.
16	#	16	#
17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	#	27	#
28		28
29	.text	29	.text
30		30
31	.global context_save	31	.global context_save
32	.global context_restore	32	.global context_restore
33		33
34	context_save:	34	context_save:
35	alloc loc0 = ar.pfs, 1, 11, 0, 0	35	alloc loc0 = ar.pfs, 1, 11, 0, 0
36	mov loc1 = ar.unat ;;	36	mov loc1 = ar.unat ;;
37	/* loc2 */	37	/* loc2 */
38	mov loc3 = ar.rsc	38	mov loc3 = ar.rsc
-		39
-		40	.auto
-		41
-		42	/*
-		43	* Flush dirty registers to backing store.
-		44	* After this ar.bsp and ar.bspstore are equal.
-		45	*/
-		46	flushrs
39	mov loc4 = ar.bsp	47	mov loc4 = ar.bsp
-		48
-		49	/*
-		50	* Put RSE to enforced lazy mode.
-		51	* So that ar.rnat can be read.
-		52	*/
-		53	movl loc5 = ~3
-		54	and loc5 = loc3, loc5
-		55	mov ar.rsc = loc5
40	mov loc5 = ar.rnat	56	mov loc5 = ar.rnat
-		57
-		58	.explicit
-		59
41	mov loc6 = ar.lc	60	mov loc6 = ar.lc
42	mov loc7 = ar.ec	61	mov loc7 = ar.ec
43	mov loc8 = ar.ccv	62	mov loc8 = ar.ccv
44	mov loc9 = ar.csd	63	mov loc9 = ar.csd
45	mov loc10 = ar.ssd	64	mov loc10 = ar.ssd
46		65
47	/*	66	/*
48	* Save application registers	67	* Save application registers
49	*/	68	*/
50	st8 [in0] = loc0, 8 ;; /* save ar.pfs */	69	st8 [in0] = loc0, 8 ;; /* save ar.pfs */
51	st8 [in0] = loc1, 8 ;; /* save ar.unat (caller) */	70	st8 [in0] = loc1, 8 ;; /* save ar.unat (caller) */
52	mov loc2 = in0 ;;	71	mov loc2 = in0 ;;
53	add in0 = 8, in0 ;; /* skip ar.unat (callee) */	72	add in0 = 8, in0 ;; /* skip ar.unat (callee) */
54	st8 [in0] = loc3, 8 ;; /* save ar.rsc */	73	st8 [in0] = loc3, 8 ;; /* save ar.rsc */
55	st8 [in0] = loc4, 8 ;; /* save ar.bsp */	74	st8 [in0] = loc4, 8 ;; /* save ar.bsp */
56	st8 [in0] = loc5, 8 ;; /* save ar.rnat */	75	st8 [in0] = loc5, 8 ;; /* save ar.rnat */
57	st8 [in0] = loc6, 8 ;; /* save ar.lc */	76	st8 [in0] = loc6, 8 ;; /* save ar.lc */
58	st8 [in0] = loc7, 8 ;; /* save ar.ec */	77	st8 [in0] = loc7, 8 ;; /* save ar.ec */
59	st8 [in0] = loc8, 8 ;; /* save ar.ccv */	78	st8 [in0] = loc8, 8 ;; /* save ar.ccv */
60	st8 [in0] = loc9, 8 ;; /* save ar.csd */	79	st8 [in0] = loc9, 8 ;; /* save ar.csd */
61	st8 [in0] = loc10, 8 ;; /* save ar.ssd */	80	st8 [in0] = loc10, 8 ;; /* save ar.ssd */
62		81
63	/*	82	/*
64	* Save general registers including NaT bits	83	* Save general registers including NaT bits
65	*/	84	*/
66	st8.spill [in0] = r1, 8 ;;	85	st8.spill [in0] = r1, 8 ;;
67	st8.spill [in0] = r2, 8 ;;	86	st8.spill [in0] = r2, 8 ;;
68	st8.spill [in0] = r3, 8 ;;	87	st8.spill [in0] = r3, 8 ;;
69	st8.spill [in0] = r4, 8 ;;	88	st8.spill [in0] = r4, 8 ;;
70	st8.spill [in0] = r5, 8 ;;	89	st8.spill [in0] = r5, 8 ;;
71	st8.spill [in0] = r6, 8 ;;	90	st8.spill [in0] = r6, 8 ;;
72	st8.spill [in0] = r7, 8 ;;	91	st8.spill [in0] = r7, 8 ;;
73	st8.spill [in0] = r8, 8 ;;	92	st8.spill [in0] = r8, 8 ;;
74	st8.spill [in0] = r9, 8 ;;	93	st8.spill [in0] = r9, 8 ;;
75	st8.spill [in0] = r10, 8 ;;	94	st8.spill [in0] = r10, 8 ;;
76	st8.spill [in0] = r11, 8 ;;	95	st8.spill [in0] = r11, 8 ;;
77	st8.spill [in0] = r12, 8 ;; /* save sp */	96	st8.spill [in0] = r12, 8 ;; /* save sp */
78	st8.spill [in0] = r13, 8 ;;	97	st8.spill [in0] = r13, 8 ;;
79	st8.spill [in0] = r14, 8 ;;	98	st8.spill [in0] = r14, 8 ;;
80	st8.spill [in0] = r15, 8 ;;	99	st8.spill [in0] = r15, 8 ;;
81	st8.spill [in0] = r16, 8 ;;	100	st8.spill [in0] = r16, 8 ;;
82	st8.spill [in0] = r17, 8 ;;	101	st8.spill [in0] = r17, 8 ;;
83	st8.spill [in0] = r18, 8 ;;	102	st8.spill [in0] = r18, 8 ;;
84	st8.spill [in0] = r19, 8 ;;	103	st8.spill [in0] = r19, 8 ;;
85	st8.spill [in0] = r20, 8 ;;	104	st8.spill [in0] = r20, 8 ;;
86	st8.spill [in0] = r21, 8 ;;	105	st8.spill [in0] = r21, 8 ;;
87	st8.spill [in0] = r22, 8 ;;	106	st8.spill [in0] = r22, 8 ;;
88	st8.spill [in0] = r23, 8 ;;	107	st8.spill [in0] = r23, 8 ;;
89	st8.spill [in0] = r24, 8 ;;	108	st8.spill [in0] = r24, 8 ;;
90	st8.spill [in0] = r25, 8 ;;	109	st8.spill [in0] = r25, 8 ;;
91	st8.spill [in0] = r26, 8 ;;	110	st8.spill [in0] = r26, 8 ;;
92	st8.spill [in0] = r27, 8 ;;	111	st8.spill [in0] = r27, 8 ;;
93	st8.spill [in0] = r28, 8 ;;	112	st8.spill [in0] = r28, 8 ;;
94	st8.spill [in0] = r29, 8 ;;	113	st8.spill [in0] = r29, 8 ;;
95	st8.spill [in0] = r30, 8 ;;	114	st8.spill [in0] = r30, 8 ;;
96	st8.spill [in0] = r31, 8 ;;	115	st8.spill [in0] = r31, 8 ;;
97		116
98	mov loc3 = ar.unat ;;	117	mov loc3 = ar.unat ;;
99	st8 [loc2] = loc3 /* save ar.unat (callee) */	118	st8 [loc2] = loc3 /* save ar.unat (callee) */
100		119
101	/*	120	/*
102	* Save branch registers	121	* Save branch registers
103	*/	122	*/
104	mov loc2 = b0 ;;	123	mov loc2 = b0 ;;
105	st8 [in0] = loc2, 8 /* save pc */	124	st8 [in0] = loc2, 8 /* save pc */
106	mov loc3 = b1 ;;	125	mov loc3 = b1 ;;
107	st8 [in0] = loc3, 8	126	st8 [in0] = loc3, 8
108	mov loc4 = b2 ;;	127	mov loc4 = b2 ;;
109	st8 [in0] = loc4, 8	128	st8 [in0] = loc4, 8
110	mov loc5 = b3 ;;	129	mov loc5 = b3 ;;
111	st8 [in0] = loc5, 8	130	st8 [in0] = loc5, 8
112	mov loc6 = b4 ;;	131	mov loc6 = b4 ;;
113	st8 [in0] = loc6, 8	132	st8 [in0] = loc6, 8
114	mov loc7 = b5 ;;	133	mov loc7 = b5 ;;
115	st8 [in0] = loc7, 8	134	st8 [in0] = loc7, 8
116	mov loc8 = b6 ;;	135	mov loc8 = b6 ;;
117	st8 [in0] = loc8, 8	136	st8 [in0] = loc8, 8
118	mov loc9 = b7 ;;	137	mov loc9 = b7 ;;
119	st8 [in0] = loc9, 8	138	st8 [in0] = loc9, 8
120		139
121	/*	140	/*
122	* Save predicate registers	141	* Save predicate registers
123	*/	142	*/
124	mov loc2 = pr ;;	143	mov loc2 = pr ;;
125	st8 [in0] = loc2, 8	144	st8 [in0] = loc2, 8
126		145
127	mov ar.pfs = loc0	146	mov ar.pfs = loc0
128	mov ar.unat = loc1	147	mov ar.unat = loc1
129		148
130	add r8 = r0, r0, 1 /* context_save returns 1 */	149	add r8 = r0, r0, 1 /* context_save returns 1 */
131	br.ret.sptk.many b0	150	br.ret.sptk.many b0
132		151
133	context_restore:	152	context_restore:
134	alloc loc0 = ar.pfs, 1, 11, 0, 0 ;;	153	alloc loc0 = ar.pfs, 1, 11, 0, 0 ;;
135		154
136	ld8 loc0 = [in0], 8 ;; /* load ar.pfs */	155	ld8 loc0 = [in0], 8 ;; /* load ar.pfs */
137	ld8 loc1 = [in0], 8 ;; /* load ar.unat (caller) */	156	ld8 loc1 = [in0], 8 ;; /* load ar.unat (caller) */
138	ld8 loc2 = [in0], 8 ;; /* load ar.unat (callee) */	157	ld8 loc2 = [in0], 8 ;; /* load ar.unat (callee) */
139	ld8 loc3 = [in0], 8 ;; /* load ar.rsc */	158	ld8 loc3 = [in0], 8 ;; /* load ar.rsc */
140	ld8 loc4 = [in0], 8 ;; /* load ar.bsp */	159	ld8 loc4 = [in0], 8 ;; /* load ar.bsp */
141	ld8 loc5 = [in0], 8 ;; /* load ar.rnat */	160	ld8 loc5 = [in0], 8 ;; /* load ar.rnat */
142	ld8 loc6 = [in0], 8 ;; /* load ar.lc */	161	ld8 loc6 = [in0], 8 ;; /* load ar.lc */
143	ld8 loc7 = [in0], 8 ;; /* load ar.ec */	162	ld8 loc7 = [in0], 8 ;; /* load ar.ec */
144	ld8 loc8 = [in0], 8 ;; /* load ar.ccv */	163	ld8 loc8 = [in0], 8 ;; /* load ar.ccv */
145	ld8 loc9 = [in0], 8 ;; /* load ar.csd */	164	ld8 loc9 = [in0], 8 ;; /* load ar.csd */
146	ld8 loc10 = [in0], 8 ;; /* load ar.ssd */	165	ld8 loc10 = [in0], 8 ;; /* load ar.ssd */
147		166
-		167	.auto
-		168
-		169	/*
-		170	* Invalidate the ALAT
-		171	*/
-		172	invala
-		173
148	/*	174	/*
149	* Restore application registers	175	* Restore application registers
150	*/	176	*/
-		177
-		178	mov ar.bspstore = loc4
-		179	mov ar.rnat = loc5
-		180	mov ar.pfs = loc0
-		181	mov ar.rsc = loc3
-		182
-		183	.explicit
-		184
151	mov ar.unat = loc2 ;;	185	mov ar.unat = loc2 ;;
152	/* TODO: restore ar.rsc, ar.rnat, ar.bspstore */	-
153	mov ar.lc = loc6	186	mov ar.lc = loc6
154	mov ar.ec = loc7	187	mov ar.ec = loc7
155	mov ar.ccv = loc8	188	mov ar.ccv = loc8
156	mov ar.csd = loc9	189	mov ar.csd = loc9
157	mov ar.ssd = loc10	190	mov ar.ssd = loc10
158		191
159	/*	192	/*
160	* Restore general registers including NaT bits	193	* Restore general registers including NaT bits
161	*/	194	*/
162	ld8.fill r1 = [in0], 8 ;;	195	ld8.fill r1 = [in0], 8 ;;
163	ld8.fill r2 = [in0], 8 ;;	196	ld8.fill r2 = [in0], 8 ;;
164	ld8.fill r3 = [in0], 8 ;;	197	ld8.fill r3 = [in0], 8 ;;
165	ld8.fill r4 = [in0], 8 ;;	198	ld8.fill r4 = [in0], 8 ;;
166	ld8.fill r5 = [in0], 8 ;;	199	ld8.fill r5 = [in0], 8 ;;
167	ld8.fill r6 = [in0], 8 ;;	200	ld8.fill r6 = [in0], 8 ;;
168	ld8.fill r7 = [in0], 8 ;;	201	ld8.fill r7 = [in0], 8 ;;
169	ld8.fill r8 = [in0], 8 ;;	202	ld8.fill r8 = [in0], 8 ;;
170	ld8.fill r9 = [in0], 8 ;;	203	ld8.fill r9 = [in0], 8 ;;
171	ld8.fill r10 = [in0], 8 ;;	204	ld8.fill r10 = [in0], 8 ;;
172	ld8.fill r11 = [in0], 8 ;;	205	ld8.fill r11 = [in0], 8 ;;
173	ld8.fill r12 = [in0], 8 ;; /* restore sp */	206	ld8.fill r12 = [in0], 8 ;; /* restore sp */
174	ld8.fill r13 = [in0], 8 ;;	207	ld8.fill r13 = [in0], 8 ;;
175	ld8.fill r14 = [in0], 8 ;;	208	ld8.fill r14 = [in0], 8 ;;
176	ld8.fill r15 = [in0], 8 ;;	209	ld8.fill r15 = [in0], 8 ;;
177	ld8.fill r16 = [in0], 8 ;;	210	ld8.fill r16 = [in0], 8 ;;
178	ld8.fill r17 = [in0], 8 ;;	211	ld8.fill r17 = [in0], 8 ;;
179	ld8.fill r18 = [in0], 8 ;;	212	ld8.fill r18 = [in0], 8 ;;
180	ld8.fill r19 = [in0], 8 ;;	213	ld8.fill r19 = [in0], 8 ;;
181	ld8.fill r20 = [in0], 8 ;;	214	ld8.fill r20 = [in0], 8 ;;
182	ld8.fill r21 = [in0], 8 ;;	215	ld8.fill r21 = [in0], 8 ;;
183	ld8.fill r22 = [in0], 8 ;;	216	ld8.fill r22 = [in0], 8 ;;
184	ld8.fill r23 = [in0], 8 ;;	217	ld8.fill r23 = [in0], 8 ;;
185	ld8.fill r24 = [in0], 8 ;;	218	ld8.fill r24 = [in0], 8 ;;
186	ld8.fill r25 = [in0], 8 ;;	219	ld8.fill r25 = [in0], 8 ;;
187	ld8.fill r26 = [in0], 8 ;;	220	ld8.fill r26 = [in0], 8 ;;
188	ld8.fill r27 = [in0], 8 ;;	221	ld8.fill r27 = [in0], 8 ;;
189	ld8.fill r28 = [in0], 8 ;;	222	ld8.fill r28 = [in0], 8 ;;
190	ld8.fill r29 = [in0], 8 ;;	223	ld8.fill r29 = [in0], 8 ;;
191	ld8.fill r30 = [in0], 8 ;;	224	ld8.fill r30 = [in0], 8 ;;
192	ld8.fill r31 = [in0], 8 ;;	225	ld8.fill r31 = [in0], 8 ;;
193		226
194	/*	227	/*
195	* Restore branch registers	228	* Restore branch registers
196	*/	229	*/
197	ld8 loc2 = [in0], 8 ;; /* restore pc */	230	ld8 loc2 = [in0], 8 ;; /* restore pc */
198	mov b0 = loc2	231	mov b0 = loc2
199	ld8 loc3 = [in0], 8 ;;	232	ld8 loc3 = [in0], 8 ;;
200	mov b1 = loc3	233	mov b1 = loc3
201	ld8 loc4 = [in0], 8 ;;	234	ld8 loc4 = [in0], 8 ;;
202	mov b2 = loc4	235	mov b2 = loc4
203	ld8 loc5 = [in0], 8 ;;	236	ld8 loc5 = [in0], 8 ;;
204	mov b3 = loc5	237	mov b3 = loc5
205	ld8 loc6 = [in0], 8 ;;	238	ld8 loc6 = [in0], 8 ;;
206	mov b4 = loc6	239	mov b4 = loc6
207	ld8 loc7 = [in0], 8 ;;	240	ld8 loc7 = [in0], 8 ;;
208	mov b5 = loc7	241	mov b5 = loc7
209	ld8 loc8 = [in0], 8 ;;	242	ld8 loc8 = [in0], 8 ;;
210	mov b6 = loc8	243	mov b6 = loc8
211	ld8 loc9 = [in0], 8 ;;	244	ld8 loc9 = [in0], 8 ;;
212	mov b7 = loc9	245	mov b7 = loc9
213		246
214	/*	247	/*
215	* Restore predicate registers	248	* Restore predicate registers
216	*/	249	*/
217	ld8 loc2 = [in0], 8 ;;	250	ld8 loc2 = [in0], 8 ;;
218	mov pr = loc2, ~0	251	mov pr = loc2, ~0
219		252
220	mov ar.pfs = loc0	-
221	mov ar.unat = loc1	253	mov ar.unat = loc1
222		254
223	mov r8 = r0 /* context_restore returns 0 */	255	mov r8 = r0 /* context_restore returns 0 */
224	br.ret.sptk.many b0	256	br.ret.sptk.many b0
225		257

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(root)/SPARTAN/trunk/arch/ia64/src/context.S @ 212 – Rev 94 → 100