WebSVN – HelenOS-historic – Diff – /SPARTAN/trunk/arch/ia32/src/interrupt.c


/*
 * Copyright (C) 2001-2004 Jakub Jermar
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
#include <arch/interrupt.h>
#include <print.h>
#include <debug.h>
#include <panic.h>
#include <arch/i8259.h>
#include <func.h>
#include <cpu.h>
#include <arch/asm.h>
#include <mm/tlb.h>
#include <arch.h>
 
/*
 * Interrupt and exception dispatching.
 */
 
static iroutine ivt[IVT_ITEMS];
 
void (* disable_irqs_function)(__u16 irqmask) = NULL;
void (* enable_irqs_function)(__u16 irqmask) = NULL;
void (* eoi_function)(void) = NULL;
 
iroutine trap_register(__u8 n, iroutine f)
{
    ASSERT(n < IVT_ITEMS);
   
    iroutine old;
   
    old = ivt[n];
    ivt[n] = f;
   
    return old;
}
 
/*
 * Called directly from the assembler code.
 * CPU is cpu_priority_high().
 */
void trap_dispatcher(__u8 n, __u32 stack[])
{
    ASSERT(n < IVT_ITEMS);
   
    ivt[n](n, stack);
}
 
void null_interrupt(__u8 n, __u32 stack[])
{
    printf("int %d: null_interrupt\n", n);
    printf("stack: %L, %L, %L, %L\n", stack[0], stack[1], stack[2], stack[3]);
    panic("unserviced interrupt\n");
}
 
void gp_fault(__u8 n, __u32 stack[])
{
    printf("stack[0]=%X, %%eip=%X, %%cs=%X, flags=%X\n", stack[0], stack[1], stack[2], stack[3]);
    printf("%%eax=%L, %%ebx=%L, %%ecx=%L, %%edx=%L,\n%%edi=%L, %%esi=%L, %%ebp=%L, %%esp=%L\n", stack[-2], stack[-5], stack[-3], stack[-4], stack[-9], stack[-8], stack[-1], stack);
    printf("stack: %X, %X, %X, %X\n", stack[4], stack[5], stack[6], stack[7]);
    panic("general protection fault\n");
}
 
void ss_fault(__u8 n, __u32 stack[])
{
    printf("stack[0]=%X, %%eip=%X, %%cs=%X, flags=%X\n", stack[0], stack[1], stack[2], stack[3]);
    printf("%%eax=%L, %%ebx=%L, %%ecx=%L, %%edx=%L,\n%%edi=%L, %%esi=%L, %%ebp=%L, %%esp=%L\n", stack[-2], stack[-5], stack[-3], stack[-4], stack[-9], stack[-8], stack[-1], stack);
    printf("stack: %X, %X, %X, %X\n", stack[4], stack[5], stack[6], stack[7]);
    panic("Stack fault\n");
}
 
 
void nm_fault(__u8 n, __u32 stack[])
{
 
//  printf("-1\n");        
    reset_TS_flag();
        if ((CPU->fpu_owner)!=NULL)
    {  
//          printf("owner %X\n",(int)(&((CPU->fpu_owner)->saved_fpu_context)));        
            fpu_lazy_context_save(&((CPU->fpu_owner)->saved_fpu_context));
 
//          printf("owner 2\n");
        (CPU->fpu_owner)->fpu_context_engaged=0; /* Enables migration */
//          printf("owner 3\n");        
 
    }
//  printf("0\n");
    if(THREAD->fpu_context_exists) fpu_lazy_context_restore(&(THREAD->saved_fpu_context));
        else {fpu_init();THREAD->fpu_context_exists=1;}
 
//  printf("1\n");
    CPU->fpu_owner=THREAD;
 
//  printf("2\n");
   
//  printf("3\n");  
//  panic("#NM fault\n");
}
 
 
 
void page_fault(__u8 n, __u32 stack[])
{
    printf("page fault address: %X\n", cpu_read_cr2());
    printf("stack[0]=%X, %%eip=%X, %%cs=%X, flags=%X\n", stack[0], stack[1], stack[2], stack[3]);
    printf("%%eax=%L, %%ebx=%L, %%ecx=%L, %%edx=%L,\n%%edi=%L, %%esi=%L, %%ebp=%L, %%esp=%L\n", stack[-2], stack[-5], stack[-3], stack[-4], stack[-9], stack[-8], stack[-1], stack);
    printf("stack: %X, %X, %X, %X\n", stack[4], stack[5], stack[6], stack[7]);
    printf("page fault\n");
    cpu_halt();
}
 
void syscall(__u8 n, __u32 stack[])
{
    printf("cpu%d: syscall\n", CPU->id);
    thread_usleep(1000);
}
 
void tlb_shootdown_ipi(__u8 n, __u32 stack[])
{
    trap_virtual_eoi();
    tlb_shootdown_ipi_recv();
}
 
void wakeup_ipi(__u8 n, __u32 stack[])
{
    trap_virtual_eoi();
}
 
void trap_virtual_enable_irqs(__u16 irqmask)
{
    if (enable_irqs_function)
        enable_irqs_function(irqmask);
    else
        panic("no enable_irqs_function\n");
}
 
void trap_virtual_disable_irqs(__u16 irqmask)
{
    if (disable_irqs_function)
        disable_irqs_function(irqmask);
    else
        panic("no disable_irqs_function\n");
}
 
void trap_virtual_eoi(void)
{
    if (eoi_function)
        eoi_function();
    else
        panic("no eoi_function\n");
 
}
 

Rev 75	Rev 84
1	/*	1	/*
2	* Copyright (C) 2001-2004 Jakub Jermar	2	* Copyright (C) 2001-2004 Jakub Jermar
3	* All rights reserved.	3	* All rights reserved.
4	*	4	*
5	* Redistribution and use in source and binary forms, with or without	5	* Redistribution and use in source and binary forms, with or without
6	* modification, are permitted provided that the following conditions	6	* modification, are permitted provided that the following conditions
7	* are met:	7	* are met:
8	*	8	*
9	* - Redistributions of source code must retain the above copyright	9	* - Redistributions of source code must retain the above copyright
10	* notice, this list of conditions and the following disclaimer.	10	* notice, this list of conditions and the following disclaimer.
11	* - Redistributions in binary form must reproduce the above copyright	11	* - Redistributions in binary form must reproduce the above copyright
12	* notice, this list of conditions and the following disclaimer in the	12	* notice, this list of conditions and the following disclaimer in the
13	* documentation and/or other materials provided with the distribution.	13	* documentation and/or other materials provided with the distribution.
14	* - The name of the author may not be used to endorse or promote products	14	* - The name of the author may not be used to endorse or promote products
15	* derived from this software without specific prior written permission.	15	* derived from this software without specific prior written permission.
16	*	16	*
17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	*/	27	*/
28		28
29	#include <arch/interrupt.h>	29	#include <arch/interrupt.h>
30	#include <print.h>	30	#include <print.h>
31	#include <debug.h>	31	#include <debug.h>
32	#include <panic.h>	32	#include <panic.h>
33	#include <arch/i8259.h>	33	#include <arch/i8259.h>
34	#include <func.h>	34	#include <func.h>
35	#include <cpu.h>	35	#include <cpu.h>
36	#include <arch/asm.h>	36	#include <arch/asm.h>
37	#include <mm/tlb.h>	37	#include <mm/tlb.h>
38	#include <arch.h>	38	#include <arch.h>
39		39
40	/*	40	/*
41	* Interrupt and exception dispatching.	41	* Interrupt and exception dispatching.
42	*/	42	*/
43		43
44	static iroutine ivt[IVT_ITEMS];	44	static iroutine ivt[IVT_ITEMS];
45		45
46	void (* disable_irqs_function)(__u16 irqmask) = NULL;	46	void (* disable_irqs_function)(__u16 irqmask) = NULL;
47	void (* enable_irqs_function)(__u16 irqmask) = NULL;	47	void (* enable_irqs_function)(__u16 irqmask) = NULL;
48	void (* eoi_function)(void) = NULL;	48	void (* eoi_function)(void) = NULL;
49		49
50	iroutine trap_register(__u8 n, iroutine f)	50	iroutine trap_register(__u8 n, iroutine f)
51	{	51	{
52	ASSERT(n < IVT_ITEMS);	52	ASSERT(n < IVT_ITEMS);
53		53
54	iroutine old;	54	iroutine old;
55		55
56	old = ivt[n];	56	old = ivt[n];
57	ivt[n] = f;	57	ivt[n] = f;
58		58
59	return old;	59	return old;
60	}	60	}
61		61
62	/*	62	/*
63	* Called directly from the assembler code.	63	* Called directly from the assembler code.
64	* CPU is cpu_priority_high().	64	* CPU is cpu_priority_high().
65	*/	65	*/
66	void trap_dispatcher(__u8 n, __u32 stack[])	66	void trap_dispatcher(__u8 n, __u32 stack[])
67	{	67	{
68	ASSERT(n < IVT_ITEMS);	68	ASSERT(n < IVT_ITEMS);
69		69
70	ivt[n](n, stack);	70	ivt[n](n, stack);
71	}	71	}
72		72
73	void null_interrupt(__u8 n, __u32 stack[])	73	void null_interrupt(__u8 n, __u32 stack[])
74	{	74	{
75	printf("int %d: null_interrupt\n", n);	75	printf("int %d: null_interrupt\n", n);
76	printf("stack: %L, %L, %L, %L\n", stack[0], stack[1], stack[2], stack[3]);	76	printf("stack: %L, %L, %L, %L\n", stack[0], stack[1], stack[2], stack[3]);
77	panic("unserviced interrupt\n");	77	panic("unserviced interrupt\n");
78	}	78	}
79		79
80	void gp_fault(__u8 n, __u32 stack[])	80	void gp_fault(__u8 n, __u32 stack[])
81	{	81	{
82	printf("stack[0]=%X, %%eip=%X, %%cs=%X, flags=%X\n", stack[0], stack[1], stack[2], stack[3]);	82	printf("stack[0]=%X, %%eip=%X, %%cs=%X, flags=%X\n", stack[0], stack[1], stack[2], stack[3]);
83	printf("%%eax=%L, %%ebx=%L, %%ecx=%L, %%edx=%L,\n%%edi=%L, %%esi=%L, %%ebp=%L, %%esp=%L\n", stack[-2], stack[-5], stack[-3], stack[-4], stack[-9], stack[-8], stack[-1], stack);	83	printf("%%eax=%L, %%ebx=%L, %%ecx=%L, %%edx=%L,\n%%edi=%L, %%esi=%L, %%ebp=%L, %%esp=%L\n", stack[-2], stack[-5], stack[-3], stack[-4], stack[-9], stack[-8], stack[-1], stack);
84	printf("stack: %X, %X, %X, %X\n", stack[4], stack[5], stack[6], stack[7]);	84	printf("stack: %X, %X, %X, %X\n", stack[4], stack[5], stack[6], stack[7]);
85	panic("general protection fault\n");	85	panic("general protection fault\n");
86	}	86	}
87		87
-		88	void ss_fault(__u8 n, __u32 stack[])
-		89	{
-		90	printf("stack[0]=%X, %%eip=%X, %%cs=%X, flags=%X\n", stack[0], stack[1], stack[2], stack[3]);
-		91	printf("%%eax=%L, %%ebx=%L, %%ecx=%L, %%edx=%L,\n%%edi=%L, %%esi=%L, %%ebp=%L, %%esp=%L\n", stack[-2], stack[-5], stack[-3], stack[-4], stack[-9], stack[-8], stack[-1], stack);
-		92	printf("stack: %X, %X, %X, %X\n", stack[4], stack[5], stack[6], stack[7]);
-		93	panic("Stack fault\n");
-		94	}
-		95
-		96
88	void nm_fault(__u8 n, __u32 stack[])	97	void nm_fault(__u8 n, __u32 stack[])
89	{	98	{
90		99
-		100	// printf("-1\n");
-		101	reset_TS_flag();
91	if ((CPU->fpu_owner)!=NULL)	102	if ((CPU->fpu_owner)!=NULL)
92	{	103	{
-		104	// printf("owner %X\n",(int)(&((CPU->fpu_owner)->saved_fpu_context)));
93	fpu_lazy_context_save(&((CPU->fpu_owner)->saved_fpu_context));	105	fpu_lazy_context_save(&((CPU->fpu_owner)->saved_fpu_context));
-		106
-		107	// printf("owner 2\n");
94	(CPU->fpu_owner)->fpu_context_engaged=0; /* Enables migration */	108	(CPU->fpu_owner)->fpu_context_engaged=0; /* Enables migration */
-		109	// printf("owner 3\n");
-		110
95	}	111	}
96		112	// printf("0\n");
97	if(THREAD->fpu_context_exists) fpu_lazy_context_restore(&(THREAD->saved_fpu_context));	113	if(THREAD->fpu_context_exists) fpu_lazy_context_restore(&(THREAD->saved_fpu_context));
98	else {fpu_init();THREAD->fpu_context_exists=1;}	114	else {fpu_init();THREAD->fpu_context_exists=1;}
99		-
-		115	// printf("1\n");
100	CPU->fpu_owner=THREAD;	116	CPU->fpu_owner=THREAD;
101		-
102	reset_TS_flag();	117	// printf("2\n");
103		118
-		119	// printf("3\n");
104	// panic("#NM fault\n");	120	// panic("#NM fault\n");
105	}	121	}
106		122
107		123
108		124
109	void page_fault(__u8 n, __u32 stack[])	125	void page_fault(__u8 n, __u32 stack[])
110	{	126	{
111	printf("page fault address: %X\n", cpu_read_cr2());	127	printf("page fault address: %X\n", cpu_read_cr2());
112	printf("stack[0]=%X, %%eip=%X, %%cs=%X, flags=%X\n", stack[0], stack[1], stack[2], stack[3]);	128	printf("stack[0]=%X, %%eip=%X, %%cs=%X, flags=%X\n", stack[0], stack[1], stack[2], stack[3]);
113	printf("%%eax=%L, %%ebx=%L, %%ecx=%L, %%edx=%L,\n%%edi=%L, %%esi=%L, %%ebp=%L, %%esp=%L\n", stack[-2], stack[-5], stack[-3], stack[-4], stack[-9], stack[-8], stack[-1], stack);	129	printf("%%eax=%L, %%ebx=%L, %%ecx=%L, %%edx=%L,\n%%edi=%L, %%esi=%L, %%ebp=%L, %%esp=%L\n", stack[-2], stack[-5], stack[-3], stack[-4], stack[-9], stack[-8], stack[-1], stack);
114	printf("stack: %X, %X, %X, %X\n", stack[4], stack[5], stack[6], stack[7]);	130	printf("stack: %X, %X, %X, %X\n", stack[4], stack[5], stack[6], stack[7]);
115	printf("page fault\n");	131	printf("page fault\n");
116	cpu_halt();	132	cpu_halt();
117	}	133	}
118		134
119	void syscall(__u8 n, __u32 stack[])	135	void syscall(__u8 n, __u32 stack[])
120	{	136	{
121	printf("cpu%d: syscall\n", CPU->id);	137	printf("cpu%d: syscall\n", CPU->id);
122	thread_usleep(1000);	138	thread_usleep(1000);
123	}	139	}
124		140
125	void tlb_shootdown_ipi(__u8 n, __u32 stack[])	141	void tlb_shootdown_ipi(__u8 n, __u32 stack[])
126	{	142	{
127	trap_virtual_eoi();	143	trap_virtual_eoi();
128	tlb_shootdown_ipi_recv();	144	tlb_shootdown_ipi_recv();
129	}	145	}
130		146
131	void wakeup_ipi(__u8 n, __u32 stack[])	147	void wakeup_ipi(__u8 n, __u32 stack[])
132	{	148	{
133	trap_virtual_eoi();	149	trap_virtual_eoi();
134	}	150	}
135		151
136	void trap_virtual_enable_irqs(__u16 irqmask)	152	void trap_virtual_enable_irqs(__u16 irqmask)
137	{	153	{
138	if (enable_irqs_function)	154	if (enable_irqs_function)
139	enable_irqs_function(irqmask);	155	enable_irqs_function(irqmask);
140	else	156	else
141	panic("no enable_irqs_function\n");	157	panic("no enable_irqs_function\n");
142	}	158	}
143		159
144	void trap_virtual_disable_irqs(__u16 irqmask)	160	void trap_virtual_disable_irqs(__u16 irqmask)
145	{	161	{
146	if (disable_irqs_function)	162	if (disable_irqs_function)
147	disable_irqs_function(irqmask);	163	disable_irqs_function(irqmask);
148	else	164	else
149	panic("no disable_irqs_function\n");	165	panic("no disable_irqs_function\n");
150	}	166	}
151		167
152	void trap_virtual_eoi(void)	168	void trap_virtual_eoi(void)
153	{	169	{
154	if (eoi_function)	170	if (eoi_function)
155	eoi_function();	171	eoi_function();
156	else	172	else
157	panic("no eoi_function\n");	173	panic("no eoi_function\n");
158		174
159	}	175	}
160		176

Subversion Repositories HelenOS-historic

(root)/SPARTAN/trunk/arch/ia32/src/interrupt.c – Rev 75 → 84