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1 | # |
1 | # |
2 | # Copyright (C) 2001-2004 Jakub Jermar |
2 | # Copyright (C) 2001-2004 Jakub Jermar |
3 | # All rights reserved. |
3 | # All rights reserved. |
4 | # |
4 | # |
5 | # Redistribution and use in source and binary forms, with or without |
5 | # Redistribution and use in source and binary forms, with or without |
6 | # modification, are permitted provided that the following conditions |
6 | # modification, are permitted provided that the following conditions |
7 | # are met: |
7 | # are met: |
8 | # |
8 | # |
9 | # - Redistributions of source code must retain the above copyright |
9 | # - Redistributions of source code must retain the above copyright |
10 | # notice, this list of conditions and the following disclaimer. |
10 | # notice, this list of conditions and the following disclaimer. |
11 | # - Redistributions in binary form must reproduce the above copyright |
11 | # - Redistributions in binary form must reproduce the above copyright |
12 | # notice, this list of conditions and the following disclaimer in the |
12 | # notice, this list of conditions and the following disclaimer in the |
13 | # documentation and/or other materials provided with the distribution. |
13 | # documentation and/or other materials provided with the distribution. |
14 | # - The name of the author may not be used to endorse or promote products |
14 | # - The name of the author may not be used to endorse or promote products |
15 | # derived from this software without specific prior written permission. |
15 | # derived from this software without specific prior written permission. |
16 | # |
16 | # |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | # |
27 | # |
28 | 28 | ||
29 | .text |
29 | .text |
30 | 30 | ||
31 | .global atomic_inc |
- | |
32 | atomic_inc: |
- | |
33 | pushl %ebx |
- | |
34 | movl 8(%esp),%ebx |
- | |
35 | #ifdef __SMP__ |
- | |
36 | lock incl (%ebx) |
- | |
37 | #else |
- | |
38 | incl (%ebx) |
- | |
39 | #endif |
- | |
40 | popl %ebx |
- | |
41 | ret |
- | |
42 | - | ||
43 | .global atomic_dec |
- | |
44 | atomic_dec: |
- | |
45 | pushl %ebx |
- | |
46 | movl 8(%esp),%ebx |
- | |
47 | #ifdef __SMP__ |
- | |
48 | lock decl (%ebx) |
- | |
49 | #else |
- | |
50 | decl (%ebx) |
- | |
51 | #endif |
- | |
52 | popl %ebx |
- | |
53 | ret |
- | |
54 | - | ||
55 | - | ||
56 | #ifdef __SMP__ |
31 | #ifdef __SMP__ |
57 | 32 | ||
58 | - | ||
59 | .global test_and_set |
- | |
60 | .global spinlock_arch |
33 | .global spinlock_arch |
61 | 34 | ||
62 | test_and_set: |
- | |
63 | pushl %ebx |
- | |
64 | - | ||
65 | movl 8(%esp),%ebx |
- | |
66 | movl $1,%eax |
- | |
67 | xchgl %eax,(%ebx) # xchg implicitly turns on the LOCK signal |
- | |
68 | - | ||
69 | popl %ebx |
- | |
70 | ret |
- | |
71 | - | ||
72 | - | ||
73 | # |
35 | # |
74 | # This is a bus-and-hyperthreading-friendly implementation of spinlock |
36 | # This is a bus-and-hyperthreading-friendly implementation of spinlock |
75 | # |
37 | # |
76 | spinlock_arch: |
38 | spinlock_arch: |
77 | pushl %eax |
39 | pushl %eax |
78 | pushl %ebx |
40 | pushl %ebx |
79 | 41 | ||
80 | movl 12(%esp),%ebx |
42 | movl 12(%esp),%ebx |
81 | 43 | ||
82 | 0: |
44 | 0: |
83 | #ifdef __HT__ |
45 | #ifdef __HT__ |
84 | pause # Pentium 4's with HT love this instruction |
46 | pause # Pentium 4's with HT love this instruction |
85 | #endif |
47 | #endif |
86 | movl (%ebx),%eax |
48 | movl (%ebx),%eax |
87 | testl %eax,%eax |
49 | testl %eax,%eax |
88 | jnz 0b # lightweight looping while it is locked |
50 | jnz 0b # lightweight looping while it is locked |
89 | incl %eax |
51 | incl %eax |
90 | xchgl %eax,(%ebx) # now use the atomic operation |
52 | xchgl %eax,(%ebx) # now use the atomic operation |
91 | testl %eax,%eax |
53 | testl %eax,%eax |
92 | jnz 0b |
54 | jnz 0b |
93 | 55 | ||
94 | popl %ebx |
56 | popl %ebx |
95 | popl %eax |
57 | popl %eax |
96 | ret |
58 | ret |
97 | 59 | ||
98 | #endif |
60 | #endif |
99 | 61 |