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#
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#
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# Copyright (C) 2001-2004 Jakub Jermar
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# Copyright (C) 2001-2004 Jakub Jermar
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# All rights reserved.
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# All rights reserved.
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#
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#
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# Redistribution and use in source and binary forms, with or without
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# modification, are permitted provided that the following conditions
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# are met:
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# are met:
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#
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#
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# - Redistributions of source code must retain the above copyright
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# - Redistributions of source code must retain the above copyright
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#   notice, this list of conditions and the following disclaimer.
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#   notice, this list of conditions and the following disclaimer.
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# - Redistributions in binary form must reproduce the above copyright
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# - Redistributions in binary form must reproduce the above copyright
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#   notice, this list of conditions and the following disclaimer in the
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#   notice, this list of conditions and the following disclaimer in the
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#   documentation and/or other materials provided with the distribution.
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#   documentation and/or other materials provided with the distribution.
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# - The name of the author may not be used to endorse or promote products
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# - The name of the author may not be used to endorse or promote products
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#   derived from this software without specific prior written permission.
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#   derived from this software without specific prior written permission.
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#
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#
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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#
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.text
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.text
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.global atomic_inc
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.global atomic_inc
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atomic_inc:
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atomic_inc:
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	pushl %ebx
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	pushl %ebx
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	movl 8(%esp),%ebx
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	movl 8(%esp),%ebx
-
 
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#ifdef __SMP__	
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	lock incl (%ebx)
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	lock incl (%ebx)
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#else
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	incl (%ebx)
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#endif		
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	popl %ebx
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	popl %ebx
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	ret
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	ret
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.global atomic_dec
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.global atomic_dec
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atomic_dec:
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atomic_dec:
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	pushl %ebx
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	pushl %ebx
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	movl 8(%esp),%ebx
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	movl 8(%esp),%ebx
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#ifdef __SMP__	
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	lock decl (%ebx)
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	lock decl (%ebx)
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#else
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	decl (%ebx)
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#endif
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	popl %ebx
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	popl %ebx
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	ret
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	ret
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#ifdef __SMP__
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#ifdef __SMP__
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.global test_and_set
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.global test_and_set
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.global spinlock_arch
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.global spinlock_arch
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test_and_set:
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test_and_set:
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	pushl %ebx
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	pushl %ebx
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	movl 8(%esp),%ebx
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	movl 8(%esp),%ebx
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	movl $1,%eax
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	movl $1,%eax
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	xchgl %eax,(%ebx)	# xchg implicitly turns on the LOCK signal
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	xchgl %eax,(%ebx)	# xchg implicitly turns on the LOCK signal
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	popl %ebx
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	popl %ebx
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	ret
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	ret
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#
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#
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# This is a bus-and-hyperthreading-friendly implementation of spinlock 
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# This is a bus-and-hyperthreading-friendly implementation of spinlock 
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#
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#
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spinlock_arch:
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spinlock_arch:
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	pushl %eax
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	pushl %eax
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	pushl %ebx
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	pushl %ebx
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	movl 12(%esp),%ebx
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	movl 12(%esp),%ebx
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0:	
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0:	
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	#ifdef __HT__
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	#ifdef __HT__
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	pause			# Pentium 4's with HT love this instruction
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	pause			# Pentium 4's with HT love this instruction
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	#endif
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	#endif
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	movl (%ebx),%eax
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	movl (%ebx),%eax
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	testl %eax,%eax
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	testl %eax,%eax
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	jnz 0b			# lightweight looping while it is locked
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	jnz 0b			# lightweight looping while it is locked
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	incl %eax
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	incl %eax
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	xchgl %eax,(%ebx)	# now use the atomic operation
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	xchgl %eax,(%ebx)	# now use the atomic operation
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	testl %eax,%eax
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	testl %eax,%eax
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	jnz 0b
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	jnz 0b
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	popl %ebx
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	popl %ebx
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	popl %eax
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	popl %eax
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	ret
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	ret
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#endif
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#endif
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