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1 | # |
1 | # |
2 | # Copyright (C) 2001-2004 Jakub Jermar |
2 | # Copyright (C) 2001-2004 Jakub Jermar |
3 | # All rights reserved. |
3 | # All rights reserved. |
4 | # |
4 | # |
5 | # Redistribution and use in source and binary forms, with or without |
5 | # Redistribution and use in source and binary forms, with or without |
6 | # modification, are permitted provided that the following conditions |
6 | # modification, are permitted provided that the following conditions |
7 | # are met: |
7 | # are met: |
8 | # |
8 | # |
9 | # - Redistributions of source code must retain the above copyright |
9 | # - Redistributions of source code must retain the above copyright |
10 | # notice, this list of conditions and the following disclaimer. |
10 | # notice, this list of conditions and the following disclaimer. |
11 | # - Redistributions in binary form must reproduce the above copyright |
11 | # - Redistributions in binary form must reproduce the above copyright |
12 | # notice, this list of conditions and the following disclaimer in the |
12 | # notice, this list of conditions and the following disclaimer in the |
13 | # documentation and/or other materials provided with the distribution. |
13 | # documentation and/or other materials provided with the distribution. |
14 | # - The name of the author may not be used to endorse or promote products |
14 | # - The name of the author may not be used to endorse or promote products |
15 | # derived from this software without specific prior written permission. |
15 | # derived from this software without specific prior written permission. |
16 | # |
16 | # |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | # |
27 | # |
28 | 28 | ||
29 | # very low and hardware-level functions |
29 | # very low and hardware-level functions |
30 | 30 | ||
31 | .text |
31 | .text |
32 | 32 | ||
33 | .global cpu_priority_high |
33 | .global cpu_priority_high |
34 | .global cpu_priority_low |
34 | .global cpu_priority_low |
35 | .global cpu_priority_restore |
35 | .global cpu_priority_restore |
36 | .global cpu_priority_read |
36 | .global cpu_priority_read |
37 | .global cpu_halt |
37 | .global cpu_halt |
38 | .global cpu_sleep |
38 | .global cpu_sleep |
39 | .global paging_on |
39 | .global paging_on |
40 | .global cpu_read_dba |
40 | .global cpu_read_dba |
41 | .global cpu_write_dba |
41 | .global cpu_write_dba |
42 | .global cpu_read_cr2 |
42 | .global cpu_read_cr2 |
43 | .global enable_l_apic_in_msr |
43 | .global enable_l_apic_in_msr |
44 | .global interrupt_handlers |
44 | .global interrupt_handlers |
45 | .global inb |
45 | .global inb |
46 | .global inw |
46 | .global inw |
47 | .global inl |
47 | .global inl |
48 | .global outb |
48 | .global outb |
49 | .global outw |
49 | .global outw |
50 | .global outl |
50 | .global outl |
51 | .global memcopy |
51 | .global memcopy |
52 | .global memsetb |
52 | .global memsetb |
53 | .global memsetw |
53 | .global memsetw |
54 | .global memcmp |
54 | .global memcmp |
55 | 55 | ||
56 | # |
56 | # |
57 | # set priority level high |
57 | # set priority level high |
58 | cpu_priority_high: |
58 | cpu_priority_high: |
59 | pushf |
59 | pushf |
60 | pop %eax |
60 | pop %eax |
61 | cli |
61 | cli |
62 | ret |
62 | ret |
63 | 63 | ||
64 | # |
64 | # |
65 | # set priority level low |
65 | # set priority level low |
66 | cpu_priority_low: |
66 | cpu_priority_low: |
67 | pushf |
67 | pushf |
68 | pop %eax |
68 | pop %eax |
69 | sti |
69 | sti |
70 | ret |
70 | ret |
71 | 71 | ||
72 | # |
72 | # |
73 | # restore priority level |
73 | # restore priority level |
74 | cpu_priority_restore: |
74 | cpu_priority_restore: |
75 | push 4(%esp) |
75 | push 4(%esp) |
76 | popf |
76 | popf |
77 | ret |
77 | ret |
78 | 78 | ||
79 | # return raw priority level |
79 | # return raw priority level |
80 | cpu_priority_read: |
80 | cpu_priority_read: |
81 | pushf |
81 | pushf |
82 | pop %eax |
82 | pop %eax |
83 | ret |
83 | ret |
84 | 84 | ||
85 | cpu_halt: |
85 | cpu_halt: |
86 | cpu_sleep: |
86 | cpu_sleep: |
87 | hlt |
87 | hlt |
88 | ret |
88 | ret |
89 | 89 | ||
90 | paging_on: |
90 | paging_on: |
91 | pushl %eax |
91 | pushl %eax |
92 | movl %cr0,%eax |
92 | movl %cr0,%eax |
93 | orl $(1<<31),%eax # paging on |
93 | orl $(1<<31),%eax # paging on |
94 | andl $~((1<<30)|(1<<29)),%eax # clear Cache Disable and not Write Though |
94 | andl $~((1<<30)|(1<<29)),%eax # clear Cache Disable and not Write Though |
95 | movl %eax,%cr0 |
95 | movl %eax,%cr0 |
96 | jmp 0f |
96 | jmp 0f |
97 | 0: |
97 | 0: |
98 | popl %eax |
98 | popl %eax |
99 | ret |
99 | ret |
100 | 100 | ||
101 | cpu_read_dba: |
101 | cpu_read_dba: |
102 | movl %cr3,%eax |
102 | movl %cr3,%eax |
103 | ret |
103 | ret |
104 | 104 | ||
105 | cpu_write_dba: |
105 | cpu_write_dba: |
106 | pushl %eax |
106 | pushl %eax |
107 | movl 8(%esp),%eax |
107 | movl 8(%esp),%eax |
108 | movl %eax,%cr3 |
108 | movl %eax,%cr3 |
109 | popl %eax |
109 | popl %eax |
110 | ret |
110 | ret |
111 | 111 | ||
112 | cpu_read_cr2: |
112 | cpu_read_cr2: |
113 | movl %cr2,%eax |
113 | movl %cr2,%eax |
114 | ret |
114 | ret |
115 | 115 | ||
116 | enable_l_apic_in_msr: |
116 | enable_l_apic_in_msr: |
117 | pusha |
117 | pusha |
118 | 118 | ||
119 | movl $0x1b, %ecx |
119 | movl $0x1b, %ecx |
120 | rdmsr |
120 | rdmsr |
121 | orl $(1<<11),%eax |
121 | orl $(1<<11),%eax |
122 | orl $(0xfee00000),%eax |
122 | orl $(0xfee00000),%eax |
123 | wrmsr |
123 | wrmsr |
124 | 124 | ||
125 | popa |
125 | popa |
126 | ret |
126 | ret |
127 | 127 | ||
128 | .macro handler i n |
128 | .macro handler i n |
129 | push %ebp |
129 | push %ebp |
130 | movl %esp,%ebp |
130 | movl %esp,%ebp |
131 | pusha |
131 | pusha |
- | 132 | ||
- | 133 | push %ds |
|
- | 134 | push %es |
|
132 | 135 | ||
133 | # we must fill the data segment registers |
136 | # we must fill the data segment registers |
134 | movw $16,%ax |
137 | movw $16,%ax |
135 | movw %ax,%ds |
138 | movw %ax,%ds |
136 | movw %ax,%es |
139 | movw %ax,%es |
137 | 140 | ||
138 | movl $(\i),%edi |
141 | movl $(\i),%edi |
139 | pushl %ebp |
142 | pushl %ebp |
140 | addl $4,(%esp) |
143 | addl $4,(%esp) |
141 | pushl %edi |
144 | pushl %edi |
142 | call trap_dispatcher |
145 | call trap_dispatcher |
143 | addl $8,%esp |
146 | addl $8,%esp |
144 | 147 | ||
- | 148 | pop %es |
|
- | 149 | pop %ds |
|
- | 150 | ||
145 | popa |
151 | popa |
146 | pop %ebp |
152 | pop %ebp |
147 | 153 | ||
148 | iret |
154 | iret |
149 | 155 | ||
150 | .if (\n-\i)-1 |
156 | .if (\n-\i)-1 |
151 | handler "(\i+1)",\n |
157 | handler "(\i+1)",\n |
152 | .endif |
158 | .endif |
153 | .endm |
159 | .endm |
154 | 160 | ||
155 | # keep in sync with pm.h !!! |
161 | # keep in sync with pm.h !!! |
156 | IDT_ITEMS=64 |
162 | IDT_ITEMS=64 |
157 | interrupt_handlers: |
163 | interrupt_handlers: |
158 | h_start: |
164 | h_start: |
159 | handler 0 64 |
165 | handler 0 64 |
160 | # handler 64 128 |
166 | # handler 64 128 |
161 | # handler 128 192 |
167 | # handler 128 192 |
162 | # handler 192 256 |
168 | # handler 192 256 |
163 | h_end: |
169 | h_end: |
164 | 170 | ||
165 | 171 | ||
166 | inb: |
172 | inb: |
167 | push %edx |
173 | push %edx |
168 | xorl %eax,%eax |
174 | xorl %eax,%eax |
169 | movl 8(%esp),%edx |
175 | movl 8(%esp),%edx |
170 | inb %dx,%al |
176 | inb %dx,%al |
171 | pop %edx |
177 | pop %edx |
172 | ret |
178 | ret |
173 | 179 | ||
174 | inw: |
180 | inw: |
175 | push %edx |
181 | push %edx |
176 | xorl %eax,%eax |
182 | xorl %eax,%eax |
177 | movl 8(%esp),%edx |
183 | movl 8(%esp),%edx |
178 | inw %dx,%ax |
184 | inw %dx,%ax |
179 | pop %edx |
185 | pop %edx |
180 | ret |
186 | ret |
181 | 187 | ||
182 | inl: |
188 | inl: |
183 | push %edx |
189 | push %edx |
184 | xorl %eax,%eax |
190 | xorl %eax,%eax |
185 | movl 8(%esp),%edx |
191 | movl 8(%esp),%edx |
186 | inl %dx,%eax |
192 | inl %dx,%eax |
187 | pop %edx |
193 | pop %edx |
188 | ret |
194 | ret |
189 | 195 | ||
190 | outb: |
196 | outb: |
191 | push %ebp |
197 | push %ebp |
192 | movl %esp,%ebp |
198 | movl %esp,%ebp |
193 | pusha |
199 | pusha |
194 | 200 | ||
195 | movl 8(%ebp),%edx |
201 | movl 8(%ebp),%edx |
196 | movl 12(%ebp),%eax |
202 | movl 12(%ebp),%eax |
197 | outb %al,%dx |
203 | outb %al,%dx |
198 | 204 | ||
199 | popa |
205 | popa |
200 | pop %ebp |
206 | pop %ebp |
201 | ret |
207 | ret |
202 | 208 | ||
203 | outw: |
209 | outw: |
204 | push %ebp |
210 | push %ebp |
205 | movl %esp,%ebp |
211 | movl %esp,%ebp |
206 | pusha |
212 | pusha |
207 | 213 | ||
208 | movl 8(%ebp),%edx |
214 | movl 8(%ebp),%edx |
209 | movl 12(%ebp),%eax |
215 | movl 12(%ebp),%eax |
210 | outw %ax,%dx |
216 | outw %ax,%dx |
211 | 217 | ||
212 | popa |
218 | popa |
213 | pop %ebp |
219 | pop %ebp |
214 | ret |
220 | ret |
215 | 221 | ||
216 | outl: |
222 | outl: |
217 | push %ebp |
223 | push %ebp |
218 | movl %esp,%ebp |
224 | movl %esp,%ebp |
219 | pusha |
225 | pusha |
220 | 226 | ||
221 | movl 8(%ebp),%edx |
227 | movl 8(%ebp),%edx |
222 | movl 12(%ebp),%eax |
228 | movl 12(%ebp),%eax |
223 | outl %eax,%dx |
229 | outl %eax,%dx |
224 | 230 | ||
225 | popa |
231 | popa |
226 | pop %ebp |
232 | pop %ebp |
227 | ret |
233 | ret |
228 | 234 | ||
229 | SRC=8 |
235 | SRC=8 |
230 | DST=12 |
236 | DST=12 |
231 | CNT=16 |
237 | CNT=16 |
232 | memcopy: |
238 | memcopy: |
233 | push %ebp |
239 | push %ebp |
234 | movl %esp,%ebp |
240 | movl %esp,%ebp |
235 | pusha |
241 | pusha |
236 | 242 | ||
237 | cld |
243 | cld |
238 | movl CNT(%ebp),%ecx |
244 | movl CNT(%ebp),%ecx |
239 | movl DST(%ebp),%edi |
245 | movl DST(%ebp),%edi |
240 | movl SRC(%ebp),%esi |
246 | movl SRC(%ebp),%esi |
241 | 247 | ||
242 | rep movsb %ds:(%esi),%es:(%edi) |
248 | rep movsb %ds:(%esi),%es:(%edi) |
243 | 249 | ||
244 | popa |
250 | popa |
245 | pop %ebp |
251 | pop %ebp |
246 | ret |
252 | ret |
247 | 253 | ||
248 | DST=8 |
254 | DST=8 |
249 | CNT=12 |
255 | CNT=12 |
250 | X=16 |
256 | X=16 |
251 | memsetw: |
257 | memsetw: |
252 | push %ebp |
258 | push %ebp |
253 | movl %esp,%ebp |
259 | movl %esp,%ebp |
254 | pusha |
260 | pusha |
255 | 261 | ||
256 | cld |
262 | cld |
257 | movl CNT(%ebp),%ecx |
263 | movl CNT(%ebp),%ecx |
258 | movl DST(%ebp),%edi |
264 | movl DST(%ebp),%edi |
259 | movl X(%ebp),%eax |
265 | movl X(%ebp),%eax |
260 | 266 | ||
261 | rep stosw %ax,%es:(%edi) |
267 | rep stosw %ax,%es:(%edi) |
262 | 268 | ||
263 | popa |
269 | popa |
264 | pop %ebp |
270 | pop %ebp |
265 | ret |
271 | ret |
266 | 272 | ||
267 | DST=8 |
273 | DST=8 |
268 | CNT=12 |
274 | CNT=12 |
269 | X=16 |
275 | X=16 |
270 | memsetb: |
276 | memsetb: |
271 | push %ebp |
277 | push %ebp |
272 | movl %esp,%ebp |
278 | movl %esp,%ebp |
273 | pusha |
279 | pusha |
274 | 280 | ||
275 | cld |
281 | cld |
276 | movl CNT(%ebp),%ecx |
282 | movl CNT(%ebp),%ecx |
277 | movl DST(%ebp),%edi |
283 | movl DST(%ebp),%edi |
278 | movl X(%ebp),%eax |
284 | movl X(%ebp),%eax |
279 | 285 | ||
280 | rep stosb %al,%es:(%edi) |
286 | rep stosb %al,%es:(%edi) |
281 | 287 | ||
282 | popa |
288 | popa |
283 | pop %ebp |
289 | pop %ebp |
284 | ret |
290 | ret |
285 | 291 | ||
286 | SRC=12 |
292 | SRC=12 |
287 | DST=16 |
293 | DST=16 |
288 | CNT=20 |
294 | CNT=20 |
289 | memcmp: |
295 | memcmp: |
290 | push %ebp |
296 | push %ebp |
291 | subl $4,%esp |
297 | subl $4,%esp |
292 | movl %esp,%ebp |
298 | movl %esp,%ebp |
293 | 299 | ||
294 | pusha |
300 | pusha |
295 | 301 | ||
296 | cld |
302 | cld |
297 | movl CNT(%ebp),%ecx |
303 | movl CNT(%ebp),%ecx |
298 | movl DST(%ebp),%edi |
304 | movl DST(%ebp),%edi |
299 | movl SRC(%ebp),%esi |
305 | movl SRC(%ebp),%esi |
300 | 306 | ||
301 | repe cmpsb %es:(%edi),%ds:(%esi) |
307 | repe cmpsb %es:(%edi),%ds:(%esi) |
302 | movl %ecx,(%ebp) |
308 | movl %ecx,(%ebp) |
303 | 309 | ||
304 | popa |
310 | popa |
305 | 311 | ||
306 | movl (%ebp),%eax # return value => %eax (zero on success) |
312 | movl (%ebp),%eax # return value => %eax (zero on success) |
307 | addl $4,%esp |
313 | addl $4,%esp |
308 | pop %ebp |
314 | pop %ebp |
309 | 315 | ||
310 | ret |
316 | ret |
311 | 317 | ||
312 | 318 | ||
313 | # THIS IS USERSPACE CODE |
319 | # THIS IS USERSPACE CODE |
314 | .global utext |
320 | .global utext |
315 | utext: |
321 | utext: |
316 | 0: |
322 | 0: |
317 | movl $0xdeadbeaf, %eax |
323 | # movl $0xdeadbeaf, %eax |
318 | int $48 |
324 | int $48 |
319 | jmp 0b |
325 | jmp 0b |
320 | # not reached |
326 | # not reached |
321 | utext_end: |
327 | utext_end: |
322 | 328 | ||
323 | .data |
329 | .data |
324 | .global utext_size |
330 | .global utext_size |
325 | utext_size: |
331 | utext_size: |
326 | .long utext_end - utext |
332 | .long utext_end - utext |
327 | 333 | ||
328 | 334 | ||
329 | .section K_DATA_START |
335 | .section K_DATA_START |
330 | .global interrupt_handler_size |
336 | .global interrupt_handler_size |
331 | 337 | ||
332 | interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS |
338 | interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS |
333 | 339 |