WebSVN – HelenOS-historic – Diff – /SPARTAN/trunk/arch/ia32/src/asm.S


#
# Copyright (C) 2001-2004 Jakub Jermar
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# - Redistributions of source code must retain the above copyright
#   notice, this list of conditions and the following disclaimer.
# - Redistributions in binary form must reproduce the above copyright
#   notice, this list of conditions and the following disclaimer in the
#   documentation and/or other materials provided with the distribution.
# - The name of the author may not be used to endorse or promote products
#   derived from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
 
## very low and hardware-level functions
 
#  Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word
# and 1 means interrupt with error word
#define ERROR_WORD_INTERRUPT_LIST 0x00027D00
 
.text
 
.global paging_on
.global enable_l_apic_in_msr
.global interrupt_handlers
.global memsetb
.global memsetw
 
 
 
## Turn paging on
#
# Enable paging and write-back caching in CR0.
#
paging_on:
	movl %cr0,%edx
	orl $(1<<31),%edx		# paging on
	andl $~((1<<30)|(1<<29)),%edx	# clear Cache Disable and not Write Though
	movl %edx,%cr0
	jmp 0f
0:
	ret
 
 
## Enable local APIC
#
# Enable local APIC in MSR.
#
enable_l_apic_in_msr:
	push %eax
 
	movl $0x1b, %ecx
	rdmsr
	orl $(1<<11),%eax
	orl $(0xfee00000),%eax
	wrmsr
 
	pop %eax
	ret
 
 
## Declare interrupt handlers
#
# Declare interrupt handlers for n interrupt
# vectors starting at vector i.
#
# The handlers setup data segment registers
# and call trap_dispatcher().
#
.macro handler i n
	push %ebp
	movl %esp,%ebp
	pusha
 
	push %ds
	push %es
 
	# we must fill the data segment registers
	movw $16,%ax
	movw %ax,%ds
	movw %ax,%es
 
	movl $(\i),%edi
	pushl %ebp
	addl $4,(%esp)
	pushl %edi
	call trap_dispatcher
	addl $8,%esp
 
	pop %es
	pop %ds
 
 
# CLNT
	pushfl
	pop %eax
	and $0xFFFFBFFF,%eax
	push %eax
	popfl
	
 
 
# Test if this is interrupt with error word or not
	mov $\i,%cl
	movl $1,%eax
	test $0xe0,%cl
	jnz 0f
	and $0x1f,%cl
	shl %cl,%eax
	and $ERROR_WORD_INTERRUPT_LIST,%eax
	jz 0f
 
 
# Return with error word
	popa
	pop %ebp
	add $4,%esp	# Skip error word
	iret
 
0:
# Return with no error word
	popa
	pop %ebp
	iret
 
	.if (\n-\i)-1
	handler "(\i+1)",\n
	.endif
.endm
 
# keep in sync with pm.h !!!
IDT_ITEMS=64
interrupt_handlers:
h_start:
	handler 0 64
#	handler 64 128	
#	handler 128 192
#	handler 192 256
h_end:
 
 
## Fill memory with bytes
#
# Fill a given number of bytes (2nd argument)
# at memory defined by 1st argument with the
# byte value defined by 3rd argument.
#
DST=12
CNT=16
X=20
memsetb:
	push %eax
	push %edi
 
	movl CNT(%esp),%ecx
	movl DST(%esp),%edi
	movl X(%esp),%eax
 
	rep stosb %al,%es:(%edi)
 
	pop %edi
	pop %eax
	ret
 
 
## Fill memory with words
#
# Fill a given number of words (2nd argument)
# at memory defined by 1st argument with the
# word value defined by 3rd argument.
#
DST=12
CNT=16
X=20
memsetw:
	push %eax
	push %edi
 
	movl CNT(%esp),%ecx
	movl DST(%esp),%edi
	movl X(%esp),%eax
 
	rep stosw %ax,%es:(%edi)
 
	pop %edi
	pop %eax
 
	ret
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
# THIS IS USERSPACE CODE
.global utext
utext:
	xor %ax,%ax
	mov %ax,%ds
	mov %ax,%es
	mov %ax,%fs
	mov %ax,%gs
0:
	int $48
	jmp 0b
	# not reached
utext_end:
 
.data
.global utext_size
utext_size:
	.long utext_end - utext 
 
.global interrupt_handler_size
 
interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS
 

Rev 381	Rev 390
1	#	1	#
2	# Copyright (C) 2001-2004 Jakub Jermar	2	# Copyright (C) 2001-2004 Jakub Jermar
3	# All rights reserved.	3	# All rights reserved.
4	#	4	#
5	# Redistribution and use in source and binary forms, with or without	5	# Redistribution and use in source and binary forms, with or without
6	# modification, are permitted provided that the following conditions	6	# modification, are permitted provided that the following conditions
7	# are met:	7	# are met:
8	#	8	#
9	# - Redistributions of source code must retain the above copyright	9	# - Redistributions of source code must retain the above copyright
10	# notice, this list of conditions and the following disclaimer.	10	# notice, this list of conditions and the following disclaimer.
11	# - Redistributions in binary form must reproduce the above copyright	11	# - Redistributions in binary form must reproduce the above copyright
12	# notice, this list of conditions and the following disclaimer in the	12	# notice, this list of conditions and the following disclaimer in the
13	# documentation and/or other materials provided with the distribution.	13	# documentation and/or other materials provided with the distribution.
14	# - The name of the author may not be used to endorse or promote products	14	# - The name of the author may not be used to endorse or promote products
15	# derived from this software without specific prior written permission.	15	# derived from this software without specific prior written permission.
16	#	16	#
17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	17	# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	18	# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	19	# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	20	# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	21	# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	22	# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	23	# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	24	# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	25	# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	26	# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27	#	27	#
28		28
29	## very low and hardware-level functions	29	## very low and hardware-level functions
30		30
31	# Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word	31	# Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word
32	# and 1 means interrupt with error word	32	# and 1 means interrupt with error word
33	#define ERROR_WORD_INTERRUPT_LIST 0x00027D00	33	#define ERROR_WORD_INTERRUPT_LIST 0x00027D00
34		34
35	.text	35	.text
36		36
37	.global paging_on	37	.global paging_on
38	.global enable_l_apic_in_msr	38	.global enable_l_apic_in_msr
39	.global interrupt_handlers	39	.global interrupt_handlers
40	.global memsetb	40	.global memsetb
41	.global memsetw	41	.global memsetw
42	.global memcmp	-
43		-
44		42
45	## Turn paging on	43	## Turn paging on
46	#	44	#
47	# Enable paging and write-back caching in CR0.	45	# Enable paging and write-back caching in CR0.
48	#	46	#
49	paging_on:	47	paging_on:
50	movl %cr0,%edx	48	movl %cr0,%edx
51	orl $(1<<31),%edx # paging on	49	orl $(1<<31),%edx # paging on
52	andl $~((1<<30)\|(1<<29)),%edx # clear Cache Disable and not Write Though	50	andl $~((1<<30)\|(1<<29)),%edx # clear Cache Disable and not Write Though
53	movl %edx,%cr0	51	movl %edx,%cr0
54	jmp 0f	52	jmp 0f
55	0:	53	0:
56	ret	54	ret
57		55
58		56
59	## Enable local APIC	57	## Enable local APIC
60	#	58	#
61	# Enable local APIC in MSR.	59	# Enable local APIC in MSR.
62	#	60	#
63	enable_l_apic_in_msr:	61	enable_l_apic_in_msr:
64	push %eax	62	push %eax
65		63
66	movl $0x1b, %ecx	64	movl $0x1b, %ecx
67	rdmsr	65	rdmsr
68	orl $(1<<11),%eax	66	orl $(1<<11),%eax
69	orl $(0xfee00000),%eax	67	orl $(0xfee00000),%eax
70	wrmsr	68	wrmsr
71		69
72	pop %eax	70	pop %eax
73	ret	71	ret
74		72
75		73
76	## Declare interrupt handlers	74	## Declare interrupt handlers
77	#	75	#
78	# Declare interrupt handlers for n interrupt	76	# Declare interrupt handlers for n interrupt
79	# vectors starting at vector i.	77	# vectors starting at vector i.
80	#	78	#
81	# The handlers setup data segment registers	79	# The handlers setup data segment registers
82	# and call trap_dispatcher().	80	# and call trap_dispatcher().
83	#	81	#
84	.macro handler i n	82	.macro handler i n
85	push %ebp	83	push %ebp
86	movl %esp,%ebp	84	movl %esp,%ebp
87	pusha	85	pusha
88		86
89	push %ds	87	push %ds
90	push %es	88	push %es
91		89
92	# we must fill the data segment registers	90	# we must fill the data segment registers
93	movw $16,%ax	91	movw $16,%ax
94	movw %ax,%ds	92	movw %ax,%ds
95	movw %ax,%es	93	movw %ax,%es
96		94
97	movl $(\i),%edi	95	movl $(\i),%edi
98	pushl %ebp	96	pushl %ebp
99	addl $4,(%esp)	97	addl $4,(%esp)
100	pushl %edi	98	pushl %edi
101	call trap_dispatcher	99	call trap_dispatcher
102	addl $8,%esp	100	addl $8,%esp
103		101
104	pop %es	102	pop %es
105	pop %ds	103	pop %ds
106		104
107		105
108	# CLNT	106	# CLNT
109	pushfl	107	pushfl
110	pop %eax	108	pop %eax
111	and $0xFFFFBFFF,%eax	109	and $0xFFFFBFFF,%eax
112	push %eax	110	push %eax
113	popfl	111	popfl
114		112
115		113
116		114
117	# Test if this is interrupt with error word or not	115	# Test if this is interrupt with error word or not
118	mov $\i,%cl	116	mov $\i,%cl
119	movl $1,%eax	117	movl $1,%eax
120	test $0xe0,%cl	118	test $0xe0,%cl
121	jnz 0f	119	jnz 0f
122	and $0x1f,%cl	120	and $0x1f,%cl
123	shl %cl,%eax	121	shl %cl,%eax
124	and $ERROR_WORD_INTERRUPT_LIST,%eax	122	and $ERROR_WORD_INTERRUPT_LIST,%eax
125	jz 0f	123	jz 0f
126		124
127		125
128	# Return with error word	126	# Return with error word
129	popa	127	popa
130	pop %ebp	128	pop %ebp
131	add $4,%esp # Skip error word	129	add $4,%esp # Skip error word
132	iret	130	iret
133		131
134	0:	132	0:
135	# Return with no error word	133	# Return with no error word
136	popa	134	popa
137	pop %ebp	135	pop %ebp
138	iret	136	iret
139		137
140	.if (\n-\i)-1	138	.if (\n-\i)-1
141	handler "(\i+1)",\n	139	handler "(\i+1)",\n
142	.endif	140	.endif
143	.endm	141	.endm
144		142
145	# keep in sync with pm.h !!!	143	# keep in sync with pm.h !!!
146	IDT_ITEMS=64	144	IDT_ITEMS=64
147	interrupt_handlers:	145	interrupt_handlers:
148	h_start:	146	h_start:
149	handler 0 64	147	handler 0 64
150	# handler 64 128	148	# handler 64 128
151	# handler 128 192	149	# handler 128 192
152	# handler 192 256	150	# handler 192 256
153	h_end:	151	h_end:
154		152
155		153
156	## Fill memory with bytes	154	## Fill memory with bytes
157	#	155	#
158	# Fill a given number of bytes (2nd argument)	156	# Fill a given number of bytes (2nd argument)
159	# at memory defined by 1st argument with the	157	# at memory defined by 1st argument with the
160	# byte value defined by 3rd argument.	158	# byte value defined by 3rd argument.
161	#	159	#
162	DST=12	160	DST=12
163	CNT=16	161	CNT=16
164	X=20	162	X=20
165	memsetb:	163	memsetb:
166	push %eax	164	push %eax
167	push %edi	165	push %edi
168		166
169	movl CNT(%esp),%ecx	167	movl CNT(%esp),%ecx
170	movl DST(%esp),%edi	168	movl DST(%esp),%edi
171	movl X(%esp),%eax	169	movl X(%esp),%eax
172		170
173	rep stosb %al,%es:(%edi)	171	rep stosb %al,%es:(%edi)
174		172
175	pop %edi	173	pop %edi
176	pop %eax	174	pop %eax
177	ret	175	ret
178		176
179		177
180	## Fill memory with words	178	## Fill memory with words
181	#	179	#
182	# Fill a given number of words (2nd argument)	180	# Fill a given number of words (2nd argument)
183	# at memory defined by 1st argument with the	181	# at memory defined by 1st argument with the
184	# word value defined by 3rd argument.	182	# word value defined by 3rd argument.
185	#	183	#
186	DST=12	184	DST=12
187	CNT=16	185	CNT=16
188	X=20	186	X=20
189	memsetw:	187	memsetw:
190	push %eax	188	push %eax
191	push %edi	189	push %edi
192		190
193	movl CNT(%esp),%ecx	191	movl CNT(%esp),%ecx
194	movl DST(%esp),%edi	192	movl DST(%esp),%edi
195	movl X(%esp),%eax	193	movl X(%esp),%eax
196		194
197	rep stosw %ax,%es:(%edi)	195	rep stosw %ax,%es:(%edi)
198		196
199	pop %edi	197	pop %edi
200	pop %eax	198	pop %eax
201		199
202	ret	200	ret
203		-
204		-
205	## Compare memory regions for equality	-
206	#	-
207	# Compare a given number of bytes (3rd argument)	-
208	# at memory locations defined by 1st and 2nd argument	-
209	# for equality. If the bytes are equal, EAX contains 0.	-
210	#	-
211	SRC=12	-
212	DST=16	-
213	CNT=20	-
214	memcmp:	-
215	push %esi	-
216	push %edi	-
217		-
218	movl CNT(%esp),%ecx	-
219	movl DST(%esp),%edi	-
220	movl SRC(%esp),%esi	-
221		-
222	repe cmpsb %es:(%edi),%ds:(%esi)	-
223	movl %ecx,%eax # %ecx contains the return value (zero on success)	-
224		-
225	pop %edi	-
226	pop %esi	-
227		-
228	ret	-
229		201
230		202
231	# THIS IS USERSPACE CODE	203	# THIS IS USERSPACE CODE
232	.global utext	204	.global utext
233	utext:	205	utext:
234	xor %ax,%ax	206	xor %ax,%ax
235	mov %ax,%ds	207	mov %ax,%ds
236	mov %ax,%es	208	mov %ax,%es
237	mov %ax,%fs	209	mov %ax,%fs
238	mov %ax,%gs	210	mov %ax,%gs
239	0:	211	0:
240	int $48	212	int $48
241	jmp 0b	213	jmp 0b
242	# not reached	214	# not reached
243	utext_end:	215	utext_end:
244		216
245	.data	217	.data
246	.global utext_size	218	.global utext_size
247	utext_size:	219	utext_size:
248	.long utext_end - utext	220	.long utext_end - utext
249		221
250	.global interrupt_handler_size	222	.global interrupt_handler_size
251		223
252	interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS	224	interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS
253		225

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(root)/SPARTAN/trunk/arch/ia32/src/asm.S @ 392 – Rev 381 → 390