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1 | # |
1 | # |
2 | # Copyright (C) 2001-2004 Jakub Jermar |
2 | # Copyright (C) 2001-2004 Jakub Jermar |
3 | # All rights reserved. |
3 | # All rights reserved. |
4 | # |
4 | # |
5 | # Redistribution and use in source and binary forms, with or without |
5 | # Redistribution and use in source and binary forms, with or without |
6 | # modification, are permitted provided that the following conditions |
6 | # modification, are permitted provided that the following conditions |
7 | # are met: |
7 | # are met: |
8 | # |
8 | # |
9 | # - Redistributions of source code must retain the above copyright |
9 | # - Redistributions of source code must retain the above copyright |
10 | # notice, this list of conditions and the following disclaimer. |
10 | # notice, this list of conditions and the following disclaimer. |
11 | # - Redistributions in binary form must reproduce the above copyright |
11 | # - Redistributions in binary form must reproduce the above copyright |
12 | # notice, this list of conditions and the following disclaimer in the |
12 | # notice, this list of conditions and the following disclaimer in the |
13 | # documentation and/or other materials provided with the distribution. |
13 | # documentation and/or other materials provided with the distribution. |
14 | # - The name of the author may not be used to endorse or promote products |
14 | # - The name of the author may not be used to endorse or promote products |
15 | # derived from this software without specific prior written permission. |
15 | # derived from this software without specific prior written permission. |
16 | # |
16 | # |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | # THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | # IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | # OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | # IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | # INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | # NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | # DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | # THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | # (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | # THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | # |
27 | # |
28 | 28 | ||
29 | ## very low and hardware-level functions |
29 | ## very low and hardware-level functions |
30 | 30 | ||
31 | # Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word |
31 | # Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word |
32 | # and 1 means interrupt with error word |
32 | # and 1 means interrupt with error word |
33 | #define ERROR_WORD_INTERRUPT_LIST 0x00027D00 |
33 | #define ERROR_WORD_INTERRUPT_LIST 0x00027D00 |
34 | 34 | ||
35 | .text |
35 | .text |
36 | 36 | ||
37 | .global paging_on |
37 | .global paging_on |
38 | .global enable_l_apic_in_msr |
38 | .global enable_l_apic_in_msr |
39 | .global interrupt_handlers |
39 | .global interrupt_handlers |
40 | .global memcpy |
- | |
41 | .global memsetb |
40 | .global memsetb |
42 | .global memsetw |
41 | .global memsetw |
43 | .global memcmp |
42 | .global memcmp |
44 | 43 | ||
45 | 44 | ||
46 | ## Turn paging on |
45 | ## Turn paging on |
47 | # |
46 | # |
48 | # Enable paging and write-back caching in CR0. |
47 | # Enable paging and write-back caching in CR0. |
49 | # |
48 | # |
50 | paging_on: |
49 | paging_on: |
51 | movl %cr0,%edx |
50 | movl %cr0,%edx |
52 | orl $(1<<31),%edx # paging on |
51 | orl $(1<<31),%edx # paging on |
53 | andl $~((1<<30)|(1<<29)),%edx # clear Cache Disable and not Write Though |
52 | andl $~((1<<30)|(1<<29)),%edx # clear Cache Disable and not Write Though |
54 | movl %edx,%cr0 |
53 | movl %edx,%cr0 |
55 | jmp 0f |
54 | jmp 0f |
56 | 0: |
55 | 0: |
57 | ret |
56 | ret |
58 | 57 | ||
59 | 58 | ||
60 | ## Enable local APIC |
59 | ## Enable local APIC |
61 | # |
60 | # |
62 | # Enable local APIC in MSR. |
61 | # Enable local APIC in MSR. |
63 | # |
62 | # |
64 | enable_l_apic_in_msr: |
63 | enable_l_apic_in_msr: |
65 | push %eax |
64 | push %eax |
66 | 65 | ||
67 | movl $0x1b, %ecx |
66 | movl $0x1b, %ecx |
68 | rdmsr |
67 | rdmsr |
69 | orl $(1<<11),%eax |
68 | orl $(1<<11),%eax |
70 | orl $(0xfee00000),%eax |
69 | orl $(0xfee00000),%eax |
71 | wrmsr |
70 | wrmsr |
72 | 71 | ||
73 | pop %eax |
72 | pop %eax |
74 | ret |
73 | ret |
75 | 74 | ||
76 | 75 | ||
77 | ## Declare interrupt handlers |
76 | ## Declare interrupt handlers |
78 | # |
77 | # |
79 | # Declare interrupt handlers for n interrupt |
78 | # Declare interrupt handlers for n interrupt |
80 | # vectors starting at vector i. |
79 | # vectors starting at vector i. |
81 | # |
80 | # |
82 | # The handlers setup data segment registers |
81 | # The handlers setup data segment registers |
83 | # and call trap_dispatcher(). |
82 | # and call trap_dispatcher(). |
84 | # |
83 | # |
85 | .macro handler i n |
84 | .macro handler i n |
86 | push %ebp |
85 | push %ebp |
87 | movl %esp,%ebp |
86 | movl %esp,%ebp |
88 | pusha |
87 | pusha |
89 | 88 | ||
90 | push %ds |
89 | push %ds |
91 | push %es |
90 | push %es |
92 | 91 | ||
93 | # we must fill the data segment registers |
92 | # we must fill the data segment registers |
94 | movw $16,%ax |
93 | movw $16,%ax |
95 | movw %ax,%ds |
94 | movw %ax,%ds |
96 | movw %ax,%es |
95 | movw %ax,%es |
97 | 96 | ||
98 | movl $(\i),%edi |
97 | movl $(\i),%edi |
99 | pushl %ebp |
98 | pushl %ebp |
100 | addl $4,(%esp) |
99 | addl $4,(%esp) |
101 | pushl %edi |
100 | pushl %edi |
102 | call trap_dispatcher |
101 | call trap_dispatcher |
103 | addl $8,%esp |
102 | addl $8,%esp |
104 | 103 | ||
105 | pop %es |
104 | pop %es |
106 | pop %ds |
105 | pop %ds |
107 | 106 | ||
108 | 107 | ||
109 | # CLNT |
108 | # CLNT |
110 | pushfl |
109 | pushfl |
111 | pop %eax |
110 | pop %eax |
112 | and $0xFFFFBFFF,%eax |
111 | and $0xFFFFBFFF,%eax |
113 | push %eax |
112 | push %eax |
114 | popfl |
113 | popfl |
115 | 114 | ||
116 | 115 | ||
117 | 116 | ||
118 | # Test if this is interrupt with error word or not |
117 | # Test if this is interrupt with error word or not |
119 | mov $\i,%cl |
118 | mov $\i,%cl |
120 | movl $1,%eax |
119 | movl $1,%eax |
121 | test $0xe0,%cl |
120 | test $0xe0,%cl |
122 | jnz 0f |
121 | jnz 0f |
123 | and $0x1f,%cl |
122 | and $0x1f,%cl |
124 | shl %cl,%eax |
123 | shl %cl,%eax |
125 | and $ERROR_WORD_INTERRUPT_LIST,%eax |
124 | and $ERROR_WORD_INTERRUPT_LIST,%eax |
126 | jz 0f |
125 | jz 0f |
127 | 126 | ||
128 | 127 | ||
129 | # Return with error word |
128 | # Return with error word |
130 | popa |
129 | popa |
131 | pop %ebp |
130 | pop %ebp |
132 | add $4,%esp # Skip error word |
131 | add $4,%esp # Skip error word |
133 | iret |
132 | iret |
134 | 133 | ||
135 | 0: |
134 | 0: |
136 | # Return with no error word |
135 | # Return with no error word |
137 | popa |
136 | popa |
138 | pop %ebp |
137 | pop %ebp |
139 | iret |
138 | iret |
140 | 139 | ||
141 | .if (\n-\i)-1 |
140 | .if (\n-\i)-1 |
142 | handler "(\i+1)",\n |
141 | handler "(\i+1)",\n |
143 | .endif |
142 | .endif |
144 | .endm |
143 | .endm |
145 | 144 | ||
146 | # keep in sync with pm.h !!! |
145 | # keep in sync with pm.h !!! |
147 | IDT_ITEMS=64 |
146 | IDT_ITEMS=64 |
148 | interrupt_handlers: |
147 | interrupt_handlers: |
149 | h_start: |
148 | h_start: |
150 | handler 0 64 |
149 | handler 0 64 |
151 | # handler 64 128 |
150 | # handler 64 128 |
152 | # handler 128 192 |
151 | # handler 128 192 |
153 | # handler 192 256 |
152 | # handler 192 256 |
154 | h_end: |
153 | h_end: |
155 | 154 | ||
156 | - | ||
157 | ## Copy memory |
- | |
158 | # |
- | |
159 | # Copy a given number of bytes (3rd argument) |
- | |
160 | # from the memory location defined by 2nd argument |
- | |
161 | # to the memory location defined by 1st argument. |
- | |
162 | # The memory areas cannot overlap. |
- | |
163 | # |
- | |
164 | SRC=16 |
- | |
165 | DST=12 |
- | |
166 | CNT=20 |
- | |
167 | memcpy: |
- | |
168 | push %esi |
- | |
169 | push %edi |
- | |
170 | - | ||
171 | movl CNT(%esp),%ecx |
- | |
172 | movl DST(%esp),%edi |
- | |
173 | movl SRC(%esp),%esi |
- | |
174 | - | ||
175 | rep movsb %ds:(%esi),%es:(%edi) |
- | |
176 | - | ||
177 | pop %edi |
- | |
178 | pop %esi |
- | |
179 | ret |
- | |
180 | - | ||
181 | 155 | ||
182 | ## Fill memory with bytes |
156 | ## Fill memory with bytes |
183 | # |
157 | # |
184 | # Fill a given number of bytes (2nd argument) |
158 | # Fill a given number of bytes (2nd argument) |
185 | # at memory defined by 1st argument with the |
159 | # at memory defined by 1st argument with the |
186 | # byte value defined by 3rd argument. |
160 | # byte value defined by 3rd argument. |
187 | # |
161 | # |
188 | DST=12 |
162 | DST=12 |
189 | CNT=16 |
163 | CNT=16 |
190 | X=20 |
164 | X=20 |
191 | memsetb: |
165 | memsetb: |
192 | push %eax |
166 | push %eax |
193 | push %edi |
167 | push %edi |
194 | 168 | ||
195 | movl CNT(%esp),%ecx |
169 | movl CNT(%esp),%ecx |
196 | movl DST(%esp),%edi |
170 | movl DST(%esp),%edi |
197 | movl X(%esp),%eax |
171 | movl X(%esp),%eax |
198 | 172 | ||
199 | rep stosb %al,%es:(%edi) |
173 | rep stosb %al,%es:(%edi) |
200 | 174 | ||
201 | pop %edi |
175 | pop %edi |
202 | pop %eax |
176 | pop %eax |
203 | ret |
177 | ret |
204 | 178 | ||
205 | 179 | ||
206 | ## Fill memory with words |
180 | ## Fill memory with words |
207 | # |
181 | # |
208 | # Fill a given number of words (2nd argument) |
182 | # Fill a given number of words (2nd argument) |
209 | # at memory defined by 1st argument with the |
183 | # at memory defined by 1st argument with the |
210 | # word value defined by 3rd argument. |
184 | # word value defined by 3rd argument. |
211 | # |
185 | # |
212 | DST=12 |
186 | DST=12 |
213 | CNT=16 |
187 | CNT=16 |
214 | X=20 |
188 | X=20 |
215 | memsetw: |
189 | memsetw: |
216 | push %eax |
190 | push %eax |
217 | push %edi |
191 | push %edi |
218 | 192 | ||
219 | movl CNT(%esp),%ecx |
193 | movl CNT(%esp),%ecx |
220 | movl DST(%esp),%edi |
194 | movl DST(%esp),%edi |
221 | movl X(%esp),%eax |
195 | movl X(%esp),%eax |
222 | 196 | ||
223 | rep stosw %ax,%es:(%edi) |
197 | rep stosw %ax,%es:(%edi) |
224 | 198 | ||
225 | pop %edi |
199 | pop %edi |
226 | pop %eax |
200 | pop %eax |
227 | 201 | ||
228 | ret |
202 | ret |
229 | 203 | ||
230 | 204 | ||
231 | ## Compare memory regions for equality |
205 | ## Compare memory regions for equality |
232 | # |
206 | # |
233 | # Compare a given number of bytes (3rd argument) |
207 | # Compare a given number of bytes (3rd argument) |
234 | # at memory locations defined by 1st and 2nd argument |
208 | # at memory locations defined by 1st and 2nd argument |
235 | # for equality. If the bytes are equal, EAX contains |
209 | # for equality. If the bytes are equal, EAX contains |
236 | # 0. |
210 | # 0. |
237 | # |
211 | # |
238 | SRC=12 |
212 | SRC=12 |
239 | DST=16 |
213 | DST=16 |
240 | CNT=20 |
214 | CNT=20 |
241 | memcmp: |
215 | memcmp: |
242 | push %esi |
216 | push %esi |
243 | push %edi |
217 | push %edi |
244 | 218 | ||
245 | movl CNT(%esp),%ecx |
219 | movl CNT(%esp),%ecx |
246 | movl DST(%esp),%edi |
220 | movl DST(%esp),%edi |
247 | movl SRC(%esp),%esi |
221 | movl SRC(%esp),%esi |
248 | 222 | ||
249 | repe cmpsb %es:(%edi),%ds:(%esi) |
223 | repe cmpsb %es:(%edi),%ds:(%esi) |
250 | movl %ecx,%eax # %ecx contains the return value (zero on success) |
224 | movl %ecx,%eax # %ecx contains the return value (zero on success) |
251 | 225 | ||
252 | pop %edi |
226 | pop %edi |
253 | pop %esi |
227 | pop %esi |
254 | 228 | ||
255 | ret |
229 | ret |
256 | 230 | ||
257 | 231 | ||
258 | # THIS IS USERSPACE CODE |
232 | # THIS IS USERSPACE CODE |
259 | .global utext |
233 | .global utext |
260 | utext: |
234 | utext: |
261 | xor %ax,%ax |
235 | xor %ax,%ax |
262 | mov %ax,%ds |
236 | mov %ax,%ds |
263 | mov %ax,%es |
237 | mov %ax,%es |
264 | mov %ax,%fs |
238 | mov %ax,%fs |
265 | mov %ax,%gs |
239 | mov %ax,%gs |
266 | 0: |
240 | 0: |
267 | int $48 |
241 | int $48 |
268 | jmp 0b |
242 | jmp 0b |
269 | # not reached |
243 | # not reached |
270 | utext_end: |
244 | utext_end: |
271 | 245 | ||
272 | .data |
246 | .data |
273 | .global utext_size |
247 | .global utext_size |
274 | utext_size: |
248 | utext_size: |
275 | .long utext_end - utext |
249 | .long utext_end - utext |
276 | 250 | ||
277 | .global interrupt_handler_size |
251 | .global interrupt_handler_size |
278 | 252 | ||
279 | interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS |
253 | interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS |
280 | 254 |