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1
#
1
#
2
# Copyright (C) 2001-2004 Jakub Jermar
2
# Copyright (C) 2001-2004 Jakub Jermar
3
# All rights reserved.
3
# All rights reserved.
4
#
4
#
5
# Redistribution and use in source and binary forms, with or without
5
# Redistribution and use in source and binary forms, with or without
6
# modification, are permitted provided that the following conditions
6
# modification, are permitted provided that the following conditions
7
# are met:
7
# are met:
8
#
8
#
9
# - Redistributions of source code must retain the above copyright
9
# - Redistributions of source code must retain the above copyright
10
#   notice, this list of conditions and the following disclaimer.
10
#   notice, this list of conditions and the following disclaimer.
11
# - Redistributions in binary form must reproduce the above copyright
11
# - Redistributions in binary form must reproduce the above copyright
12
#   notice, this list of conditions and the following disclaimer in the
12
#   notice, this list of conditions and the following disclaimer in the
13
#   documentation and/or other materials provided with the distribution.
13
#   documentation and/or other materials provided with the distribution.
14
# - The name of the author may not be used to endorse or promote products
14
# - The name of the author may not be used to endorse or promote products
15
#   derived from this software without specific prior written permission.
15
#   derived from this software without specific prior written permission.
16
#
16
#
17
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17
# THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18
# IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19
# OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20
# IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22
# NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
26
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
# THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27
#
27
#
28
 
28
 
29
## very low and hardware-level functions
29
## very low and hardware-level functions
30
 
30
 
31
#  Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word
31
#  Mask for interrupts 0 - 31 (bits 0 - 31) where 0 means that int has no error word
32
# and 1 means interrupt with error word
32
# and 1 means interrupt with error word
33
#define ERROR_WORD_INTERRUPT_LIST 0x00027D00
33
#define ERROR_WORD_INTERRUPT_LIST 0x00027D00
34
 
34
 
35
.text
35
.text
36
 
36
 
37
.global cpu_halt
37
.global cpu_halt
38
.global cpu_sleep
38
.global cpu_sleep
39
.global paging_on
39
.global paging_on
40
.global enable_l_apic_in_msr
40
.global enable_l_apic_in_msr
41
.global interrupt_handlers
41
.global interrupt_handlers
42
.global inb
42
.global inb
43
.global inw
43
.global inw
44
.global inl
44
.global inl
45
.global outb
45
.global outb
46
.global outw
46
.global outw
47
.global outl
47
.global outl
48
.global memcopy
48
.global memcopy
49
.global memsetb
49
.global memsetb
50
.global memsetw
50
.global memsetw
51
.global memcmp
51
.global memcmp
52
 
52
 
53
 
53
 
54
## Turn paging on
54
## Turn paging on
55
#
55
#
56
# Enable paging and write-back caching in CR0.
56
# Enable paging and write-back caching in CR0.
57
#
57
#
58
paging_on:
58
paging_on:
59
	pushl %eax
59
	pushl %eax
60
	movl %cr0,%eax
60
	movl %cr0,%eax
61
	orl $(1<<31),%eax		# paging on
61
	orl $(1<<31),%eax		# paging on
62
	andl $~((1<<30)|(1<<29)),%eax	# clear Cache Disable and not Write Though
62
	andl $~((1<<30)|(1<<29)),%eax	# clear Cache Disable and not Write Though
63
	movl %eax,%cr0
63
	movl %eax,%cr0
64
	jmp 0f
64
	jmp 0f
65
0:
65
0:
66
	popl %eax
66
	popl %eax
67
	ret
67
	ret
68
 
68
 
69
 
69
 
70
## Enable local APIC
70
## Enable local APIC
71
#
71
#
72
# Enable local APIC in MSR.
72
# Enable local APIC in MSR.
73
#
73
#
74
enable_l_apic_in_msr:
74
enable_l_apic_in_msr:
75
	pusha
75
	pusha
76
	
76
	
77
	movl $0x1b, %ecx
77
	movl $0x1b, %ecx
78
	rdmsr
78
	rdmsr
79
	orl $(1<<11),%eax
79
	orl $(1<<11),%eax
80
	orl $(0xfee00000),%eax
80
	orl $(0xfee00000),%eax
81
	wrmsr
81
	wrmsr
82
	
82
	
83
	popa
83
	popa
84
	ret
84
	ret
85
 
85
 
86
 
86
 
87
## Declare interrupt handlers
87
## Declare interrupt handlers
88
#
88
#
89
# Declare interrupt handlers for n interrupt
89
# Declare interrupt handlers for n interrupt
90
# vectors starting at vector i.
90
# vectors starting at vector i.
91
#
91
#
92
# The handlers setup data segment registers
92
# The handlers setup data segment registers
93
# and call trap_dispatcher().
93
# and call trap_dispatcher().
94
#
94
#
95
.macro handler i n
95
.macro handler i n
96
	push %ebp
96
	push %ebp
97
	movl %esp,%ebp
97
	movl %esp,%ebp
98
	pusha
98
	pusha
99
 
99
 
100
	push %ds
100
	push %ds
101
	push %es
101
	push %es
102
 
102
 
103
	# we must fill the data segment registers
103
	# we must fill the data segment registers
104
	movw $16,%ax
104
	movw $16,%ax
105
	movw %ax,%ds
105
	movw %ax,%ds
106
	movw %ax,%es
106
	movw %ax,%es
107
 
107
 
108
	movl $(\i),%edi
108
	movl $(\i),%edi
109
	pushl %ebp
109
	pushl %ebp
110
	addl $4,(%esp)
110
	addl $4,(%esp)
111
	pushl %edi
111
	pushl %edi
112
	call trap_dispatcher
112
	call trap_dispatcher
113
	addl $8,%esp
113
	addl $8,%esp
114
 
114
 
115
	pop %es
115
	pop %es
116
	pop %ds
116
	pop %ds
117
 
117
 
118
 
118
 
119
# CLNT
119
# CLNT
120
  pushfl;
120
  pushfl;
121
	pop %eax;
121
	pop %eax;
122
	and $0xFFFFBFFF,%eax;
122
	and $0xFFFFBFFF,%eax;
123
	push %eax;
123
	push %eax;
124
	popfl;
124
	popfl;
125
	
125
	
126
 
126
 
127
 
127
 
128
# Test if this is interrupt with error word or not
128
# Test if this is interrupt with error word or not
129
	mov $\i,%cl;
129
	mov $\i,%cl;
130
	movl $1,%eax;
130
	movl $1,%eax;
131
	test $0xe0,%cl;
131
	test $0xe0,%cl;
132
	jnz 0f;
132
	jnz 0f;
133
	and $0x1f,%cl;
133
	and $0x1f,%cl;
134
	shl %cl,%eax;
134
	shl %cl,%eax;
135
	and $ERROR_WORD_INTERRUPT_LIST,%eax;
135
	and $ERROR_WORD_INTERRUPT_LIST,%eax;
136
	jz 0f;
136
	jz 0f;
137
 
137
 
138
 
138
 
139
# Return with error word
139
# Return with error word
140
	popa;
140
	popa;
141
	pop %ebp;
141
	pop %ebp;
142
	add $4,%esp;    # Skip error word
142
	add $4,%esp;    # Skip error word
143
	iret;
143
	iret;
144
 
144
 
145
0:
145
0:
146
# Return with no error word
146
# Return with no error word
147
	popa
147
	popa
148
	pop %ebp
148
	pop %ebp
149
	iret
149
	iret
150
 
150
 
151
	.if (\n-\i)-1
151
	.if (\n-\i)-1
152
	handler "(\i+1)",\n
152
	handler "(\i+1)",\n
153
	.endif
153
	.endif
154
.endm
154
.endm
155
 
155
 
156
# keep in sync with pm.h !!!
156
# keep in sync with pm.h !!!
157
IDT_ITEMS=64
157
IDT_ITEMS=64
158
interrupt_handlers:
158
interrupt_handlers:
159
h_start:
159
h_start:
160
	handler 0 64
160
	handler 0 64
161
#	handler 64 128	
161
#	handler 64 128	
162
#	handler 128 192
162
#	handler 128 192
163
#	handler 192 256
163
#	handler 192 256
164
h_end:
164
h_end:
165
 
165
 
166
 
166
 
167
## I/O input (byte)
167
## I/O input (byte)
168
#
168
#
169
# Get a byte from I/O port and store it AL.
169
# Get a byte from I/O port and store it AL.
170
#
170
#
171
inb:
171
inb:
172
	push %edx
172
	push %edx
173
	xorl %eax,%eax
173
	xorl %eax,%eax
174
	movl 8(%esp),%edx
174
	movl 8(%esp),%edx
175
	inb %dx,%al
175
	inb %dx,%al
176
	pop %edx
176
	pop %edx
177
	ret
177
	ret
178
 
178
 
179
 
179
 
180
## I/O input (word)
180
## I/O input (word)
181
#
181
#
182
# Get a word from I/O port and store it AX.
182
# Get a word from I/O port and store it AX.
183
#
183
#
184
inw:
184
inw:
185
	push %edx
185
	push %edx
186
	xorl %eax,%eax
186
	xorl %eax,%eax
187
	movl 8(%esp),%edx
187
	movl 8(%esp),%edx
188
	inw %dx,%ax
188
	inw %dx,%ax
189
	pop %edx
189
	pop %edx
190
	ret
190
	ret
191
 
191
 
192
 
192
 
193
## I/O input (dword)
193
## I/O input (dword)
194
#
194
#
195
# Get a dword from I/O port and store it EAX.
195
# Get a dword from I/O port and store it EAX.
196
#
196
#
197
inl:
197
inl:
198
	push %edx
198
	push %edx
199
	xorl %eax,%eax
199
	xorl %eax,%eax
200
	movl 8(%esp),%edx
200
	movl 8(%esp),%edx
201
	inl %dx,%eax
201
	inl %dx,%eax
202
	pop %edx
202
	pop %edx
203
	ret
203
	ret
204
 
204
 
205
 
205
 
206
## I/O output (byte)
206
## I/O output (byte)
207
#
207
#
208
# Send a byte to I/O port.
208
# Send a byte to I/O port.
209
#
209
#
210
outb:
210
outb:
211
	push %ebp
211
	push %ebp
212
	movl %esp,%ebp
212
	movl %esp,%ebp
213
	pusha
213
	pusha
214
 
214
 
215
	movl 8(%ebp),%edx
215
	movl 8(%ebp),%edx
216
	movl 12(%ebp),%eax
216
	movl 12(%ebp),%eax
217
	outb %al,%dx
217
	outb %al,%dx
218
 
218
 
219
	popa
219
	popa
220
	pop %ebp
220
	pop %ebp
221
	ret
221
	ret
222
 
222
 
223
 
223
 
224
## I/O output (word)
224
## I/O output (word)
225
#
225
#
226
# Send a word to I/O port.
226
# Send a word to I/O port.
227
#
227
#
228
outw:
228
outw:
229
	push %ebp
229
	push %ebp
230
	movl %esp,%ebp
230
	movl %esp,%ebp
231
	pusha
231
	pusha
232
 
232
 
233
	movl 8(%ebp),%edx
233
	movl 8(%ebp),%edx
234
	movl 12(%ebp),%eax
234
	movl 12(%ebp),%eax
235
	outw %ax,%dx
235
	outw %ax,%dx
236
 
236
 
237
	popa
237
	popa
238
	pop %ebp
238
	pop %ebp
239
	ret
239
	ret
240
 
240
 
241
 
241
 
242
## I/O output (dword)
242
## I/O output (dword)
243
#
243
#
244
# Send a dword to I/O port.
244
# Send a dword to I/O port.
245
#
245
#
246
outl:
246
outl:
247
	push %ebp
247
	push %ebp
248
	movl %esp,%ebp
248
	movl %esp,%ebp
249
	pusha
249
	pusha
250
 
250
 
251
	movl 8(%ebp),%edx
251
	movl 8(%ebp),%edx
252
	movl 12(%ebp),%eax
252
	movl 12(%ebp),%eax
253
	outl %eax,%dx
253
	outl %eax,%dx
254
 
254
 
255
	popa
255
	popa
256
	pop %ebp
256
	pop %ebp
257
	ret
257
	ret
258
 
258
 
259
 
259
 
260
## Copy memory
260
## Copy memory
261
#
261
#
262
# Copy a given number of bytes (3rd argument)
262
# Copy a given number of bytes (3rd argument)
263
# from the memory location defined by 1st argument
263
# from the memory location defined by 1st argument
264
# to the memory location defined by 2nd argument.
264
# to the memory location defined by 2nd argument.
265
# The memory areas cannot overlap.
265
# The memory areas cannot overlap.
266
#
266
#
267
SRC=8
267
SRC=8
268
DST=12
268
DST=12
269
CNT=16
269
CNT=16
270
memcopy:
270
memcopy:
271
	push %ebp
271
	push %ebp
272
	movl %esp,%ebp
272
	movl %esp,%ebp
273
	pusha
273
	pusha
274
 
274
 
275
	cld
275
	cld
276
	movl CNT(%ebp),%ecx
276
	movl CNT(%ebp),%ecx
277
	movl DST(%ebp),%edi
277
	movl DST(%ebp),%edi
278
	movl SRC(%ebp),%esi
278
	movl SRC(%ebp),%esi
279
 
279
 
280
	rep movsb %ds:(%esi),%es:(%edi)
280
	rep movsb %ds:(%esi),%es:(%edi)
281
 
281
 
282
	popa
282
	popa
283
	pop %ebp
283
	pop %ebp
284
	ret
284
	ret
285
 
285
 
286
 
286
 
287
## Fill memory with bytes
287
## Fill memory with bytes
288
#
288
#
289
# Fill a given number of bytes (2nd argument)
289
# Fill a given number of bytes (2nd argument)
290
# at memory defined by 1st argument with the
290
# at memory defined by 1st argument with the
291
# byte value defined by 3rd argument.
291
# byte value defined by 3rd argument.
292
#
292
#
293
DST=8
293
DST=8
294
CNT=12
294
CNT=12
295
X=16
295
X=16
296
memsetb:
296
memsetb:
297
	push %ebp
297
	push %ebp
298
	movl %esp,%ebp
298
	movl %esp,%ebp
299
	pusha
299
	pusha
300
 
300
 
301
	cld
301
	cld
302
	movl CNT(%ebp),%ecx
302
	movl CNT(%ebp),%ecx
303
	movl DST(%ebp),%edi
303
	movl DST(%ebp),%edi
304
	movl X(%ebp),%eax
304
	movl X(%ebp),%eax
305
 
305
 
306
	rep stosb %al,%es:(%edi)
306
	rep stosb %al,%es:(%edi)
307
 
307
 
308
	popa
308
	popa
309
	pop %ebp
309
	pop %ebp
310
	ret
310
	ret
311
 
311
 
312
 
312
 
313
## Fill memory with words
313
## Fill memory with words
314
#
314
#
315
# Fill a given number of words (2nd argument)
315
# Fill a given number of words (2nd argument)
316
# at memory defined by 1st argument with the
316
# at memory defined by 1st argument with the
317
# word value defined by 3rd argument.
317
# word value defined by 3rd argument.
318
#
318
#
319
DST=8
319
DST=8
320
CNT=12
320
CNT=12
321
X=16
321
X=16
322
memsetw:
322
memsetw:
323
	push %ebp
323
	push %ebp
324
	movl %esp,%ebp
324
	movl %esp,%ebp
325
	pusha
325
	pusha
326
 
326
 
327
	cld
327
	cld
328
	movl CNT(%ebp),%ecx
328
	movl CNT(%ebp),%ecx
329
	movl DST(%ebp),%edi
329
	movl DST(%ebp),%edi
330
	movl X(%ebp),%eax
330
	movl X(%ebp),%eax
331
 
331
 
332
	rep stosw %ax,%es:(%edi)
332
	rep stosw %ax,%es:(%edi)
333
 
333
 
334
	popa
334
	popa
335
	pop %ebp
335
	pop %ebp
336
	ret
336
	ret
337
 
337
 
338
 
338
 
339
## Compare memory regions for equality
339
## Compare memory regions for equality
340
#
340
#
341
# Compare a given number of bytes (3rd argument)
341
# Compare a given number of bytes (3rd argument)
342
# at memory locations defined by 1st and 2nd argument
342
# at memory locations defined by 1st and 2nd argument
343
# for equality. If the bytes are equal, EAX contains
343
# for equality. If the bytes are equal, EAX contains
344
# 0.
344
# 0.
345
#
345
#
346
SRC=12
346
SRC=12
347
DST=16
347
DST=16
348
CNT=20
348
CNT=20
349
memcmp:
349
memcmp:
350
	push %ebp
350
	push %ebp
351
	subl $4,%esp	
351
	subl $4,%esp	
352
	movl %esp,%ebp
352
	movl %esp,%ebp
353
 
353
 
354
	pusha
354
	pusha
355
 
355
 
356
	cld
356
	cld
357
	movl CNT(%ebp),%ecx
357
	movl CNT(%ebp),%ecx
358
	movl DST(%ebp),%edi
358
	movl DST(%ebp),%edi
359
	movl SRC(%ebp),%esi
359
	movl SRC(%ebp),%esi
360
 
360
 
361
	repe cmpsb %es:(%edi),%ds:(%esi)
361
	repe cmpsb %es:(%edi),%ds:(%esi)
362
	movl %ecx,(%ebp)
362
	movl %ecx,(%ebp)
363
 
363
 
364
	popa
364
	popa
365
	
365
	
366
	movl (%ebp),%eax	# return value => %eax (zero on success)
366
	movl (%ebp),%eax	# return value => %eax (zero on success)
367
	addl $4,%esp
367
	addl $4,%esp
368
	pop %ebp
368
	pop %ebp
369
	
369
	
370
	ret
370
	ret
371
 
371
 
372
 
372
 
373
# THIS IS USERSPACE CODE
373
# THIS IS USERSPACE CODE
374
.global utext
374
.global utext
375
utext:
375
utext:
376
	xor %ax,%ax;
376
	xor %ax,%ax;
377
	mov %ax,%ds;
377
	mov %ax,%ds;
378
	mov %ax,%es;
378
	mov %ax,%es;
379
	mov %ax,%fs;
379
	mov %ax,%fs;
380
	mov %ax,%gs;
380
	mov %ax,%gs;
381
0:
381
0:
382
#	movl $0xdeadbeaf, %eax
-
 
383
  int $48
382
	int $48
384
	cli;
-
 
385
	sti;
-
 
386
	jmp 0b
383
	jmp 0b
387
	# not reached
384
	# not reached
388
utext_end:
385
utext_end:
389
 
386
 
390
.data
387
.data
391
.global utext_size
388
.global utext_size
392
utext_size:
389
utext_size:
393
	.long utext_end - utext 
390
	.long utext_end - utext 
394
 
391
 
395
 
392
 
396
#.section K_DATA_START
393
#.section K_DATA_START
397
.global interrupt_handler_size
394
.global interrupt_handler_size
398
 
395
 
399
interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS
396
interrupt_handler_size: .long (h_end-h_start)/IDT_ITEMS
400
 
397