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1 | /* |
1 | /* |
2 | * Copyright (C) 2001-2004 Jakub Jermar |
2 | * Copyright (C) 2001-2004 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | #ifndef __ia32_ASM_H__ |
29 | #ifndef __ia32_ASM_H__ |
30 | #define __ia32_ASM_H__ |
30 | #define __ia32_ASM_H__ |
31 | 31 | ||
32 | #include <cpu.h> |
- | |
33 | #include <arch/types.h> |
32 | #include <arch/types.h> |
34 | #include <typedefs.h> |
33 | #include <typedefs.h> |
35 | #include <mm/page.h> |
34 | #include <mm/page.h> |
36 | #include <synch/spinlock.h> |
35 | #include <synch/spinlock.h> |
37 | 36 | ||
38 | extern __u32 interrupt_handler_size; |
37 | extern __u32 interrupt_handler_size; |
39 | 38 | ||
40 | extern void paging_on(void); |
39 | extern void paging_on(void); |
41 | extern __address cpu_read_dba(void); |
40 | extern __address cpu_read_dba(void); |
42 | extern void cpu_write_dba(__address dba); |
41 | extern void cpu_write_dba(__address dba); |
43 | 42 | ||
44 | extern __address cpu_read_cr2(void); |
43 | extern __address cpu_read_cr2(void); |
45 | 44 | ||
46 | extern void interrupt_handlers(void); |
45 | extern void interrupt_handlers(void); |
47 | 46 | ||
48 | extern __u8 inb(int port); |
47 | extern __u8 inb(int port); |
49 | extern __u16 inw(int port); |
48 | extern __u16 inw(int port); |
50 | extern __u32 inl(int port); |
49 | extern __u32 inl(int port); |
51 | 50 | ||
52 | extern void outb(int port, __u8 b); |
51 | extern void outb(int port, __u8 b); |
53 | extern void outw(int port, __u16 w); |
52 | extern void outw(int port, __u16 w); |
54 | extern void outl(int port, __u32 l); |
53 | extern void outl(int port, __u32 l); |
55 | 54 | ||
56 | extern void enable_l_apic_in_msr(void); |
55 | extern void enable_l_apic_in_msr(void); |
57 | 56 | ||
58 | extern void halt_cpu(void); |
57 | extern void halt_cpu(void); |
59 | extern void cpu_sleep(void); |
58 | extern void cpu_sleep(void); |
60 | 59 | ||
61 | extern void write_dr0(__u32 v); |
60 | static inline void write_dr0(__u32 v); |
62 | extern inline __u32 read_dr0(void); |
61 | static inline __u32 read_dr0(void); |
- | 62 | ||
- | 63 | inline void write_dr0(__u32 v) { __asm__ volatile ("movl %0,%%dr0\n" : : "r" (v)); } |
|
- | 64 | inline __u32 read_dr0(void) { __u32 v; __asm__ volatile ("movl %%dr0,%0" : "=r" (v)); return v; } |
|
63 | 65 | ||
64 | #endif |
66 | #endif |
65 | 67 |