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1 | /* |
1 | /* |
2 | * Copyright (C) 2001-2004 Jakub Jermar |
2 | * Copyright (C) 2001-2004 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup genarch |
29 | /** @addtogroup genarch |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** |
32 | /** |
33 | * @file |
33 | * @file |
34 | * @brief Zilog 8530 serial port / keyboard driver. |
34 | * @brief Zilog 8530 serial port / keyboard driver. |
35 | */ |
35 | */ |
36 | 36 | ||
37 | #include <genarch/kbd/z8530.h> |
37 | #include <genarch/kbd/z8530.h> |
38 | #include <genarch/kbd/key.h> |
38 | #include <genarch/kbd/key.h> |
39 | #include <genarch/kbd/scanc.h> |
39 | #include <genarch/kbd/scanc.h> |
40 | #include <genarch/kbd/scanc_sun.h> |
40 | #include <genarch/kbd/scanc_sun.h> |
41 | #include <arch/drivers/z8530.h> |
41 | #include <arch/drivers/z8530.h> |
42 | #include <ddi/irq.h> |
42 | #include <ddi/irq.h> |
43 | #include <arch/interrupt.h> |
43 | #include <arch/interrupt.h> |
44 | #include <arch/drivers/kbd.h> |
44 | #include <arch/drivers/kbd.h> |
45 | #include <arch/drivers/fhc.h> |
45 | #include <arch/drivers/fhc.h> |
46 | #include <cpu.h> |
46 | #include <cpu.h> |
47 | #include <arch/asm.h> |
47 | #include <arch/asm.h> |
48 | #include <arch.h> |
48 | #include <arch.h> |
49 | #include <typedefs.h> |
49 | #include <typedefs.h> |
50 | #include <console/chardev.h> |
50 | #include <console/chardev.h> |
51 | #include <console/console.h> |
51 | #include <console/console.h> |
52 | #include <interrupt.h> |
52 | #include <interrupt.h> |
53 | #include <sysinfo/sysinfo.h> |
53 | #include <sysinfo/sysinfo.h> |
54 | #include <print.h> |
54 | #include <print.h> |
55 | 55 | ||
56 | /* |
56 | /* |
57 | * These codes read from z8530 data register are silently ignored. |
57 | * These codes read from z8530 data register are silently ignored. |
58 | */ |
58 | */ |
59 | #define IGNORE_CODE 0x7f /* all keys up */ |
59 | #define IGNORE_CODE 0x7f /* all keys up */ |
60 | 60 | ||
61 | bool z8530_belongs_to_kernel = true; |
61 | bool z8530_belongs_to_kernel = true; |
62 | 62 | ||
- | 63 | static z8530_t z8530; /**< z8530 device structure. */ |
|
- | 64 | static irq_t z8530_irq; /**< z8530's IRQ. */ |
|
- | 65 | ||
63 | static void z8530_suspend(chardev_t *); |
66 | static void z8530_suspend(chardev_t *); |
64 | static void z8530_resume(chardev_t *); |
67 | static void z8530_resume(chardev_t *); |
65 | 68 | ||
66 | static chardev_operations_t ops = { |
69 | static chardev_operations_t ops = { |
67 | .suspend = z8530_suspend, |
70 | .suspend = z8530_suspend, |
68 | .resume = z8530_resume, |
71 | .resume = z8530_resume, |
69 | .read = z8530_key_read |
72 | .read = z8530_key_read |
70 | }; |
73 | }; |
71 | 74 | ||
72 | void z8530_wait(void); |
75 | void z8530_wait(void); |
73 | 76 | ||
74 | /** Initialize keyboard and service interrupts using kernel routine */ |
77 | /** Initialize keyboard and service interrupts using kernel routine */ |
75 | void z8530_grab(void) |
78 | void z8530_grab(void) |
76 | { |
79 | { |
77 | z8530_belongs_to_kernel = true; |
80 | z8530_belongs_to_kernel = true; |
78 | } |
81 | } |
79 | 82 | ||
80 | /** Resume the former interrupt vector */ |
83 | /** Resume the former interrupt vector */ |
81 | void z8530_release(void) |
84 | void z8530_release(void) |
82 | { |
85 | { |
83 | z8530_belongs_to_kernel = false; |
86 | z8530_belongs_to_kernel = false; |
84 | } |
87 | } |
85 | 88 | ||
86 | /** Initialize z8530. */ |
89 | /** Initialize z8530. */ |
87 | void z8530_init(void) |
90 | void z8530_init(devno_t devno, inr_t inr, uintptr_t vaddr) |
88 | { |
91 | { |
89 | chardev_initialize("z8530_kbd", &kbrd, &ops); |
92 | chardev_initialize("z8530_kbd", &kbrd, &ops); |
90 | stdin = &kbrd; |
93 | stdin = &kbrd; |
91 | 94 | ||
- | 95 | z8530.devno = devno; |
|
- | 96 | z8530.reg = (uint8_t *) vaddr; |
|
- | 97 | ||
- | 98 | irq_initialize(&z8530_irq); |
|
- | 99 | z8530_irq.devno = devno; |
|
- | 100 | z8530_irq.inr = inr; |
|
- | 101 | z8530_irq.claim = z8530_claim; |
|
- | 102 | z8530_irq.handler = z8530_irq_handler; |
|
- | 103 | irq_register(&z8530_irq); |
|
- | 104 | ||
92 | sysinfo_set_item_val("kbd", NULL, true); |
105 | sysinfo_set_item_val("kbd", NULL, true); |
- | 106 | sysinfo_set_item_val("kbd.devno", NULL, devno); |
|
93 | sysinfo_set_item_val("kbd.irq", NULL, 0); |
107 | sysinfo_set_item_val("kbd.inr", NULL, inr); |
94 | sysinfo_set_item_val("kbd.address.virtual", NULL, (uintptr_t) kbd_virt_address); |
108 | sysinfo_set_item_val("kbd.address.virtual", NULL, vaddr); |
95 | 109 | ||
96 | (void) z8530_read_a(RR8); |
110 | (void) z8530_read_a(&z8530, RR8); |
97 | 111 | ||
98 | /* |
112 | /* |
99 | * Clear any pending TX interrupts or we never manage |
113 | * Clear any pending TX interrupts or we never manage |
100 | * to set FHC UART interrupt state to idle. |
114 | * to set FHC UART interrupt state to idle. |
101 | */ |
115 | */ |
102 | z8530_write_a(WR0, WR0_TX_IP_RST); |
116 | z8530_write_a(&z8530, WR0, WR0_TX_IP_RST); |
103 | 117 | ||
104 | z8530_write_a(WR1, WR1_IARCSC); /* interrupt on all characters */ |
118 | z8530_write_a(&z8530, WR1, WR1_IARCSC); /* interrupt on all characters */ |
105 | 119 | ||
106 | /* 8 bits per character and enable receiver */ |
120 | /* 8 bits per character and enable receiver */ |
107 | z8530_write_a(WR3, WR3_RX8BITSCH | WR3_RX_ENABLE); |
121 | z8530_write_a(&z8530, WR3, WR3_RX8BITSCH | WR3_RX_ENABLE); |
108 | 122 | ||
109 | z8530_write_a(WR9, WR9_MIE); /* Master Interrupt Enable. */ |
123 | z8530_write_a(&z8530, WR9, WR9_MIE); /* Master Interrupt Enable. */ |
110 | } |
124 | } |
111 | 125 | ||
112 | /** Process z8530 interrupt. |
126 | /** Process z8530 interrupt. |
113 | * |
127 | * |
114 | * @param n Interrupt vector. |
128 | * @param n Interrupt vector. |
115 | * @param istate Interrupted state. |
129 | * @param istate Interrupted state. |
116 | */ |
130 | */ |
117 | void z8530_interrupt(void) |
131 | void z8530_interrupt(void) |
118 | { |
132 | { |
119 | z8530_poll(); |
133 | z8530_poll(); |
120 | } |
134 | } |
121 | 135 | ||
122 | /** Wait until the controller reads its data. */ |
136 | /** Wait until the controller reads its data. */ |
123 | void z8530_wait(void) { |
137 | void z8530_wait(void) { |
124 | } |
138 | } |
125 | 139 | ||
126 | /* Called from getc(). */ |
140 | /* Called from getc(). */ |
127 | void z8530_resume(chardev_t *d) |
141 | void z8530_resume(chardev_t *d) |
128 | { |
142 | { |
129 | } |
143 | } |
130 | 144 | ||
131 | /* Called from getc(). */ |
145 | /* Called from getc(). */ |
132 | void z8530_suspend(chardev_t *d) |
146 | void z8530_suspend(chardev_t *d) |
133 | { |
147 | { |
134 | } |
148 | } |
135 | 149 | ||
136 | char z8530_key_read(chardev_t *d) |
150 | char z8530_key_read(chardev_t *d) |
137 | { |
151 | { |
138 | char ch; |
152 | char ch; |
139 | 153 | ||
140 | while(!(ch = active_read_buff_read())) { |
154 | while(!(ch = active_read_buff_read())) { |
141 | uint8_t x; |
155 | uint8_t x; |
142 | while (!(z8530_read_a(RR0) & RR0_RCA)) |
156 | while (!(z8530_read_a(&z8530, RR0) & RR0_RCA)) |
143 | ; |
157 | ; |
144 | x = z8530_read_a(RR8); |
158 | x = z8530_read_a(&z8530, RR8); |
145 | if (x != IGNORE_CODE) { |
159 | if (x != IGNORE_CODE) { |
146 | if (x & KEY_RELEASE) |
160 | if (x & KEY_RELEASE) |
147 | key_released(x ^ KEY_RELEASE); |
161 | key_released(x ^ KEY_RELEASE); |
148 | else |
162 | else |
149 | active_read_key_pressed(x); |
163 | active_read_key_pressed(x); |
150 | } |
164 | } |
151 | } |
165 | } |
152 | return ch; |
166 | return ch; |
153 | } |
167 | } |
154 | 168 | ||
155 | /** Poll for key press and release events. |
169 | /** Poll for key press and release events. |
156 | * |
170 | * |
157 | * This function can be used to implement keyboard polling. |
171 | * This function can be used to implement keyboard polling. |
158 | */ |
172 | */ |
159 | void z8530_poll(void) |
173 | void z8530_poll(void) |
160 | { |
174 | { |
161 | uint8_t x; |
175 | uint8_t x; |
162 | 176 | ||
163 | while (z8530_read_a(RR0) & RR0_RCA) { |
177 | while (z8530_read_a(&z8530, RR0) & RR0_RCA) { |
164 | x = z8530_read_a(RR8); |
178 | x = z8530_read_a(&z8530, RR8); |
165 | if (x != IGNORE_CODE) { |
179 | if (x != IGNORE_CODE) { |
166 | if (x & KEY_RELEASE) |
180 | if (x & KEY_RELEASE) |
167 | key_released(x ^ KEY_RELEASE); |
181 | key_released(x ^ KEY_RELEASE); |
168 | else |
182 | else |
169 | key_pressed(x); |
183 | key_pressed(x); |
170 | } |
184 | } |
171 | } |
185 | } |
172 | } |
186 | } |
173 | 187 | ||
174 | irq_ownership_t z8530_claim(void) |
188 | irq_ownership_t z8530_claim(void) |
175 | { |
189 | { |
176 | return (z8530_read_a(RR0) & RR0_RCA); |
190 | return (z8530_read_a(&z8530, RR0) & RR0_RCA); |
177 | } |
191 | } |
178 | 192 | ||
179 | void z8530_irq_handler(irq_t *irq, void *arg, ...) |
193 | void z8530_irq_handler(irq_t *irq, void *arg, ...) |
180 | { |
194 | { |
181 | /* |
195 | /* |
182 | * So far, we know we got this interrupt through the FHC. |
196 | * So far, we know we got this interrupt through the FHC. |
183 | * Since we don't have enough information about the FHC and |
197 | * Since we don't have enough information about the FHC and |
184 | * because the interrupt looks like level sensitive, |
198 | * because the interrupt looks like level sensitive, |
185 | * we cannot handle it by scheduling one of the level |
199 | * we cannot handle it by scheduling one of the level |
186 | * interrupt traps. Process the interrupt directly. |
200 | * interrupt traps. Process the interrupt directly. |
187 | */ |
201 | */ |
188 | if (z8530_belongs_to_kernel) |
202 | if (z8530_belongs_to_kernel) |
189 | z8530_interrupt(); |
203 | z8530_interrupt(); |
190 | else |
204 | else |
191 | ipc_irq_send_notif(0); |
205 | ipc_irq_send_notif(0); |
192 | fhc_clear_interrupt(central_fhc, irq->inr); |
206 | fhc_clear_interrupt(central_fhc, irq->inr); |
193 | } |
207 | } |
194 | 208 | ||
195 | /** @} |
209 | /** @} |
196 | */ |
210 | */ |
197 | 211 |