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1 | /* |
1 | /* |
2 | * Copyright (C) 2005 Jakub Jermar |
2 | * Copyright (C) 2005 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | #include <arch/types.h> |
29 | #include <arch/types.h> |
30 | #include <typedefs.h> |
30 | #include <typedefs.h> |
31 | #include <genarch/acpi/acpi.h> |
31 | #include <genarch/acpi/acpi.h> |
32 | #include <genarch/acpi/madt.h> |
32 | #include <genarch/acpi/madt.h> |
33 | #include <arch/smp/apic.h> |
33 | #include <arch/smp/apic.h> |
34 | #include <arch/smp/smp.h> |
34 | #include <arch/smp/smp.h> |
35 | #include <panic.h> |
35 | #include <panic.h> |
36 | #include <debug.h> |
36 | #include <debug.h> |
37 | #include <config.h> |
37 | #include <config.h> |
38 | #include <print.h> |
38 | #include <print.h> |
39 | #include <mm/heap.h> |
39 | #include <mm/heap.h> |
40 | #include <memstr.h> |
40 | #include <memstr.h> |
41 | #include <sort.h> |
41 | #include <sort.h> |
42 | 42 | ||
43 | struct acpi_madt *acpi_madt = NULL; |
43 | struct acpi_madt *acpi_madt = NULL; |
44 | 44 | ||
45 | #ifdef CONFIG_SMP |
45 | #ifdef CONFIG_SMP |
46 | 46 | ||
- | 47 | /** Standard ISA IRQ map; can be overriden by Interrupt Source Override entries of MADT. */ |
|
- | 48 | int isa_irq_map[] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }; |
|
- | 49 | ||
47 | static void madt_l_apic_entry(struct madt_l_apic *la, __u32 index); |
50 | static void madt_l_apic_entry(struct madt_l_apic *la, __u32 index); |
48 | static void madt_io_apic_entry(struct madt_io_apic *ioa, __u32 index); |
51 | static void madt_io_apic_entry(struct madt_io_apic *ioa, __u32 index); |
- | 52 | static void madt_intr_src_ovrd_entry(struct madt_intr_src_ovrd *override, __u32 index); |
|
49 | static int madt_cmp(void * a, void * b); |
53 | static int madt_cmp(void * a, void * b); |
50 | 54 | ||
51 | struct madt_l_apic *madt_l_apic_entries = NULL; |
55 | struct madt_l_apic *madt_l_apic_entries = NULL; |
52 | struct madt_io_apic *madt_io_apic_entries = NULL; |
56 | struct madt_io_apic *madt_io_apic_entries = NULL; |
53 | 57 | ||
54 | index_t madt_l_apic_entry_index = 0; |
58 | index_t madt_l_apic_entry_index = 0; |
55 | index_t madt_io_apic_entry_index = 0; |
59 | index_t madt_io_apic_entry_index = 0; |
56 | count_t madt_l_apic_entry_cnt = 0; |
60 | count_t madt_l_apic_entry_cnt = 0; |
57 | count_t madt_io_apic_entry_cnt = 0; |
61 | count_t madt_io_apic_entry_cnt = 0; |
58 | count_t cpu_count = 0; |
62 | count_t cpu_count = 0; |
59 | 63 | ||
60 | struct madt_apic_header * * madt_entries_index = NULL; |
64 | struct madt_apic_header * * madt_entries_index = NULL; |
61 | int madt_entries_index_cnt = 0; |
65 | int madt_entries_index_cnt = 0; |
62 | 66 | ||
63 | char *entry[] = { |
67 | char *entry[] = { |
64 | "L_APIC", |
68 | "L_APIC", |
65 | "IO_APIC", |
69 | "IO_APIC", |
66 | "INTR_SRC_OVRD", |
70 | "INTR_SRC_OVRD", |
67 | "NMI_SRC", |
71 | "NMI_SRC", |
68 | "L_APIC_NMI", |
72 | "L_APIC_NMI", |
69 | "L_APIC_ADDR_OVRD", |
73 | "L_APIC_ADDR_OVRD", |
70 | "IO_SAPIC", |
74 | "IO_SAPIC", |
71 | "L_SAPIC", |
75 | "L_SAPIC", |
72 | "PLATFORM_INTR_SRC" |
76 | "PLATFORM_INTR_SRC" |
73 | }; |
77 | }; |
74 | 78 | ||
75 | /* |
79 | /* |
76 | * ACPI MADT Implementation of SMP configuration interface. |
80 | * ACPI MADT Implementation of SMP configuration interface. |
77 | */ |
81 | */ |
78 | static count_t madt_cpu_count(void); |
82 | static count_t madt_cpu_count(void); |
79 | static bool madt_cpu_enabled(index_t i); |
83 | static bool madt_cpu_enabled(index_t i); |
80 | static bool madt_cpu_bootstrap(index_t i); |
84 | static bool madt_cpu_bootstrap(index_t i); |
81 | static __u8 madt_cpu_apic_id(index_t i); |
85 | static __u8 madt_cpu_apic_id(index_t i); |
- | 86 | static int madt_irq_to_pin(int irq); |
|
82 | 87 | ||
83 | struct smp_config_operations madt_config_operations = { |
88 | struct smp_config_operations madt_config_operations = { |
84 | .cpu_count = madt_cpu_count, |
89 | .cpu_count = madt_cpu_count, |
85 | .cpu_enabled = madt_cpu_enabled, |
90 | .cpu_enabled = madt_cpu_enabled, |
86 | .cpu_bootstrap = madt_cpu_bootstrap, |
91 | .cpu_bootstrap = madt_cpu_bootstrap, |
87 | .cpu_apic_id = madt_cpu_apic_id |
92 | .cpu_apic_id = madt_cpu_apic_id, |
- | 93 | .irq_to_pin = madt_irq_to_pin |
|
88 | }; |
94 | }; |
89 | 95 | ||
90 | static count_t madt_cpu_count(void) |
96 | count_t madt_cpu_count(void) |
91 | { |
97 | { |
92 | return madt_l_apic_entry_cnt; |
98 | return madt_l_apic_entry_cnt; |
93 | } |
99 | } |
94 | 100 | ||
95 | static bool madt_cpu_enabled(index_t i) |
101 | bool madt_cpu_enabled(index_t i) |
96 | { |
102 | { |
97 | ASSERT(i < madt_l_apic_entry_cnt); |
103 | ASSERT(i < madt_l_apic_entry_cnt); |
98 | return ((struct madt_l_apic *) madt_entries_index[madt_l_apic_entry_index + i])->flags & 0x1; |
104 | return ((struct madt_l_apic *) madt_entries_index[madt_l_apic_entry_index + i])->flags & 0x1; |
99 | 105 | ||
100 | } |
106 | } |
101 | 107 | ||
102 | static bool madt_cpu_bootstrap(index_t i) |
108 | bool madt_cpu_bootstrap(index_t i) |
103 | { |
109 | { |
104 | ASSERT(i < madt_l_apic_entry_cnt); |
110 | ASSERT(i < madt_l_apic_entry_cnt); |
105 | return ((struct madt_l_apic *) madt_entries_index[madt_l_apic_entry_index + i])->apic_id == l_apic_id(); |
111 | return ((struct madt_l_apic *) madt_entries_index[madt_l_apic_entry_index + i])->apic_id == l_apic_id(); |
106 | } |
112 | } |
107 | 113 | ||
108 | static __u8 madt_cpu_apic_id(index_t i) |
114 | __u8 madt_cpu_apic_id(index_t i) |
109 | { |
115 | { |
110 | ASSERT(i < madt_l_apic_entry_cnt); |
116 | ASSERT(i < madt_l_apic_entry_cnt); |
111 | return ((struct madt_l_apic *) madt_entries_index[madt_l_apic_entry_index + i])->apic_id; |
117 | return ((struct madt_l_apic *) madt_entries_index[madt_l_apic_entry_index + i])->apic_id; |
112 | } |
118 | } |
113 | 119 | ||
- | 120 | int madt_irq_to_pin(int irq) |
|
- | 121 | { |
|
- | 122 | ASSERT(irq < sizeof(isa_irq_map)/sizeof(int)); |
|
- | 123 | return isa_irq_map[irq]; |
|
- | 124 | } |
|
- | 125 | ||
114 | int madt_cmp(void * a, void * b) |
126 | int madt_cmp(void * a, void * b) |
115 | { |
127 | { |
116 | return |
128 | return |
117 | (((struct madt_apic_header *) a)->type > ((struct madt_apic_header *) b)->type) ? |
129 | (((struct madt_apic_header *) a)->type > ((struct madt_apic_header *) b)->type) ? |
118 | 1 : |
130 | 1 : |
119 | ((((struct madt_apic_header *) a)->type < ((struct madt_apic_header *) b)->type) ? -1 : 0); |
131 | ((((struct madt_apic_header *) a)->type < ((struct madt_apic_header *) b)->type) ? -1 : 0); |
120 | } |
132 | } |
121 | 133 | ||
122 | void acpi_madt_parse(void) |
134 | void acpi_madt_parse(void) |
123 | { |
135 | { |
124 | struct madt_apic_header *end = (struct madt_apic_header *) (((__u8 *) acpi_madt) + acpi_madt->header.length); |
136 | struct madt_apic_header *end = (struct madt_apic_header *) (((__u8 *) acpi_madt) + acpi_madt->header.length); |
125 | struct madt_apic_header *h; |
137 | struct madt_apic_header *h; |
126 | 138 | ||
127 | l_apic = (__u32 *) (__native) acpi_madt->l_apic_address; |
139 | l_apic = (__u32 *) (__native) acpi_madt->l_apic_address; |
128 | 140 | ||
129 | /* calculate madt entries */ |
141 | /* calculate madt entries */ |
130 | for (h = &acpi_madt->apic_header[0]; h < end; h = (struct madt_apic_header *) (((__u8 *) h) + h->length)) { |
142 | for (h = &acpi_madt->apic_header[0]; h < end; h = (struct madt_apic_header *) (((__u8 *) h) + h->length)) { |
131 | madt_entries_index_cnt++; |
143 | madt_entries_index_cnt++; |
132 | } |
144 | } |
133 | 145 | ||
134 | /* create madt apic entries index array */ |
146 | /* create madt apic entries index array */ |
135 | madt_entries_index = (struct madt_apic_header * *) malloc(madt_entries_index_cnt * sizeof(struct madt_apic_header * *)); |
147 | madt_entries_index = (struct madt_apic_header * *) malloc(madt_entries_index_cnt * sizeof(struct madt_apic_header * *)); |
136 | 148 | ||
137 | __u32 index = 0; |
149 | __u32 index = 0; |
138 | 150 | ||
139 | for (h = &acpi_madt->apic_header[0]; h < end; h = (struct madt_apic_header *) (((__u8 *) h) + h->length)) { |
151 | for (h = &acpi_madt->apic_header[0]; h < end; h = (struct madt_apic_header *) (((__u8 *) h) + h->length)) { |
140 | madt_entries_index[index++] = h; |
152 | madt_entries_index[index++] = h; |
141 | } |
153 | } |
142 | 154 | ||
143 | /* Quicksort MADT index structure */ |
155 | /* Quicksort MADT index structure */ |
144 | qsort(madt_entries_index, madt_entries_index_cnt, sizeof(__address), &madt_cmp); |
156 | qsort(madt_entries_index, madt_entries_index_cnt, sizeof(__address), &madt_cmp); |
145 | 157 | ||
146 | /* Parse MADT entries */ |
158 | /* Parse MADT entries */ |
147 | for (index = 0; index < madt_entries_index_cnt - 1; index++) { |
159 | for (index = 0; index < madt_entries_index_cnt - 1; index++) { |
148 | h = madt_entries_index[index]; |
160 | h = madt_entries_index[index]; |
149 | switch (h->type) { |
161 | switch (h->type) { |
150 | case MADT_L_APIC: |
162 | case MADT_L_APIC: |
151 | madt_l_apic_entry((struct madt_l_apic *) h, index); |
163 | madt_l_apic_entry((struct madt_l_apic *) h, index); |
152 | break; |
164 | break; |
153 | case MADT_IO_APIC: |
165 | case MADT_IO_APIC: |
154 | madt_io_apic_entry((struct madt_io_apic *) h, index); |
166 | madt_io_apic_entry((struct madt_io_apic *) h, index); |
155 | break; |
167 | break; |
156 | case MADT_INTR_SRC_OVRD: |
168 | case MADT_INTR_SRC_OVRD: |
- | 169 | madt_intr_src_ovrd_entry((struct madt_intr_src_ovrd *) h, index); |
|
- | 170 | break; |
|
157 | case MADT_NMI_SRC: |
171 | case MADT_NMI_SRC: |
158 | case MADT_L_APIC_NMI: |
172 | case MADT_L_APIC_NMI: |
159 | case MADT_L_APIC_ADDR_OVRD: |
173 | case MADT_L_APIC_ADDR_OVRD: |
160 | case MADT_IO_SAPIC: |
174 | case MADT_IO_SAPIC: |
161 | case MADT_L_SAPIC: |
175 | case MADT_L_SAPIC: |
162 | case MADT_PLATFORM_INTR_SRC: |
176 | case MADT_PLATFORM_INTR_SRC: |
163 | printf("MADT: skipping %s entry (type=%d)\n", entry[h->type], h->type); |
177 | printf("MADT: skipping %s entry (type=%d)\n", entry[h->type], h->type); |
164 | break; |
178 | break; |
165 | 179 | ||
166 | default: |
180 | default: |
167 | if (h->type >= MADT_RESERVED_SKIP_BEGIN && h->type <= MADT_RESERVED_SKIP_END) { |
181 | if (h->type >= MADT_RESERVED_SKIP_BEGIN && h->type <= MADT_RESERVED_SKIP_END) { |
168 | printf("MADT: skipping reserved entry (type=%d)\n", h->type); |
182 | printf("MADT: skipping reserved entry (type=%d)\n", h->type); |
169 | } |
183 | } |
170 | if (h->type >= MADT_RESERVED_OEM_BEGIN) { |
184 | if (h->type >= MADT_RESERVED_OEM_BEGIN) { |
171 | printf("MADT: skipping OEM entry (type=%d)\n", h->type); |
185 | printf("MADT: skipping OEM entry (type=%d)\n", h->type); |
172 | } |
186 | } |
173 | break; |
187 | break; |
174 | } |
188 | } |
175 | 189 | ||
176 | 190 | ||
177 | } |
191 | } |
178 | 192 | ||
179 | 193 | ||
180 | if (cpu_count) |
194 | if (cpu_count) |
181 | config.cpu_count = cpu_count; |
195 | config.cpu_count = cpu_count; |
182 | } |
196 | } |
183 | 197 | ||
184 | 198 | ||
185 | void madt_l_apic_entry(struct madt_l_apic *la, __u32 index) |
199 | void madt_l_apic_entry(struct madt_l_apic *la, __u32 index) |
186 | { |
200 | { |
187 | if (!madt_l_apic_entry_cnt++) { |
201 | if (!madt_l_apic_entry_cnt++) { |
188 | madt_l_apic_entry_index = index; |
202 | madt_l_apic_entry_index = index; |
189 | } |
203 | } |
190 | 204 | ||
191 | if (!(la->flags & 0x1)) { |
205 | if (!(la->flags & 0x1)) { |
192 | /* Processor is unusable, skip it. */ |
206 | /* Processor is unusable, skip it. */ |
193 | return; |
207 | return; |
194 | } |
208 | } |
195 | 209 | ||
196 | cpu_count++; |
210 | cpu_count++; |
197 | apic_id_mask |= 1<<la->apic_id; |
211 | apic_id_mask |= 1<<la->apic_id; |
198 | } |
212 | } |
199 | 213 | ||
200 | void madt_io_apic_entry(struct madt_io_apic *ioa, __u32 index) |
214 | void madt_io_apic_entry(struct madt_io_apic *ioa, __u32 index) |
201 | { |
215 | { |
202 | if (!madt_io_apic_entry_cnt++) { |
216 | if (!madt_io_apic_entry_cnt++) { |
203 | /* remember index of the first io apic entry */ |
217 | /* remember index of the first io apic entry */ |
204 | madt_io_apic_entry_index = index; |
218 | madt_io_apic_entry_index = index; |
205 | io_apic = (__u32 *) (__native) ioa->io_apic_address; |
219 | io_apic = (__u32 *) (__native) ioa->io_apic_address; |
206 | } else { |
220 | } else { |
207 | /* currently not supported */ |
221 | /* currently not supported */ |
208 | return; |
222 | return; |
209 | } |
223 | } |
210 | } |
224 | } |
211 | 225 | ||
- | 226 | void madt_intr_src_ovrd_entry(struct madt_intr_src_ovrd *override, __u32 index) |
|
- | 227 | { |
|
- | 228 | ASSERT(override->source < sizeof(isa_irq_map)/sizeof(int)); |
|
- | 229 | printf("Remapping irq%d to IO APIC pin%d\n", override->source, override->global_intr); |
|
- | 230 | isa_irq_map[override->source] = override->global_intr; |
|
- | 231 | ||
- | 232 | } |
|
212 | 233 | ||
213 | #endif /* CONFIG_SMP */ |
234 | #endif /* CONFIG_SMP */ |
214 | 235 |