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1 | /* |
1 | /* |
2 | * Copyright (C) 2005 Jakub Jermar |
2 | * Copyright (C) 2005 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup sparc64interrupt |
29 | /** @addtogroup sparc64interrupt |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** |
32 | /** |
33 | * @file |
33 | * @file |
34 | * @brief This file contains register window trap handlers. |
34 | * @brief This file contains register window trap handlers. |
35 | */ |
35 | */ |
36 | 36 | ||
37 | #ifndef __sparc64_REGWIN_H__ |
37 | #ifndef __sparc64_REGWIN_H__ |
38 | #define __sparc64_REGWIN_H__ |
38 | #define __sparc64_REGWIN_H__ |
39 | 39 | ||
40 | #include <arch/stack.h> |
40 | #include <arch/stack.h> |
41 | #include <arch/arch.h> |
41 | #include <arch/arch.h> |
42 | 42 | ||
43 | #define TT_CLEAN_WINDOW 0x24 |
43 | #define TT_CLEAN_WINDOW 0x24 |
44 | #define TT_SPILL_0_NORMAL 0x80 |
44 | #define TT_SPILL_0_NORMAL 0x80 |
45 | #define TT_FILL_0_NORMAL 0xc0 |
45 | #define TT_FILL_0_NORMAL 0xc0 |
46 | 46 | ||
47 | #define REGWIN_HANDLER_SIZE 128 |
47 | #define REGWIN_HANDLER_SIZE 128 |
48 | 48 | ||
49 | #define CLEAN_WINDOW_HANDLER_SIZE REGWIN_HANDLER_SIZE |
49 | #define CLEAN_WINDOW_HANDLER_SIZE REGWIN_HANDLER_SIZE |
50 | #define SPILL_HANDLER_SIZE REGWIN_HANDLER_SIZE |
50 | #define SPILL_HANDLER_SIZE REGWIN_HANDLER_SIZE |
51 | #define FILL_HANDLER_SIZE REGWIN_HANDLER_SIZE |
51 | #define FILL_HANDLER_SIZE REGWIN_HANDLER_SIZE |
52 | 52 | ||
53 | #define NWINDOW 8 |
- | |
54 | - | ||
55 | /* Window Save Area offsets. */ |
53 | /* Window Save Area offsets. */ |
56 | #define L0_OFFSET 0 |
54 | #define L0_OFFSET 0 |
57 | #define L1_OFFSET 8 |
55 | #define L1_OFFSET 8 |
58 | #define L2_OFFSET 16 |
56 | #define L2_OFFSET 16 |
59 | #define L3_OFFSET 24 |
57 | #define L3_OFFSET 24 |
60 | #define L4_OFFSET 32 |
58 | #define L4_OFFSET 32 |
61 | #define L5_OFFSET 40 |
59 | #define L5_OFFSET 40 |
62 | #define L6_OFFSET 48 |
60 | #define L6_OFFSET 48 |
63 | #define L7_OFFSET 56 |
61 | #define L7_OFFSET 56 |
64 | #define I0_OFFSET 64 |
62 | #define I0_OFFSET 64 |
65 | #define I1_OFFSET 72 |
63 | #define I1_OFFSET 72 |
66 | #define I2_OFFSET 80 |
64 | #define I2_OFFSET 80 |
67 | #define I3_OFFSET 88 |
65 | #define I3_OFFSET 88 |
68 | #define I4_OFFSET 96 |
66 | #define I4_OFFSET 96 |
69 | #define I5_OFFSET 104 |
67 | #define I5_OFFSET 104 |
70 | #define I6_OFFSET 112 |
68 | #define I6_OFFSET 112 |
71 | #define I7_OFFSET 120 |
69 | #define I7_OFFSET 120 |
72 | 70 | ||
73 | #ifdef __ASM__ |
71 | #ifdef __ASM__ |
74 | 72 | ||
75 | /* |
73 | /* |
76 | * Macro used by the nucleus and the primary context 0 during normal and other spills. |
74 | * Macro used by the nucleus and the primary context 0 during normal and other spills. |
77 | */ |
75 | */ |
78 | .macro SPILL_NORMAL_HANDLER_KERNEL |
76 | .macro SPILL_NORMAL_HANDLER_KERNEL |
79 | stx %l0, [%sp + STACK_BIAS + L0_OFFSET] |
77 | stx %l0, [%sp + STACK_BIAS + L0_OFFSET] |
80 | stx %l1, [%sp + STACK_BIAS + L1_OFFSET] |
78 | stx %l1, [%sp + STACK_BIAS + L1_OFFSET] |
81 | stx %l2, [%sp + STACK_BIAS + L2_OFFSET] |
79 | stx %l2, [%sp + STACK_BIAS + L2_OFFSET] |
82 | stx %l3, [%sp + STACK_BIAS + L3_OFFSET] |
80 | stx %l3, [%sp + STACK_BIAS + L3_OFFSET] |
83 | stx %l4, [%sp + STACK_BIAS + L4_OFFSET] |
81 | stx %l4, [%sp + STACK_BIAS + L4_OFFSET] |
84 | stx %l5, [%sp + STACK_BIAS + L5_OFFSET] |
82 | stx %l5, [%sp + STACK_BIAS + L5_OFFSET] |
85 | stx %l6, [%sp + STACK_BIAS + L6_OFFSET] |
83 | stx %l6, [%sp + STACK_BIAS + L6_OFFSET] |
86 | stx %l7, [%sp + STACK_BIAS + L7_OFFSET] |
84 | stx %l7, [%sp + STACK_BIAS + L7_OFFSET] |
87 | stx %i0, [%sp + STACK_BIAS + I0_OFFSET] |
85 | stx %i0, [%sp + STACK_BIAS + I0_OFFSET] |
88 | stx %i1, [%sp + STACK_BIAS + I1_OFFSET] |
86 | stx %i1, [%sp + STACK_BIAS + I1_OFFSET] |
89 | stx %i2, [%sp + STACK_BIAS + I2_OFFSET] |
87 | stx %i2, [%sp + STACK_BIAS + I2_OFFSET] |
90 | stx %i3, [%sp + STACK_BIAS + I3_OFFSET] |
88 | stx %i3, [%sp + STACK_BIAS + I3_OFFSET] |
91 | stx %i4, [%sp + STACK_BIAS + I4_OFFSET] |
89 | stx %i4, [%sp + STACK_BIAS + I4_OFFSET] |
92 | stx %i5, [%sp + STACK_BIAS + I5_OFFSET] |
90 | stx %i5, [%sp + STACK_BIAS + I5_OFFSET] |
93 | stx %i6, [%sp + STACK_BIAS + I6_OFFSET] |
91 | stx %i6, [%sp + STACK_BIAS + I6_OFFSET] |
94 | stx %i7, [%sp + STACK_BIAS + I7_OFFSET] |
92 | stx %i7, [%sp + STACK_BIAS + I7_OFFSET] |
95 | saved |
93 | saved |
96 | retry |
94 | retry |
97 | .endm |
95 | .endm |
98 | 96 | ||
99 | /* |
97 | /* |
100 | * Macro used by the userspace during normal spills. |
98 | * Macro used by the userspace during normal spills. |
101 | */ |
99 | */ |
102 | .macro SPILL_NORMAL_HANDLER_USERSPACE |
100 | .macro SPILL_NORMAL_HANDLER_USERSPACE |
103 | wr ASI_AIUP, %asi |
101 | wr ASI_AIUP, %asi |
104 | stxa %l0, [%sp + STACK_BIAS + L0_OFFSET] %asi |
102 | stxa %l0, [%sp + STACK_BIAS + L0_OFFSET] %asi |
105 | stxa %l1, [%sp + STACK_BIAS + L1_OFFSET] %asi |
103 | stxa %l1, [%sp + STACK_BIAS + L1_OFFSET] %asi |
106 | stxa %l2, [%sp + STACK_BIAS + L2_OFFSET] %asi |
104 | stxa %l2, [%sp + STACK_BIAS + L2_OFFSET] %asi |
107 | stxa %l3, [%sp + STACK_BIAS + L3_OFFSET] %asi |
105 | stxa %l3, [%sp + STACK_BIAS + L3_OFFSET] %asi |
108 | stxa %l4, [%sp + STACK_BIAS + L4_OFFSET] %asi |
106 | stxa %l4, [%sp + STACK_BIAS + L4_OFFSET] %asi |
109 | stxa %l5, [%sp + STACK_BIAS + L5_OFFSET] %asi |
107 | stxa %l5, [%sp + STACK_BIAS + L5_OFFSET] %asi |
110 | stxa %l6, [%sp + STACK_BIAS + L6_OFFSET] %asi |
108 | stxa %l6, [%sp + STACK_BIAS + L6_OFFSET] %asi |
111 | stxa %l7, [%sp + STACK_BIAS + L7_OFFSET] %asi |
109 | stxa %l7, [%sp + STACK_BIAS + L7_OFFSET] %asi |
112 | stxa %i0, [%sp + STACK_BIAS + I0_OFFSET] %asi |
110 | stxa %i0, [%sp + STACK_BIAS + I0_OFFSET] %asi |
113 | stxa %i1, [%sp + STACK_BIAS + I1_OFFSET] %asi |
111 | stxa %i1, [%sp + STACK_BIAS + I1_OFFSET] %asi |
114 | stxa %i2, [%sp + STACK_BIAS + I2_OFFSET] %asi |
112 | stxa %i2, [%sp + STACK_BIAS + I2_OFFSET] %asi |
115 | stxa %i3, [%sp + STACK_BIAS + I3_OFFSET] %asi |
113 | stxa %i3, [%sp + STACK_BIAS + I3_OFFSET] %asi |
116 | stxa %i4, [%sp + STACK_BIAS + I4_OFFSET] %asi |
114 | stxa %i4, [%sp + STACK_BIAS + I4_OFFSET] %asi |
117 | stxa %i5, [%sp + STACK_BIAS + I5_OFFSET] %asi |
115 | stxa %i5, [%sp + STACK_BIAS + I5_OFFSET] %asi |
118 | stxa %i6, [%sp + STACK_BIAS + I6_OFFSET] %asi |
116 | stxa %i6, [%sp + STACK_BIAS + I6_OFFSET] %asi |
119 | stxa %i7, [%sp + STACK_BIAS + I7_OFFSET] %asi |
117 | stxa %i7, [%sp + STACK_BIAS + I7_OFFSET] %asi |
120 | saved |
118 | saved |
121 | retry |
119 | retry |
122 | .endm |
120 | .endm |
123 | 121 | ||
124 | /* |
122 | /* |
125 | * Macro used by the userspace during other spills. |
123 | * Macro used by the userspace during other spills. |
126 | */ |
124 | */ |
127 | .macro SPILL_OTHER_HANDLER_USERSPACE |
125 | .macro SPILL_OTHER_HANDLER_USERSPACE |
128 | wr ASI_AIUS, %asi |
126 | wr ASI_AIUS, %asi |
129 | stxa %l0, [%sp + STACK_BIAS + L0_OFFSET] %asi |
127 | stxa %l0, [%sp + STACK_BIAS + L0_OFFSET] %asi |
130 | stxa %l1, [%sp + STACK_BIAS + L1_OFFSET] %asi |
128 | stxa %l1, [%sp + STACK_BIAS + L1_OFFSET] %asi |
131 | stxa %l2, [%sp + STACK_BIAS + L2_OFFSET] %asi |
129 | stxa %l2, [%sp + STACK_BIAS + L2_OFFSET] %asi |
132 | stxa %l3, [%sp + STACK_BIAS + L3_OFFSET] %asi |
130 | stxa %l3, [%sp + STACK_BIAS + L3_OFFSET] %asi |
133 | stxa %l4, [%sp + STACK_BIAS + L4_OFFSET] %asi |
131 | stxa %l4, [%sp + STACK_BIAS + L4_OFFSET] %asi |
134 | stxa %l5, [%sp + STACK_BIAS + L5_OFFSET] %asi |
132 | stxa %l5, [%sp + STACK_BIAS + L5_OFFSET] %asi |
135 | stxa %l6, [%sp + STACK_BIAS + L6_OFFSET] %asi |
133 | stxa %l6, [%sp + STACK_BIAS + L6_OFFSET] %asi |
136 | stxa %l7, [%sp + STACK_BIAS + L7_OFFSET] %asi |
134 | stxa %l7, [%sp + STACK_BIAS + L7_OFFSET] %asi |
137 | stxa %i0, [%sp + STACK_BIAS + I0_OFFSET] %asi |
135 | stxa %i0, [%sp + STACK_BIAS + I0_OFFSET] %asi |
138 | stxa %i1, [%sp + STACK_BIAS + I1_OFFSET] %asi |
136 | stxa %i1, [%sp + STACK_BIAS + I1_OFFSET] %asi |
139 | stxa %i2, [%sp + STACK_BIAS + I2_OFFSET] %asi |
137 | stxa %i2, [%sp + STACK_BIAS + I2_OFFSET] %asi |
140 | stxa %i3, [%sp + STACK_BIAS + I3_OFFSET] %asi |
138 | stxa %i3, [%sp + STACK_BIAS + I3_OFFSET] %asi |
141 | stxa %i4, [%sp + STACK_BIAS + I4_OFFSET] %asi |
139 | stxa %i4, [%sp + STACK_BIAS + I4_OFFSET] %asi |
142 | stxa %i5, [%sp + STACK_BIAS + I5_OFFSET] %asi |
140 | stxa %i5, [%sp + STACK_BIAS + I5_OFFSET] %asi |
143 | stxa %i6, [%sp + STACK_BIAS + I6_OFFSET] %asi |
141 | stxa %i6, [%sp + STACK_BIAS + I6_OFFSET] %asi |
144 | stxa %i7, [%sp + STACK_BIAS + I7_OFFSET] %asi |
142 | stxa %i7, [%sp + STACK_BIAS + I7_OFFSET] %asi |
145 | saved |
143 | saved |
146 | retry |
144 | retry |
147 | .endm |
145 | .endm |
148 | 146 | ||
149 | 147 | ||
150 | /* |
148 | /* |
151 | * Macro used by the nucleus and the primary context 0 during normal fills. |
149 | * Macro used by the nucleus and the primary context 0 during normal fills. |
152 | */ |
150 | */ |
153 | .macro FILL_NORMAL_HANDLER_KERNEL |
151 | .macro FILL_NORMAL_HANDLER_KERNEL |
154 | ldx [%sp + STACK_BIAS + L0_OFFSET], %l0 |
152 | ldx [%sp + STACK_BIAS + L0_OFFSET], %l0 |
155 | ldx [%sp + STACK_BIAS + L1_OFFSET], %l1 |
153 | ldx [%sp + STACK_BIAS + L1_OFFSET], %l1 |
156 | ldx [%sp + STACK_BIAS + L2_OFFSET], %l2 |
154 | ldx [%sp + STACK_BIAS + L2_OFFSET], %l2 |
157 | ldx [%sp + STACK_BIAS + L3_OFFSET], %l3 |
155 | ldx [%sp + STACK_BIAS + L3_OFFSET], %l3 |
158 | ldx [%sp + STACK_BIAS + L4_OFFSET], %l4 |
156 | ldx [%sp + STACK_BIAS + L4_OFFSET], %l4 |
159 | ldx [%sp + STACK_BIAS + L5_OFFSET], %l5 |
157 | ldx [%sp + STACK_BIAS + L5_OFFSET], %l5 |
160 | ldx [%sp + STACK_BIAS + L6_OFFSET], %l6 |
158 | ldx [%sp + STACK_BIAS + L6_OFFSET], %l6 |
161 | ldx [%sp + STACK_BIAS + L7_OFFSET], %l7 |
159 | ldx [%sp + STACK_BIAS + L7_OFFSET], %l7 |
162 | ldx [%sp + STACK_BIAS + I0_OFFSET], %i0 |
160 | ldx [%sp + STACK_BIAS + I0_OFFSET], %i0 |
163 | ldx [%sp + STACK_BIAS + I1_OFFSET], %i1 |
161 | ldx [%sp + STACK_BIAS + I1_OFFSET], %i1 |
164 | ldx [%sp + STACK_BIAS + I2_OFFSET], %i2 |
162 | ldx [%sp + STACK_BIAS + I2_OFFSET], %i2 |
165 | ldx [%sp + STACK_BIAS + I3_OFFSET], %i3 |
163 | ldx [%sp + STACK_BIAS + I3_OFFSET], %i3 |
166 | ldx [%sp + STACK_BIAS + I4_OFFSET], %i4 |
164 | ldx [%sp + STACK_BIAS + I4_OFFSET], %i4 |
167 | ldx [%sp + STACK_BIAS + I5_OFFSET], %i5 |
165 | ldx [%sp + STACK_BIAS + I5_OFFSET], %i5 |
168 | ldx [%sp + STACK_BIAS + I6_OFFSET], %i6 |
166 | ldx [%sp + STACK_BIAS + I6_OFFSET], %i6 |
169 | ldx [%sp + STACK_BIAS + I7_OFFSET], %i7 |
167 | ldx [%sp + STACK_BIAS + I7_OFFSET], %i7 |
170 | restored |
168 | restored |
171 | retry |
169 | retry |
172 | .endm |
170 | .endm |
173 | 171 | ||
174 | /* |
172 | /* |
175 | * Macro used by the userspace during normal fills. |
173 | * Macro used by the userspace during normal fills. |
176 | */ |
174 | */ |
177 | .macro FILL_NORMAL_HANDLER_USERSPACE |
175 | .macro FILL_NORMAL_HANDLER_USERSPACE |
178 | wr ASI_AIUP, %asi |
176 | wr ASI_AIUP, %asi |
179 | ldxa [%sp + STACK_BIAS + L0_OFFSET] %asi, %l0 |
177 | ldxa [%sp + STACK_BIAS + L0_OFFSET] %asi, %l0 |
180 | ldxa [%sp + STACK_BIAS + L1_OFFSET] %asi, %l1 |
178 | ldxa [%sp + STACK_BIAS + L1_OFFSET] %asi, %l1 |
181 | ldxa [%sp + STACK_BIAS + L2_OFFSET] %asi, %l2 |
179 | ldxa [%sp + STACK_BIAS + L2_OFFSET] %asi, %l2 |
182 | ldxa [%sp + STACK_BIAS + L3_OFFSET] %asi, %l3 |
180 | ldxa [%sp + STACK_BIAS + L3_OFFSET] %asi, %l3 |
183 | ldxa [%sp + STACK_BIAS + L4_OFFSET] %asi, %l4 |
181 | ldxa [%sp + STACK_BIAS + L4_OFFSET] %asi, %l4 |
184 | ldxa [%sp + STACK_BIAS + L5_OFFSET] %asi, %l5 |
182 | ldxa [%sp + STACK_BIAS + L5_OFFSET] %asi, %l5 |
185 | ldxa [%sp + STACK_BIAS + L6_OFFSET] %asi, %l6 |
183 | ldxa [%sp + STACK_BIAS + L6_OFFSET] %asi, %l6 |
186 | ldxa [%sp + STACK_BIAS + L7_OFFSET] %asi, %l7 |
184 | ldxa [%sp + STACK_BIAS + L7_OFFSET] %asi, %l7 |
187 | ldxa [%sp + STACK_BIAS + I0_OFFSET] %asi, %i0 |
185 | ldxa [%sp + STACK_BIAS + I0_OFFSET] %asi, %i0 |
188 | ldxa [%sp + STACK_BIAS + I1_OFFSET] %asi, %i1 |
186 | ldxa [%sp + STACK_BIAS + I1_OFFSET] %asi, %i1 |
189 | ldxa [%sp + STACK_BIAS + I2_OFFSET] %asi, %i2 |
187 | ldxa [%sp + STACK_BIAS + I2_OFFSET] %asi, %i2 |
190 | ldxa [%sp + STACK_BIAS + I3_OFFSET] %asi, %i3 |
188 | ldxa [%sp + STACK_BIAS + I3_OFFSET] %asi, %i3 |
191 | ldxa [%sp + STACK_BIAS + I4_OFFSET] %asi, %i4 |
189 | ldxa [%sp + STACK_BIAS + I4_OFFSET] %asi, %i4 |
192 | ldxa [%sp + STACK_BIAS + I5_OFFSET] %asi, %i5 |
190 | ldxa [%sp + STACK_BIAS + I5_OFFSET] %asi, %i5 |
193 | ldxa [%sp + STACK_BIAS + I6_OFFSET] %asi, %i6 |
191 | ldxa [%sp + STACK_BIAS + I6_OFFSET] %asi, %i6 |
194 | ldxa [%sp + STACK_BIAS + I7_OFFSET] %asi, %i7 |
192 | ldxa [%sp + STACK_BIAS + I7_OFFSET] %asi, %i7 |
195 | restored |
193 | restored |
196 | retry |
194 | retry |
197 | .endm |
195 | .endm |
198 | 196 | ||
199 | /* |
197 | /* |
200 | * Macro used by the userspace during other fills. |
198 | * Macro used by the userspace during other fills. |
201 | */ |
199 | */ |
202 | .macro FILL_OTHER_HANDLER_USERSPACE |
200 | .macro FILL_OTHER_HANDLER_USERSPACE |
203 | wr ASI_AIUS, %asi |
201 | wr ASI_AIUS, %asi |
204 | ldxa [%sp + STACK_BIAS + L0_OFFSET] %asi, %l0 |
202 | ldxa [%sp + STACK_BIAS + L0_OFFSET] %asi, %l0 |
205 | ldxa [%sp + STACK_BIAS + L1_OFFSET] %asi, %l1 |
203 | ldxa [%sp + STACK_BIAS + L1_OFFSET] %asi, %l1 |
206 | ldxa [%sp + STACK_BIAS + L2_OFFSET] %asi, %l2 |
204 | ldxa [%sp + STACK_BIAS + L2_OFFSET] %asi, %l2 |
207 | ldxa [%sp + STACK_BIAS + L3_OFFSET] %asi, %l3 |
205 | ldxa [%sp + STACK_BIAS + L3_OFFSET] %asi, %l3 |
208 | ldxa [%sp + STACK_BIAS + L4_OFFSET] %asi, %l4 |
206 | ldxa [%sp + STACK_BIAS + L4_OFFSET] %asi, %l4 |
209 | ldxa [%sp + STACK_BIAS + L5_OFFSET] %asi, %l5 |
207 | ldxa [%sp + STACK_BIAS + L5_OFFSET] %asi, %l5 |
210 | ldxa [%sp + STACK_BIAS + L6_OFFSET] %asi, %l6 |
208 | ldxa [%sp + STACK_BIAS + L6_OFFSET] %asi, %l6 |
211 | ldxa [%sp + STACK_BIAS + L7_OFFSET] %asi, %l7 |
209 | ldxa [%sp + STACK_BIAS + L7_OFFSET] %asi, %l7 |
212 | ldxa [%sp + STACK_BIAS + I0_OFFSET] %asi, %i0 |
210 | ldxa [%sp + STACK_BIAS + I0_OFFSET] %asi, %i0 |
213 | ldxa [%sp + STACK_BIAS + I1_OFFSET] %asi, %i1 |
211 | ldxa [%sp + STACK_BIAS + I1_OFFSET] %asi, %i1 |
214 | ldxa [%sp + STACK_BIAS + I2_OFFSET] %asi, %i2 |
212 | ldxa [%sp + STACK_BIAS + I2_OFFSET] %asi, %i2 |
215 | ldxa [%sp + STACK_BIAS + I3_OFFSET] %asi, %i3 |
213 | ldxa [%sp + STACK_BIAS + I3_OFFSET] %asi, %i3 |
216 | ldxa [%sp + STACK_BIAS + I4_OFFSET] %asi, %i4 |
214 | ldxa [%sp + STACK_BIAS + I4_OFFSET] %asi, %i4 |
217 | ldxa [%sp + STACK_BIAS + I5_OFFSET] %asi, %i5 |
215 | ldxa [%sp + STACK_BIAS + I5_OFFSET] %asi, %i5 |
218 | ldxa [%sp + STACK_BIAS + I6_OFFSET] %asi, %i6 |
216 | ldxa [%sp + STACK_BIAS + I6_OFFSET] %asi, %i6 |
219 | ldxa [%sp + STACK_BIAS + I7_OFFSET] %asi, %i7 |
217 | ldxa [%sp + STACK_BIAS + I7_OFFSET] %asi, %i7 |
220 | restored |
218 | restored |
221 | retry |
219 | retry |
222 | .endm |
220 | .endm |
223 | 221 | ||
224 | .macro CLEAN_WINDOW_HANDLER |
222 | .macro CLEAN_WINDOW_HANDLER |
225 | rdpr %cleanwin, %l0 |
223 | rdpr %cleanwin, %l0 |
226 | add %l0, 1, %l0 |
224 | add %l0, 1, %l0 |
227 | wrpr %l0, 0, %cleanwin |
225 | wrpr %l0, 0, %cleanwin |
228 | mov %r0, %l0 |
226 | mov %r0, %l0 |
229 | mov %r0, %l1 |
227 | mov %r0, %l1 |
230 | mov %r0, %l2 |
228 | mov %r0, %l2 |
231 | mov %r0, %l3 |
229 | mov %r0, %l3 |
232 | mov %r0, %l4 |
230 | mov %r0, %l4 |
233 | mov %r0, %l5 |
231 | mov %r0, %l5 |
234 | mov %r0, %l6 |
232 | mov %r0, %l6 |
235 | mov %r0, %l7 |
233 | mov %r0, %l7 |
236 | mov %r0, %o0 |
234 | mov %r0, %o0 |
237 | mov %r0, %o1 |
235 | mov %r0, %o1 |
238 | mov %r0, %o2 |
236 | mov %r0, %o2 |
239 | mov %r0, %o3 |
237 | mov %r0, %o3 |
240 | mov %r0, %o4 |
238 | mov %r0, %o4 |
241 | mov %r0, %o5 |
239 | mov %r0, %o5 |
242 | mov %r0, %o6 |
240 | mov %r0, %o6 |
243 | mov %r0, %o7 |
241 | mov %r0, %o7 |
244 | retry |
242 | retry |
245 | .endm |
243 | .endm |
246 | #endif /* __ASM__ */ |
244 | #endif /* __ASM__ */ |
247 | 245 | ||
248 | #endif |
246 | #endif |
249 | 247 | ||
250 | /** @} |
248 | /** @} |
251 | */ |
249 | */ |
252 | - | ||
253 | 250 |