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1 | /* |
1 | /* |
2 | * Copyright (C) 2006 Jakub Jermar |
2 | * Copyright (C) 2006 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup sparc64interrupt |
29 | /** @addtogroup sparc64interrupt |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** |
32 | /** |
33 | * @file |
33 | * @file |
34 | * @brief This file contains fast MMU trap handlers. |
34 | * @brief This file contains fast MMU trap handlers. |
35 | */ |
35 | */ |
36 | 36 | ||
37 | #ifndef __sparc64_MMU_TRAP_H__ |
37 | #ifndef __sparc64_MMU_TRAP_H__ |
38 | #define __sparc64_MMU_TRAP_H__ |
38 | #define __sparc64_MMU_TRAP_H__ |
39 | 39 | ||
40 | #include <arch/stack.h> |
40 | #include <arch/stack.h> |
- | 41 | #include <arch/regdef.h> |
|
41 | #include <arch/mm/tlb.h> |
42 | #include <arch/mm/tlb.h> |
42 | #include <arch/mm/mmu.h> |
43 | #include <arch/mm/mmu.h> |
43 | #include <arch/mm/tte.h> |
44 | #include <arch/mm/tte.h> |
44 | 45 | ||
45 | #define TT_FAST_INSTRUCTION_ACCESS_MMU_MISS 0x64 |
46 | #define TT_FAST_INSTRUCTION_ACCESS_MMU_MISS 0x64 |
46 | #define TT_FAST_DATA_ACCESS_MMU_MISS 0x68 |
47 | #define TT_FAST_DATA_ACCESS_MMU_MISS 0x68 |
47 | #define TT_FAST_DATA_ACCESS_PROTECTION 0x6c |
48 | #define TT_FAST_DATA_ACCESS_PROTECTION 0x6c |
48 | 49 | ||
49 | #define FAST_MMU_HANDLER_SIZE 128 |
50 | #define FAST_MMU_HANDLER_SIZE 128 |
50 | 51 | ||
51 | #ifdef __ASM__ |
52 | #ifdef __ASM__ |
52 | .macro FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER |
53 | .macro FAST_INSTRUCTION_ACCESS_MMU_MISS_HANDLER |
53 | save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp |
54 | save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp |
54 | call fast_instruction_access_mmu_miss |
55 | call fast_instruction_access_mmu_miss |
55 | nop |
56 | nop |
56 | restore |
57 | restore |
57 | retry |
58 | retry |
58 | .endm |
59 | .endm |
59 | 60 | ||
60 | .macro FAST_DATA_ACCESS_MMU_MISS_HANDLER |
61 | .macro FAST_DATA_ACCESS_MMU_MISS_HANDLER |
61 | /* |
62 | /* |
- | 63 | * First, try to refill TLB from TSB. |
|
- | 64 | */ |
|
- | 65 | ! TODO |
|
- | 66 | ||
- | 67 | /* |
|
62 | * First, test if it is the portion of the kernel address space |
68 | * Second, test if it is the portion of the kernel address space |
63 | * which is faulting. If that is the case, immediately create |
69 | * which is faulting. If that is the case, immediately create |
64 | * identity mapping for that page in DTLB. VPN 0 is excluded from |
70 | * identity mapping for that page in DTLB. VPN 0 is excluded from |
65 | * this treatment. |
71 | * this treatment. |
66 | * |
72 | * |
67 | * Note that branch-delay slots are used in order to save space. |
73 | * Note that branch-delay slots are used in order to save space. |
68 | */ |
74 | */ |
- | 75 | 0: |
|
69 | mov VA_DMMU_TAG_ACCESS, %g1 |
76 | mov VA_DMMU_TAG_ACCESS, %g1 |
70 | ldxa [%g1] ASI_DMMU, %g1 ! read the faulting Context and VPN |
77 | ldxa [%g1] ASI_DMMU, %g1 ! read the faulting Context and VPN |
71 | set TLB_TAG_ACCESS_CONTEXT_MASK, %g2 |
78 | set TLB_TAG_ACCESS_CONTEXT_MASK, %g2 |
72 | andcc %g1, %g2, %g3 ! get Context |
79 | andcc %g1, %g2, %g3 ! get Context |
73 | bnz 0f ! Context is non-zero |
80 | bnz 0f ! Context is non-zero |
74 | andncc %g1, %g2, %g3 ! get page address into %g3 |
81 | andncc %g1, %g2, %g3 ! get page address into %g3 |
75 | bz 0f ! page address is zero |
82 | bz 0f ! page address is zero |
76 | 83 | ||
77 | /* |
- | |
78 | * Create and insert the identity-mapped entry for |
- | |
79 | * the faulting kernel page. |
- | |
80 | */ |
- | |
81 | - | ||
82 | or %g3, (TTE_CP|TTE_P|TTE_W), %g2 ! 8K pages are the default (encoded as 0) |
84 | or %g3, (TTE_CP|TTE_P|TTE_W), %g2 ! 8K pages are the default (encoded as 0) |
83 | set 1, %g3 |
85 | set 1, %g3 |
84 | sllx %g3, TTE_V_SHIFT, %g3 |
86 | sllx %g3, TTE_V_SHIFT, %g3 |
85 | or %g2, %g3, %g2 |
87 | or %g2, %g3, %g2 |
86 | stxa %g2, [%g0] ASI_DTLB_DATA_IN_REG ! identity map the kernel page |
88 | stxa %g2, [%g0] ASI_DTLB_DATA_IN_REG ! identity map the kernel page |
87 | retry |
89 | retry |
88 | 90 | ||
- | 91 | /* |
|
- | 92 | * Third, catch and handle special cases when the trap is caused by |
|
- | 93 | * some register window trap handler. |
|
- | 94 | */ |
|
- | 95 | 0: |
|
- | 96 | ! TODO |
|
- | 97 | ||
89 | 0: |
98 | 0: |
90 | save %sp, -PREEMPTIBLE_HANDLER_STACK_FRAME_SIZE, %sp |
99 | wrpr %g0, PSTATE_PRIV_BIT | PSTATE_AG_BIT, %pstate |
91 | PREEMPTIBLE_HANDLER fast_data_access_mmu_miss |
100 | PREEMPTIBLE_HANDLER fast_data_access_mmu_miss |
92 | .endm |
101 | .endm |
93 | 102 | ||
94 | .macro FAST_DATA_ACCESS_PROTECTION_HANDLER |
103 | .macro FAST_DATA_ACCESS_PROTECTION_HANDLER |
95 | save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp |
104 | save %sp, -STACK_WINDOW_SAVE_AREA_SIZE, %sp |
96 | call fast_data_access_protection |
105 | call fast_data_access_protection |
97 | nop |
106 | nop |
98 | restore |
107 | restore |
99 | retry |
108 | retry |
100 | .endm |
109 | .endm |
101 | #endif /* __ASM__ */ |
110 | #endif /* __ASM__ */ |
102 | 111 | ||
103 | #endif |
112 | #endif |
104 | 113 | ||
105 | /** @} |
114 | /** @} |
106 | */ |
115 | */ |
107 | 116 |