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1 | /* |
1 | /* |
2 | * Copyright (c) 2006 Martin Decky |
2 | * Copyright (c) 2006 Martin Decky |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup ppc32mm |
29 | /** @addtogroup ppc32mm |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <mm/tlb.h> |
35 | #include <mm/tlb.h> |
36 | #include <arch/mm/tlb.h> |
36 | #include <arch/mm/tlb.h> |
37 | #include <arch/interrupt.h> |
37 | #include <arch/interrupt.h> |
38 | #include <interrupt.h> |
38 | #include <interrupt.h> |
39 | #include <mm/as.h> |
39 | #include <mm/as.h> |
40 | #include <arch.h> |
40 | #include <arch.h> |
41 | #include <print.h> |
41 | #include <print.h> |
42 | #include <symtab.h> |
42 | #include <symtab.h> |
43 | #include <macros.h> |
43 | #include <macros.h> |
44 | 44 | ||
45 | 45 | ||
46 | static unsigned int seed = 10; |
46 | static unsigned int seed = 10; |
47 | static unsigned int seed_real __attribute__ ((section("K_UNMAPPED_DATA_START"))) = 42; |
47 | static unsigned int seed_real __attribute__ ((section("K_UNMAPPED_DATA_START"))) = 42; |
48 | 48 | ||
49 | 49 | ||
50 | /** Try to find PTE for faulting address |
50 | /** Try to find PTE for faulting address |
51 | * |
51 | * |
52 | * Try to find PTE for faulting address. |
52 | * Try to find PTE for faulting address. |
53 | * The as->lock must be held on entry to this function |
53 | * The as->lock must be held on entry to this function |
54 | * if lock is true. |
54 | * if lock is true. |
55 | * |
55 | * |
56 | * @param as Address space. |
56 | * @param as Address space. |
57 | * @param lock Lock/unlock the address space. |
57 | * @param lock Lock/unlock the address space. |
58 | * @param badvaddr Faulting virtual address. |
58 | * @param badvaddr Faulting virtual address. |
59 | * @param access Access mode that caused the fault. |
59 | * @param access Access mode that caused the fault. |
60 | * @param istate Pointer to interrupted state. |
60 | * @param istate Pointer to interrupted state. |
61 | * @param pfrc Pointer to variable where as_page_fault() return code |
61 | * @param pfrc Pointer to variable where as_page_fault() return code |
62 | * will be stored. |
62 | * will be stored. |
63 | * @return PTE on success, NULL otherwise. |
63 | * @return PTE on success, NULL otherwise. |
64 | * |
64 | * |
65 | */ |
65 | */ |
66 | static pte_t * |
66 | static pte_t * |
67 | find_mapping_and_check(as_t *as, bool lock, uintptr_t badvaddr, int access, |
67 | find_mapping_and_check(as_t *as, bool lock, uintptr_t badvaddr, int access, |
68 | istate_t *istate, int *pfrc) |
68 | istate_t *istate, int *pfrc) |
69 | { |
69 | { |
70 | /* |
70 | /* |
71 | * Check if the mapping exists in page tables. |
71 | * Check if the mapping exists in page tables. |
72 | */ |
72 | */ |
73 | pte_t *pte = page_mapping_find(as, badvaddr); |
73 | pte_t *pte = page_mapping_find(as, badvaddr); |
74 | if ((pte) && (pte->present)) { |
74 | if ((pte) && (pte->present)) { |
75 | /* |
75 | /* |
76 | * Mapping found in page tables. |
76 | * Mapping found in page tables. |
77 | * Immediately succeed. |
77 | * Immediately succeed. |
78 | */ |
78 | */ |
79 | return pte; |
79 | return pte; |
80 | } else { |
80 | } else { |
81 | int rc; |
81 | int rc; |
82 | 82 | ||
83 | /* |
83 | /* |
84 | * Mapping not found in page tables. |
84 | * Mapping not found in page tables. |
85 | * Resort to higher-level page fault handler. |
85 | * Resort to higher-level page fault handler. |
86 | */ |
86 | */ |
87 | page_table_unlock(as, lock); |
87 | page_table_unlock(as, lock); |
88 | switch (rc = as_page_fault(badvaddr, access, istate)) { |
88 | switch (rc = as_page_fault(badvaddr, access, istate)) { |
89 | case AS_PF_OK: |
89 | case AS_PF_OK: |
90 | /* |
90 | /* |
91 | * The higher-level page fault handler succeeded, |
91 | * The higher-level page fault handler succeeded, |
92 | * The mapping ought to be in place. |
92 | * The mapping ought to be in place. |
93 | */ |
93 | */ |
94 | page_table_lock(as, lock); |
94 | page_table_lock(as, lock); |
95 | pte = page_mapping_find(as, badvaddr); |
95 | pte = page_mapping_find(as, badvaddr); |
96 | ASSERT((pte) && (pte->present)); |
96 | ASSERT((pte) && (pte->present)); |
97 | *pfrc = 0; |
97 | *pfrc = 0; |
98 | return pte; |
98 | return pte; |
99 | case AS_PF_DEFER: |
99 | case AS_PF_DEFER: |
100 | page_table_lock(as, lock); |
100 | page_table_lock(as, lock); |
101 | *pfrc = rc; |
101 | *pfrc = rc; |
102 | return NULL; |
102 | return NULL; |
103 | case AS_PF_FAULT: |
103 | case AS_PF_FAULT: |
104 | page_table_lock(as, lock); |
104 | page_table_lock(as, lock); |
105 | *pfrc = rc; |
105 | *pfrc = rc; |
106 | return NULL; |
106 | return NULL; |
107 | default: |
107 | default: |
108 | panic("Unexpected rc (%d).", rc); |
108 | panic("Unexpected rc (%d).", rc); |
109 | } |
109 | } |
110 | } |
110 | } |
111 | } |
111 | } |
112 | 112 | ||
113 | 113 | ||
114 | static void pht_refill_fail(uintptr_t badvaddr, istate_t *istate) |
114 | static void pht_refill_fail(uintptr_t badvaddr, istate_t *istate) |
115 | { |
115 | { |
116 | char *symbol = ""; |
116 | char *symbol = ""; |
117 | char *sym2 = ""; |
117 | char *sym2 = ""; |
118 | 118 | ||
119 | char *str = get_symtab_entry(istate->pc); |
119 | char *str = get_symtab_entry(istate->pc); |
120 | if (str) |
120 | if (str) |
121 | symbol = str; |
121 | symbol = str; |
122 | str = get_symtab_entry(istate->lr); |
122 | str = get_symtab_entry(istate->lr); |
123 | if (str) |
123 | if (str) |
124 | sym2 = str; |
124 | sym2 = str; |
125 | 125 | ||
126 | fault_if_from_uspace(istate, |
126 | fault_if_from_uspace(istate, |
127 | "PHT Refill Exception on %p.", badvaddr); |
127 | "PHT Refill Exception on %p.", badvaddr); |
128 | panic("%p: PHT Refill Exception at %p (%s<-%s).", badvaddr, |
128 | panic("%p: PHT Refill Exception at %p (%s<-%s).", badvaddr, |
129 | istate->pc, symbol, sym2); |
129 | istate->pc, symbol, sym2); |
130 | } |
130 | } |
131 | 131 | ||
132 | 132 | ||
133 | static void pht_insert(const uintptr_t vaddr, const pte_t *pte) |
133 | static void pht_insert(const uintptr_t vaddr, const pte_t *pte) |
134 | { |
134 | { |
135 | uint32_t page = (vaddr >> 12) & 0xffff; |
135 | uint32_t page = (vaddr >> 12) & 0xffff; |
136 | uint32_t api = (vaddr >> 22) & 0x3f; |
136 | uint32_t api = (vaddr >> 22) & 0x3f; |
137 | 137 | ||
138 | uint32_t vsid; |
138 | uint32_t vsid; |
139 | asm volatile ( |
139 | asm volatile ( |
140 | "mfsrin %0, %1\n" |
140 | "mfsrin %0, %1\n" |
141 | : "=r" (vsid) |
141 | : "=r" (vsid) |
142 | : "r" (vaddr) |
142 | : "r" (vaddr) |
143 | ); |
143 | ); |
144 | 144 | ||
145 | uint32_t sdr1; |
145 | uint32_t sdr1; |
146 | asm volatile ( |
146 | asm volatile ( |
147 | "mfsdr1 %0\n" |
147 | "mfsdr1 %0\n" |
148 | : "=r" (sdr1) |
148 | : "=r" (sdr1) |
149 | ); |
149 | ); |
150 | phte_t *phte = (phte_t *) PA2KA(sdr1 & 0xffff0000); |
150 | phte_t *phte = (phte_t *) PA2KA(sdr1 & 0xffff0000); |
151 | 151 | ||
152 | /* Primary hash (xor) */ |
152 | /* Primary hash (xor) */ |
153 | uint32_t h = 0; |
153 | uint32_t h = 0; |
154 | uint32_t hash = vsid ^ page; |
154 | uint32_t hash = vsid ^ page; |
155 | uint32_t base = (hash & 0x3ff) << 3; |
155 | uint32_t base = (hash & 0x3ff) << 3; |
156 | uint32_t i; |
156 | uint32_t i; |
157 | bool found = false; |
157 | bool found = false; |
158 | 158 | ||
159 | /* Find unused or colliding PTE in PTEG */ |
159 | /* Find colliding PTE in PTEG */ |
160 | for (i = 0; i < 8; i++) { |
160 | for (i = 0; i < 8; i++) { |
161 | if ((!phte[base + i].v) || |
161 | if ((phte[base + i].v) |
162 | ((phte[base + i].vsid == vsid) |
162 | && (phte[base + i].vsid == vsid) |
163 | && (phte[base + i].api == api) |
163 | && (phte[base + i].api == api) |
164 | && (phte[base + i].h == 0))) { |
164 | && (phte[base + i].h == 0)) { |
165 | found = true; |
165 | found = true; |
166 | break; |
166 | break; |
167 | } |
167 | } |
168 | } |
168 | } |
169 | 169 | ||
170 | if (!found) { |
170 | if (!found) { |
- | 171 | /* Find unused PTE in PTEG */ |
|
- | 172 | for (i = 0; i < 8; i++) { |
|
- | 173 | if (!phte[base + i].v) { |
|
- | 174 | found = true; |
|
- | 175 | break; |
|
- | 176 | } |
|
- | 177 | } |
|
- | 178 | } |
|
- | 179 | ||
- | 180 | if (!found) { |
|
171 | /* Secondary hash (not) */ |
181 | /* Secondary hash (not) */ |
172 | uint32_t base2 = (~hash & 0x3ff) << 3; |
182 | uint32_t base2 = (~hash & 0x3ff) << 3; |
173 | 183 | ||
174 | /* Find unused or colliding PTE in PTEG */ |
184 | /* Find colliding PTE in PTEG */ |
175 | for (i = 0; i < 8; i++) { |
185 | for (i = 0; i < 8; i++) { |
176 | if ((!phte[base2 + i].v) || |
186 | if ((phte[base2 + i].v) |
177 | ((phte[base2 + i].vsid == vsid) |
187 | && (phte[base2 + i].vsid == vsid) |
178 | && (phte[base2 + i].api == api) |
188 | && (phte[base2 + i].api == api) |
179 | && (phte[base2 + i].h == 1))) { |
189 | && (phte[base2 + i].h == 1)) { |
- | 190 | found = true; |
|
- | 191 | base = base2; |
|
- | 192 | h = 1; |
|
- | 193 | break; |
|
- | 194 | } |
|
- | 195 | } |
|
- | 196 | ||
- | 197 | if (!found) { |
|
- | 198 | /* Find unused PTE in PTEG */ |
|
- | 199 | for (i = 0; i < 8; i++) { |
|
- | 200 | if (!phte[base2 + i].v) { |
|
180 | found = true; |
201 | found = true; |
181 | base = base2; |
202 | base = base2; |
182 | h = 1; |
203 | h = 1; |
183 | break; |
204 | break; |
184 | } |
205 | } |
185 | } |
206 | } |
- | 207 | } |
|
186 | 208 | ||
187 | if (!found) |
209 | if (!found) |
188 | i = RANDI(seed) % 8; |
210 | i = RANDI(seed) % 8; |
189 | } |
211 | } |
190 | 212 | ||
191 | phte[base + i].v = 1; |
213 | phte[base + i].v = 1; |
192 | phte[base + i].vsid = vsid; |
214 | phte[base + i].vsid = vsid; |
193 | phte[base + i].h = h; |
215 | phte[base + i].h = h; |
194 | phte[base + i].api = api; |
216 | phte[base + i].api = api; |
195 | phte[base + i].rpn = pte->pfn; |
217 | phte[base + i].rpn = pte->pfn; |
196 | phte[base + i].r = 0; |
218 | phte[base + i].r = 0; |
197 | phte[base + i].c = 0; |
219 | phte[base + i].c = 0; |
198 | phte[base + i].wimg = (pte->page_cache_disable ? WIMG_NO_CACHE : 0); |
220 | phte[base + i].wimg = (pte->page_cache_disable ? WIMG_NO_CACHE : 0); |
199 | phte[base + i].pp = 2; // FIXME |
221 | phte[base + i].pp = 2; // FIXME |
200 | } |
222 | } |
201 | 223 | ||
202 | 224 | ||
203 | /** Process Instruction/Data Storage Interrupt |
225 | /** Process Instruction/Data Storage Interrupt |
204 | * |
226 | * |
205 | * @param n Interrupt vector number. |
227 | * @param n Interrupt vector number. |
206 | * @param istate Interrupted register context. |
228 | * @param istate Interrupted register context. |
207 | * |
229 | * |
208 | */ |
230 | */ |
209 | void pht_refill(int n, istate_t *istate) |
231 | void pht_refill(int n, istate_t *istate) |
210 | { |
232 | { |
211 | uintptr_t badvaddr; |
233 | uintptr_t badvaddr; |
212 | pte_t *pte; |
234 | pte_t *pte; |
213 | int pfrc; |
235 | int pfrc; |
214 | as_t *as; |
236 | as_t *as; |
215 | bool lock; |
237 | bool lock; |
216 | 238 | ||
217 | if (AS == NULL) { |
239 | if (AS == NULL) { |
218 | as = AS_KERNEL; |
240 | as = AS_KERNEL; |
219 | lock = false; |
241 | lock = false; |
220 | } else { |
242 | } else { |
221 | as = AS; |
243 | as = AS; |
222 | lock = true; |
244 | lock = true; |
223 | } |
245 | } |
224 | 246 | ||
225 | if (n == VECTOR_DATA_STORAGE) |
247 | if (n == VECTOR_DATA_STORAGE) |
226 | badvaddr = istate->dar; |
248 | badvaddr = istate->dar; |
227 | else |
249 | else |
228 | badvaddr = istate->pc; |
250 | badvaddr = istate->pc; |
229 | 251 | ||
230 | page_table_lock(as, lock); |
252 | page_table_lock(as, lock); |
231 | 253 | ||
232 | pte = find_mapping_and_check(as, lock, badvaddr, |
254 | pte = find_mapping_and_check(as, lock, badvaddr, |
233 | PF_ACCESS_READ /* FIXME */, istate, &pfrc); |
255 | PF_ACCESS_READ /* FIXME */, istate, &pfrc); |
234 | if (!pte) { |
256 | if (!pte) { |
235 | switch (pfrc) { |
257 | switch (pfrc) { |
236 | case AS_PF_FAULT: |
258 | case AS_PF_FAULT: |
237 | goto fail; |
259 | goto fail; |
238 | break; |
260 | break; |
239 | case AS_PF_DEFER: |
261 | case AS_PF_DEFER: |
240 | /* |
262 | /* |
241 | * The page fault came during copy_from_uspace() |
263 | * The page fault came during copy_from_uspace() |
242 | * or copy_to_uspace(). |
264 | * or copy_to_uspace(). |
243 | */ |
265 | */ |
244 | page_table_unlock(as, lock); |
266 | page_table_unlock(as, lock); |
245 | return; |
267 | return; |
246 | default: |
268 | default: |
247 | panic("Unexpected pfrc (%d).", pfrc); |
269 | panic("Unexpected pfrc (%d).", pfrc); |
248 | } |
270 | } |
249 | } |
271 | } |
250 | 272 | ||
251 | pte->accessed = 1; /* Record access to PTE */ |
273 | pte->accessed = 1; /* Record access to PTE */ |
252 | pht_insert(badvaddr, pte); |
274 | pht_insert(badvaddr, pte); |
253 | 275 | ||
254 | page_table_unlock(as, lock); |
276 | page_table_unlock(as, lock); |
255 | return; |
277 | return; |
256 | 278 | ||
257 | fail: |
279 | fail: |
258 | page_table_unlock(as, lock); |
280 | page_table_unlock(as, lock); |
259 | pht_refill_fail(badvaddr, istate); |
281 | pht_refill_fail(badvaddr, istate); |
260 | } |
282 | } |
261 | 283 | ||
262 | 284 | ||
263 | /** Process Instruction/Data Storage Interrupt in Real Mode |
285 | /** Process Instruction/Data Storage Interrupt in Real Mode |
264 | * |
286 | * |
265 | * @param n Interrupt vector number. |
287 | * @param n Interrupt vector number. |
266 | * @param istate Interrupted register context. |
288 | * @param istate Interrupted register context. |
267 | * |
289 | * |
268 | */ |
290 | */ |
269 | bool pht_refill_real(int n, istate_t *istate) |
291 | bool pht_refill_real(int n, istate_t *istate) |
270 | { |
292 | { |
271 | uintptr_t badvaddr; |
293 | uintptr_t badvaddr; |
272 | 294 | ||
273 | if (n == VECTOR_DATA_STORAGE) |
295 | if (n == VECTOR_DATA_STORAGE) |
274 | badvaddr = istate->dar; |
296 | badvaddr = istate->dar; |
275 | else |
297 | else |
276 | badvaddr = istate->pc; |
298 | badvaddr = istate->pc; |
277 | 299 | ||
278 | uint32_t physmem; |
300 | uint32_t physmem; |
279 | asm volatile ( |
301 | asm volatile ( |
280 | "mfsprg3 %0\n" |
302 | "mfsprg3 %0\n" |
281 | : "=r" (physmem) |
303 | : "=r" (physmem) |
282 | ); |
304 | ); |
283 | 305 | ||
284 | if ((badvaddr < PA2KA(0)) || (badvaddr >= PA2KA(physmem))) |
306 | if ((badvaddr < PA2KA(0)) || (badvaddr >= PA2KA(physmem))) |
285 | return false; |
307 | return false; |
286 | 308 | ||
287 | uint32_t page = (badvaddr >> 12) & 0xffff; |
309 | uint32_t page = (badvaddr >> 12) & 0xffff; |
288 | uint32_t api = (badvaddr >> 22) & 0x3f; |
310 | uint32_t api = (badvaddr >> 22) & 0x3f; |
289 | 311 | ||
290 | uint32_t vsid; |
312 | uint32_t vsid; |
291 | asm volatile ( |
313 | asm volatile ( |
292 | "mfsrin %0, %1\n" |
314 | "mfsrin %0, %1\n" |
293 | : "=r" (vsid) |
315 | : "=r" (vsid) |
294 | : "r" (badvaddr) |
316 | : "r" (badvaddr) |
295 | ); |
317 | ); |
296 | 318 | ||
297 | uint32_t sdr1; |
319 | uint32_t sdr1; |
298 | asm volatile ( |
320 | asm volatile ( |
299 | "mfsdr1 %0\n" |
321 | "mfsdr1 %0\n" |
300 | : "=r" (sdr1) |
322 | : "=r" (sdr1) |
301 | ); |
323 | ); |
302 | phte_t *phte_real = (phte_t *) (sdr1 & 0xffff0000); |
324 | phte_t *phte_real = (phte_t *) (sdr1 & 0xffff0000); |
303 | 325 | ||
304 | /* Primary hash (xor) */ |
326 | /* Primary hash (xor) */ |
305 | uint32_t h = 0; |
327 | uint32_t h = 0; |
306 | uint32_t hash = vsid ^ page; |
328 | uint32_t hash = vsid ^ page; |
307 | uint32_t base = (hash & 0x3ff) << 3; |
329 | uint32_t base = (hash & 0x3ff) << 3; |
308 | uint32_t i; |
330 | uint32_t i; |
309 | bool found = false; |
331 | bool found = false; |
310 | 332 | ||
311 | /* Find unused or colliding PTE in PTEG */ |
333 | /* Find colliding PTE in PTEG */ |
312 | for (i = 0; i < 8; i++) { |
334 | for (i = 0; i < 8; i++) { |
313 | if ((!phte_real[base + i].v) || |
335 | if ((phte_real[base + i].v) |
314 | ((phte_real[base + i].vsid == vsid) |
336 | && (phte_real[base + i].vsid == vsid) |
315 | && (phte_real[base + i].api == api) |
337 | && (phte_real[base + i].api == api) |
316 | && (phte_real[base + i].h == 0))) { |
338 | && (phte_real[base + i].h == 0)) { |
317 | found = true; |
339 | found = true; |
318 | break; |
340 | break; |
319 | } |
341 | } |
320 | } |
342 | } |
321 | 343 | ||
322 | if (!found) { |
344 | if (!found) { |
- | 345 | /* Find unused PTE in PTEG */ |
|
- | 346 | for (i = 0; i < 8; i++) { |
|
- | 347 | if (!phte_real[base + i].v) { |
|
- | 348 | found = true; |
|
- | 349 | break; |
|
- | 350 | } |
|
- | 351 | } |
|
- | 352 | } |
|
- | 353 | ||
- | 354 | if (!found) { |
|
323 | /* Secondary hash (not) */ |
355 | /* Secondary hash (not) */ |
324 | uint32_t base2 = (~hash & 0x3ff) << 3; |
356 | uint32_t base2 = (~hash & 0x3ff) << 3; |
325 | 357 | ||
326 | /* Find unused or colliding PTE in PTEG */ |
358 | /* Find colliding PTE in PTEG */ |
327 | for (i = 0; i < 8; i++) { |
359 | for (i = 0; i < 8; i++) { |
328 | if ((!phte_real[base2 + i].v) || |
360 | if ((phte_real[base2 + i].v) |
329 | ((phte_real[base2 + i].vsid == vsid) |
361 | && (phte_real[base2 + i].vsid == vsid) |
330 | && (phte_real[base2 + i].api == api) |
362 | && (phte_real[base2 + i].api == api) |
331 | && (phte_real[base2 + i].h == 1))) { |
363 | && (phte_real[base2 + i].h == 1)) { |
- | 364 | found = true; |
|
- | 365 | base = base2; |
|
- | 366 | h = 1; |
|
- | 367 | break; |
|
- | 368 | } |
|
- | 369 | } |
|
- | 370 | ||
- | 371 | if (!found) { |
|
- | 372 | /* Find unused PTE in PTEG */ |
|
- | 373 | for (i = 0; i < 8; i++) { |
|
- | 374 | if (!phte_real[base2 + i].v) { |
|
332 | found = true; |
375 | found = true; |
333 | base = base2; |
376 | base = base2; |
334 | h = 1; |
377 | h = 1; |
335 | break; |
378 | break; |
336 | } |
379 | } |
- | 380 | } |
|
337 | } |
381 | } |
338 | 382 | ||
339 | if (!found) { |
383 | if (!found) { |
340 | /* Use secondary hash to avoid collisions |
384 | /* Use secondary hash to avoid collisions |
341 | with usual PHT refill handler. */ |
385 | with usual PHT refill handler. */ |
342 | i = RANDI(seed_real) % 8; |
386 | i = RANDI(seed_real) % 8; |
343 | base = base2; |
387 | base = base2; |
344 | h = 1; |
388 | h = 1; |
345 | } |
389 | } |
346 | } |
390 | } |
347 | 391 | ||
348 | phte_real[base + i].v = 1; |
392 | phte_real[base + i].v = 1; |
349 | phte_real[base + i].vsid = vsid; |
393 | phte_real[base + i].vsid = vsid; |
350 | phte_real[base + i].h = h; |
394 | phte_real[base + i].h = h; |
351 | phte_real[base + i].api = api; |
395 | phte_real[base + i].api = api; |
352 | phte_real[base + i].rpn = KA2PA(badvaddr) >> 12; |
396 | phte_real[base + i].rpn = KA2PA(badvaddr) >> 12; |
353 | phte_real[base + i].r = 0; |
397 | phte_real[base + i].r = 0; |
354 | phte_real[base + i].c = 0; |
398 | phte_real[base + i].c = 0; |
355 | phte_real[base + i].wimg = 0; |
399 | phte_real[base + i].wimg = 0; |
356 | phte_real[base + i].pp = 2; // FIXME |
400 | phte_real[base + i].pp = 2; // FIXME |
357 | 401 | ||
358 | return true; |
402 | return true; |
359 | } |
403 | } |
360 | 404 | ||
361 | 405 | ||
362 | void tlb_arch_init(void) |
406 | void tlb_arch_init(void) |
363 | { |
407 | { |
364 | tlb_invalidate_all(); |
408 | tlb_invalidate_all(); |
365 | } |
409 | } |
366 | 410 | ||
367 | 411 | ||
368 | void tlb_invalidate_all(void) |
412 | void tlb_invalidate_all(void) |
369 | { |
413 | { |
370 | asm volatile ( |
414 | asm volatile ( |
371 | "tlbsync\n" |
415 | "tlbsync\n" |
372 | ); |
416 | ); |
373 | } |
417 | } |
374 | 418 | ||
375 | 419 | ||
376 | void tlb_invalidate_asid(asid_t asid) |
420 | void tlb_invalidate_asid(asid_t asid) |
377 | { |
421 | { |
378 | uint32_t sdr1; |
422 | uint32_t sdr1; |
379 | asm volatile ( |
423 | asm volatile ( |
380 | "mfsdr1 %0\n" |
424 | "mfsdr1 %0\n" |
381 | : "=r" (sdr1) |
425 | : "=r" (sdr1) |
382 | ); |
426 | ); |
383 | phte_t *phte = (phte_t *) PA2KA(sdr1 & 0xffff0000); |
427 | phte_t *phte = (phte_t *) PA2KA(sdr1 & 0xffff0000); |
384 | 428 | ||
385 | uint32_t i; |
429 | uint32_t i; |
386 | for (i = 0; i < 8192; i++) { |
430 | for (i = 0; i < 8192; i++) { |
387 | if ((phte[i].v) && (phte[i].vsid >= (asid << 4)) && |
431 | if ((phte[i].v) && (phte[i].vsid >= (asid << 4)) && |
388 | (phte[i].vsid < ((asid << 4) + 16))) |
432 | (phte[i].vsid < ((asid << 4) + 16))) |
389 | phte[i].v = 0; |
433 | phte[i].v = 0; |
390 | } |
434 | } |
391 | tlb_invalidate_all(); |
435 | tlb_invalidate_all(); |
392 | } |
436 | } |
393 | 437 | ||
394 | 438 | ||
395 | void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt) |
439 | void tlb_invalidate_pages(asid_t asid, uintptr_t page, count_t cnt) |
396 | { |
440 | { |
397 | // TODO |
441 | // TODO |
398 | tlb_invalidate_all(); |
442 | tlb_invalidate_all(); |
399 | } |
443 | } |
400 | 444 | ||
401 | 445 | ||
402 | #define PRINT_BAT(name, ureg, lreg) \ |
446 | #define PRINT_BAT(name, ureg, lreg) \ |
403 | asm volatile ( \ |
447 | asm volatile ( \ |
404 | "mfspr %0," #ureg "\n" \ |
448 | "mfspr %0," #ureg "\n" \ |
405 | "mfspr %1," #lreg "\n" \ |
449 | "mfspr %1," #lreg "\n" \ |
406 | : "=r" (upper), "=r" (lower) \ |
450 | : "=r" (upper), "=r" (lower) \ |
407 | ); \ |
451 | ); \ |
408 | mask = (upper & 0x1ffc) >> 2; \ |
452 | mask = (upper & 0x1ffc) >> 2; \ |
409 | if (upper & 3) { \ |
453 | if (upper & 3) { \ |
410 | uint32_t tmp = mask; \ |
454 | uint32_t tmp = mask; \ |
411 | length = 128; \ |
455 | length = 128; \ |
412 | while (tmp) { \ |
456 | while (tmp) { \ |
413 | if ((tmp & 1) == 0) { \ |
457 | if ((tmp & 1) == 0) { \ |
414 | printf("ibat[0]: error in mask\n"); \ |
458 | printf("ibat[0]: error in mask\n"); \ |
415 | break; \ |
459 | break; \ |
416 | } \ |
460 | } \ |
417 | length <<= 1; \ |
461 | length <<= 1; \ |
418 | tmp >>= 1; \ |
462 | tmp >>= 1; \ |
419 | } \ |
463 | } \ |
420 | } else \ |
464 | } else \ |
421 | length = 0; \ |
465 | length = 0; \ |
422 | printf(name ": page=%.*p frame=%.*p length=%d KB (mask=%#x)%s%s\n", \ |
466 | printf(name ": page=%.*p frame=%.*p length=%d KB (mask=%#x)%s%s\n", \ |
423 | sizeof(upper) * 2, upper & 0xffff0000, sizeof(lower) * 2, \ |
467 | sizeof(upper) * 2, upper & 0xffff0000, sizeof(lower) * 2, \ |
424 | lower & 0xffff0000, length, mask, \ |
468 | lower & 0xffff0000, length, mask, \ |
425 | ((upper >> 1) & 1) ? " supervisor" : "", \ |
469 | ((upper >> 1) & 1) ? " supervisor" : "", \ |
426 | (upper & 1) ? " user" : ""); |
470 | (upper & 1) ? " user" : ""); |
427 | 471 | ||
428 | 472 | ||
429 | void tlb_print(void) |
473 | void tlb_print(void) |
430 | { |
474 | { |
431 | uint32_t sr; |
475 | uint32_t sr; |
432 | 476 | ||
433 | for (sr = 0; sr < 16; sr++) { |
477 | for (sr = 0; sr < 16; sr++) { |
434 | uint32_t vsid; |
478 | uint32_t vsid; |
435 | asm volatile ( |
479 | asm volatile ( |
436 | "mfsrin %0, %1\n" |
480 | "mfsrin %0, %1\n" |
437 | : "=r" (vsid) |
481 | : "=r" (vsid) |
438 | : "r" (sr << 28) |
482 | : "r" (sr << 28) |
439 | ); |
483 | ); |
440 | printf("sr[%02u]: vsid=%.*p (asid=%u)%s%s\n", sr, |
484 | printf("sr[%02u]: vsid=%.*p (asid=%u)%s%s\n", sr, |
441 | sizeof(vsid) * 2, vsid & 0xffffff, (vsid & 0xffffff) >> 4, |
485 | sizeof(vsid) * 2, vsid & 0xffffff, (vsid & 0xffffff) >> 4, |
442 | ((vsid >> 30) & 1) ? " supervisor" : "", |
486 | ((vsid >> 30) & 1) ? " supervisor" : "", |
443 | ((vsid >> 29) & 1) ? " user" : ""); |
487 | ((vsid >> 29) & 1) ? " user" : ""); |
444 | } |
488 | } |
445 | 489 | ||
446 | uint32_t upper; |
490 | uint32_t upper; |
447 | uint32_t lower; |
491 | uint32_t lower; |
448 | uint32_t mask; |
492 | uint32_t mask; |
449 | uint32_t length; |
493 | uint32_t length; |
450 | 494 | ||
451 | PRINT_BAT("ibat[0]", 528, 529); |
495 | PRINT_BAT("ibat[0]", 528, 529); |
452 | PRINT_BAT("ibat[1]", 530, 531); |
496 | PRINT_BAT("ibat[1]", 530, 531); |
453 | PRINT_BAT("ibat[2]", 532, 533); |
497 | PRINT_BAT("ibat[2]", 532, 533); |
454 | PRINT_BAT("ibat[3]", 534, 535); |
498 | PRINT_BAT("ibat[3]", 534, 535); |
455 | 499 | ||
456 | PRINT_BAT("dbat[0]", 536, 537); |
500 | PRINT_BAT("dbat[0]", 536, 537); |
457 | PRINT_BAT("dbat[1]", 538, 539); |
501 | PRINT_BAT("dbat[1]", 538, 539); |
458 | PRINT_BAT("dbat[2]", 540, 541); |
502 | PRINT_BAT("dbat[2]", 540, 541); |
459 | PRINT_BAT("dbat[3]", 542, 543); |
503 | PRINT_BAT("dbat[3]", 542, 543); |
460 | } |
504 | } |
461 | 505 | ||
462 | /** @} |
506 | /** @} |
463 | */ |
507 | */ |
464 | 508 |