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1 | /* |
1 | /* |
2 | * Copyright (c) 2003-2004 Jakub Jermar |
2 | * Copyright (c) 2003-2004 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup mips32 |
29 | /** @addtogroup mips32 |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <arch.h> |
35 | #include <arch.h> |
36 | #include <arch/cp0.h> |
36 | #include <arch/cp0.h> |
37 | #include <arch/exception.h> |
37 | #include <arch/exception.h> |
38 | #include <mm/as.h> |
38 | #include <mm/as.h> |
39 | 39 | ||
40 | #include <userspace.h> |
40 | #include <userspace.h> |
41 | #include <arch/console.h> |
41 | #include <arch/console.h> |
42 | #include <memstr.h> |
42 | #include <memstr.h> |
43 | #include <proc/thread.h> |
43 | #include <proc/thread.h> |
44 | #include <proc/uarg.h> |
44 | #include <proc/uarg.h> |
45 | #include <print.h> |
45 | #include <print.h> |
46 | #include <syscall/syscall.h> |
46 | #include <syscall/syscall.h> |
47 | #include <sysinfo/sysinfo.h> |
47 | #include <sysinfo/sysinfo.h> |
48 | 48 | ||
49 | #include <arch/interrupt.h> |
49 | #include <arch/interrupt.h> |
50 | #include <console/chardev.h> |
50 | #include <console/chardev.h> |
51 | #include <arch/barrier.h> |
51 | #include <arch/barrier.h> |
52 | #include <arch/debugger.h> |
52 | #include <arch/debugger.h> |
53 | #include <genarch/fb/fb.h> |
53 | #include <genarch/fb/fb.h> |
54 | #include <genarch/fb/visuals.h> |
54 | #include <genarch/fb/visuals.h> |
55 | #include <macros.h> |
55 | #include <macros.h> |
56 | #include <ddi/device.h> |
56 | #include <ddi/device.h> |
57 | #include <config.h> |
57 | #include <config.h> |
58 | #include <string.h> |
58 | #include <string.h> |
- | 59 | #include <arch/drivers/msim.h> |
|
59 | 60 | ||
60 | #include <arch/asm/regname.h> |
61 | #include <arch/asm/regname.h> |
61 | 62 | ||
62 | /* Size of the code jumping to the exception handler code |
63 | /* Size of the code jumping to the exception handler code |
63 | * - J+NOP |
64 | * - J+NOP |
64 | */ |
65 | */ |
65 | #define EXCEPTION_JUMP_SIZE 8 |
66 | #define EXCEPTION_JUMP_SIZE 8 |
66 | 67 | ||
67 | #define TLB_EXC ((char *) 0x80000000) |
68 | #define TLB_EXC ((char *) 0x80000000) |
68 | #define NORM_EXC ((char *) 0x80000180) |
69 | #define NORM_EXC ((char *) 0x80000180) |
69 | #define CACHE_EXC ((char *) 0x80000100) |
70 | #define CACHE_EXC ((char *) 0x80000100) |
70 | 71 | ||
71 | 72 | ||
72 | /* Why the linker moves the variable 64K away in assembler |
73 | /* Why the linker moves the variable 64K away in assembler |
73 | * when not in .text section? |
74 | * when not in .text section? |
74 | */ |
75 | */ |
75 | 76 | ||
76 | /* Stack pointer saved when entering user mode */ |
77 | /* Stack pointer saved when entering user mode */ |
77 | uintptr_t supervisor_sp __attribute__ ((section (".text"))); |
78 | uintptr_t supervisor_sp __attribute__ ((section (".text"))); |
78 | 79 | ||
79 | count_t cpu_count = 0; |
80 | count_t cpu_count = 0; |
80 | 81 | ||
81 | /** Performs mips32-specific initialization before main_bsp() is called. */ |
82 | /** Performs mips32-specific initialization before main_bsp() is called. */ |
82 | void arch_pre_main(void *entry __attribute__((unused)), bootinfo_t *bootinfo) |
83 | void arch_pre_main(void *entry __attribute__((unused)), bootinfo_t *bootinfo) |
83 | { |
84 | { |
84 | /* Setup usermode */ |
85 | /* Setup usermode */ |
85 | init.cnt = bootinfo->cnt; |
86 | init.cnt = bootinfo->cnt; |
86 | 87 | ||
87 | count_t i; |
88 | count_t i; |
88 | for (i = 0; i < min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS); i++) { |
89 | for (i = 0; i < min3(bootinfo->cnt, TASKMAP_MAX_RECORDS, CONFIG_INIT_TASKS); i++) { |
89 | init.tasks[i].addr = bootinfo->tasks[i].addr; |
90 | init.tasks[i].addr = bootinfo->tasks[i].addr; |
90 | init.tasks[i].size = bootinfo->tasks[i].size; |
91 | init.tasks[i].size = bootinfo->tasks[i].size; |
91 | strncpy(init.tasks[i].name, bootinfo->tasks[i].name, |
92 | strncpy(init.tasks[i].name, bootinfo->tasks[i].name, |
92 | CONFIG_TASK_NAME_BUFLEN); |
93 | CONFIG_TASK_NAME_BUFLEN); |
93 | } |
94 | } |
94 | 95 | ||
95 | for (i = 0; i < CPUMAP_MAX_RECORDS; i++) { |
96 | for (i = 0; i < CPUMAP_MAX_RECORDS; i++) { |
96 | if ((bootinfo->cpumap & (1 << i)) != 0) |
97 | if ((bootinfo->cpumap & (1 << i)) != 0) |
97 | cpu_count++; |
98 | cpu_count++; |
98 | } |
99 | } |
99 | } |
100 | } |
100 | 101 | ||
101 | void arch_pre_mm_init(void) |
102 | void arch_pre_mm_init(void) |
102 | { |
103 | { |
103 | /* It is not assumed by default */ |
104 | /* It is not assumed by default */ |
104 | interrupts_disable(); |
105 | interrupts_disable(); |
105 | 106 | ||
106 | /* Initialize dispatch table */ |
107 | /* Initialize dispatch table */ |
107 | exception_init(); |
108 | exception_init(); |
108 | 109 | ||
109 | /* Copy the exception vectors to the right places */ |
110 | /* Copy the exception vectors to the right places */ |
110 | memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE); |
111 | memcpy(TLB_EXC, (char *) tlb_refill_entry, EXCEPTION_JUMP_SIZE); |
111 | smc_coherence_block(TLB_EXC, EXCEPTION_JUMP_SIZE); |
112 | smc_coherence_block(TLB_EXC, EXCEPTION_JUMP_SIZE); |
112 | memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE); |
113 | memcpy(NORM_EXC, (char *) exception_entry, EXCEPTION_JUMP_SIZE); |
113 | smc_coherence_block(NORM_EXC, EXCEPTION_JUMP_SIZE); |
114 | smc_coherence_block(NORM_EXC, EXCEPTION_JUMP_SIZE); |
114 | memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE); |
115 | memcpy(CACHE_EXC, (char *) cache_error_entry, EXCEPTION_JUMP_SIZE); |
115 | smc_coherence_block(CACHE_EXC, EXCEPTION_JUMP_SIZE); |
116 | smc_coherence_block(CACHE_EXC, EXCEPTION_JUMP_SIZE); |
116 | 117 | ||
117 | /* |
118 | /* |
118 | * Switch to BEV normal level so that exception vectors point to the |
119 | * Switch to BEV normal level so that exception vectors point to the |
119 | * kernel. Clear the error level. |
120 | * kernel. Clear the error level. |
120 | */ |
121 | */ |
121 | cp0_status_write(cp0_status_read() & |
122 | cp0_status_write(cp0_status_read() & |
122 | ~(cp0_status_bev_bootstrap_bit | cp0_status_erl_error_bit)); |
123 | ~(cp0_status_bev_bootstrap_bit | cp0_status_erl_error_bit)); |
123 | 124 | ||
124 | /* |
125 | /* |
125 | * Mask all interrupts |
126 | * Mask all interrupts |
126 | */ |
127 | */ |
127 | cp0_mask_all_int(); |
128 | cp0_mask_all_int(); |
128 | 129 | ||
129 | debugger_init(); |
130 | debugger_init(); |
130 | } |
131 | } |
131 | 132 | ||
132 | void arch_post_mm_init(void) |
133 | void arch_post_mm_init(void) |
133 | { |
134 | { |
134 | interrupt_init(); |
135 | interrupt_init(); |
135 | console_init(device_assign_devno()); |
136 | msim_console(device_assign_devno()); |
136 | #ifdef CONFIG_FB |
137 | #ifdef CONFIG_FB |
137 | /* GXemul framebuffer */ |
138 | /* GXemul framebuffer */ |
138 | fb_properties_t gxemul_prop = { |
139 | fb_properties_t gxemul_prop = { |
139 | .addr = 0x12000000, |
140 | .addr = 0x12000000, |
140 | .offset = 0, |
141 | .offset = 0, |
141 | .x = 640, |
142 | .x = 640, |
142 | .y = 480, |
143 | .y = 480, |
143 | .scan = 1920, |
144 | .scan = 1920, |
144 | .visual = VISUAL_BGR_8_8_8, |
145 | .visual = VISUAL_BGR_8_8_8, |
145 | }; |
146 | }; |
146 | fb_init(&gxemul_prop); |
147 | fb_init(&gxemul_prop); |
147 | #endif |
148 | #endif |
148 | 149 | ||
149 | #ifdef MACHINE_msim |
150 | #ifdef MACHINE_msim |
150 | sysinfo_set_item_val("machine.msim", NULL, 1); |
151 | sysinfo_set_item_val("machine.msim", NULL, 1); |
151 | #endif |
152 | #endif |
152 | 153 | ||
153 | #ifdef MACHINE_simics |
154 | #ifdef MACHINE_simics |
154 | sysinfo_set_item_val("machine.simics", NULL, 1); |
155 | sysinfo_set_item_val("machine.simics", NULL, 1); |
155 | #endif |
156 | #endif |
156 | 157 | ||
157 | #ifdef MACHINE_bgxemul |
158 | #ifdef MACHINE_bgxemul |
158 | sysinfo_set_item_val("machine.bgxemul", NULL, 1); |
159 | sysinfo_set_item_val("machine.bgxemul", NULL, 1); |
159 | #endif |
160 | #endif |
160 | 161 | ||
161 | #ifdef MACHINE_lgxemul |
162 | #ifdef MACHINE_lgxemul |
162 | sysinfo_set_item_val("machine.lgxemul", NULL, 1); |
163 | sysinfo_set_item_val("machine.lgxemul", NULL, 1); |
163 | #endif |
164 | #endif |
164 | } |
165 | } |
165 | 166 | ||
166 | void arch_post_cpu_init(void) |
167 | void arch_post_cpu_init(void) |
167 | { |
168 | { |
168 | } |
169 | } |
169 | 170 | ||
170 | void arch_pre_smp_init(void) |
171 | void arch_pre_smp_init(void) |
171 | { |
172 | { |
172 | } |
173 | } |
173 | 174 | ||
174 | void arch_post_smp_init(void) |
175 | void arch_post_smp_init(void) |
175 | { |
176 | { |
176 | } |
177 | } |
177 | 178 | ||
178 | void calibrate_delay_loop(void) |
179 | void calibrate_delay_loop(void) |
179 | { |
180 | { |
180 | } |
181 | } |
181 | 182 | ||
182 | void userspace(uspace_arg_t *kernel_uarg) |
183 | void userspace(uspace_arg_t *kernel_uarg) |
183 | { |
184 | { |
184 | /* EXL = 1, UM = 1, IE = 1 */ |
185 | /* EXL = 1, UM = 1, IE = 1 */ |
185 | cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit | |
186 | cp0_status_write(cp0_status_read() | (cp0_status_exl_exception_bit | |
186 | cp0_status_um_bit | cp0_status_ie_enabled_bit)); |
187 | cp0_status_um_bit | cp0_status_ie_enabled_bit)); |
187 | cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry); |
188 | cp0_epc_write((uintptr_t) kernel_uarg->uspace_entry); |
188 | userspace_asm(((uintptr_t) kernel_uarg->uspace_stack + PAGE_SIZE), |
189 | userspace_asm(((uintptr_t) kernel_uarg->uspace_stack + PAGE_SIZE), |
189 | (uintptr_t) kernel_uarg->uspace_uarg, |
190 | (uintptr_t) kernel_uarg->uspace_uarg, |
190 | (uintptr_t) kernel_uarg->uspace_entry); |
191 | (uintptr_t) kernel_uarg->uspace_entry); |
191 | 192 | ||
192 | while (1); |
193 | while (1); |
193 | } |
194 | } |
194 | 195 | ||
195 | /** Perform mips32 specific tasks needed before the new task is run. */ |
196 | /** Perform mips32 specific tasks needed before the new task is run. */ |
196 | void before_task_runs_arch(void) |
197 | void before_task_runs_arch(void) |
197 | { |
198 | { |
198 | } |
199 | } |
199 | 200 | ||
200 | /** Perform mips32 specific tasks needed before the new thread is scheduled. */ |
201 | /** Perform mips32 specific tasks needed before the new thread is scheduled. */ |
201 | void before_thread_runs_arch(void) |
202 | void before_thread_runs_arch(void) |
202 | { |
203 | { |
203 | supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE - |
204 | supervisor_sp = (uintptr_t) &THREAD->kstack[THREAD_STACK_SIZE - |
204 | SP_DELTA]; |
205 | SP_DELTA]; |
205 | } |
206 | } |
206 | 207 | ||
207 | void after_thread_ran_arch(void) |
208 | void after_thread_ran_arch(void) |
208 | { |
209 | { |
209 | } |
210 | } |
210 | 211 | ||
211 | /** Set thread-local-storage pointer |
212 | /** Set thread-local-storage pointer |
212 | * |
213 | * |
213 | * We have it currently in K1, it is |
214 | * We have it currently in K1, it is |
214 | * possible to have it separately in the future. |
215 | * possible to have it separately in the future. |
215 | */ |
216 | */ |
216 | unative_t sys_tls_set(unative_t addr) |
217 | unative_t sys_tls_set(unative_t addr) |
217 | { |
218 | { |
218 | return 0; |
219 | return 0; |
219 | } |
220 | } |
220 | 221 | ||
221 | void arch_reboot(void) |
222 | void arch_reboot(void) |
222 | { |
223 | { |
223 | ___halt(); |
224 | ___halt(); |
224 | 225 | ||
225 | while (1); |
226 | while (1); |
226 | } |
227 | } |
227 | 228 | ||
228 | /** Construct function pointer |
229 | /** Construct function pointer |
229 | * |
230 | * |
230 | * @param fptr function pointer structure |
231 | * @param fptr function pointer structure |
231 | * @param addr function address |
232 | * @param addr function address |
232 | * @param caller calling function address |
233 | * @param caller calling function address |
233 | * |
234 | * |
234 | * @return address of the function pointer |
235 | * @return address of the function pointer |
235 | * |
236 | * |
236 | */ |
237 | */ |
237 | void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller) |
238 | void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller) |
238 | { |
239 | { |
239 | return addr; |
240 | return addr; |
240 | } |
241 | } |
241 | 242 | ||
242 | /** @} |
243 | /** @} |
243 | */ |
244 | */ |
244 | 245 |