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1 | /* |
1 | /* |
2 | * Copyright (c) 2005 Ondrej Palkovsky |
2 | * Copyright (c) 2005 Ondrej Palkovsky |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup mips32 |
29 | /** @addtogroup mips32 |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <interrupt.h> |
35 | #include <interrupt.h> |
36 | #include <ipc/irq.h> |
36 | #include <ipc/irq.h> |
37 | #include <console/chardev.h> |
37 | #include <console/chardev.h> |
38 | #include <arch/drivers/msim.h> |
38 | #include <arch/drivers/msim.h> |
39 | #include <arch/cp0.h> |
39 | #include <arch/cp0.h> |
40 | #include <console/console.h> |
40 | #include <console/console.h> |
41 | #include <sysinfo/sysinfo.h> |
41 | #include <sysinfo/sysinfo.h> |
42 | 42 | ||
43 | /** Address of devices. */ |
- | |
44 | #define MSIM_VIDEORAM 0xB0000000 |
- | |
45 | #define MSIM_KBD_ADDRESS 0xB0000000 |
- | |
46 | #define MSIM_KBD_IRQ 2 |
- | |
47 | - | ||
48 | static chardev_t console; |
43 | static chardev_t console; |
49 | static irq_t msim_irq; |
44 | static irq_t msim_irq; |
50 | 45 | ||
51 | static void msim_write(chardev_t *dev, const char ch); |
46 | static void msim_write(chardev_t *dev, const char ch); |
52 | static void msim_enable(chardev_t *dev); |
47 | static void msim_enable(chardev_t *dev); |
53 | static void msim_disable(chardev_t *dev); |
48 | static void msim_disable(chardev_t *dev); |
54 | static char msim_do_read(chardev_t *dev); |
49 | static char msim_do_read(chardev_t *dev); |
55 | 50 | ||
56 | static chardev_operations_t msim_ops = { |
51 | static chardev_operations_t msim_ops = { |
57 | .resume = msim_enable, |
52 | .resume = msim_enable, |
58 | .suspend = msim_disable, |
53 | .suspend = msim_disable, |
59 | .write = msim_write, |
54 | .write = msim_write, |
60 | .read = msim_do_read, |
55 | .read = msim_do_read, |
61 | }; |
56 | }; |
62 | 57 | ||
63 | /** Putchar that works with MSIM & gxemul */ |
58 | /** Putchar that works with MSIM & gxemul */ |
64 | void msim_write(chardev_t *dev, const char ch) |
59 | void msim_write(chardev_t *dev, const char ch) |
65 | { |
60 | { |
66 | *((char *) MSIM_VIDEORAM) = ch; |
61 | *((char *) MSIM_VIDEORAM) = ch; |
67 | } |
62 | } |
68 | 63 | ||
69 | /* Called from getc(). */ |
64 | /* Called from getc(). */ |
70 | void msim_enable(chardev_t *dev) |
65 | void msim_enable(chardev_t *dev) |
71 | { |
66 | { |
72 | cp0_unmask_int(MSIM_KBD_IRQ); |
67 | cp0_unmask_int(MSIM_KBD_IRQ); |
73 | } |
68 | } |
74 | 69 | ||
75 | /* Called from getc(). */ |
70 | /* Called from getc(). */ |
76 | void msim_disable(chardev_t *dev) |
71 | void msim_disable(chardev_t *dev) |
77 | { |
72 | { |
78 | cp0_mask_int(MSIM_KBD_IRQ); |
73 | cp0_mask_int(MSIM_KBD_IRQ); |
79 | } |
74 | } |
80 | 75 | ||
81 | #include <print.h> |
76 | #include <print.h> |
82 | /** Read character using polling, assume interrupts disabled */ |
77 | /** Read character using polling, assume interrupts disabled */ |
83 | static char msim_do_read(chardev_t *dev) |
78 | static char msim_do_read(chardev_t *dev) |
84 | { |
79 | { |
85 | char ch; |
80 | char ch; |
86 | 81 | ||
87 | while (1) { |
82 | while (1) { |
88 | ch = *((volatile char *) MSIM_KBD_ADDRESS); |
83 | ch = *((volatile char *) MSIM_KBD_ADDRESS); |
89 | if (ch) { |
84 | if (ch) { |
90 | if (ch == '\r') |
85 | if (ch == '\r') |
91 | return '\n'; |
86 | return '\n'; |
92 | if (ch == 0x7f) |
87 | if (ch == 0x7f) |
93 | return '\b'; |
88 | return '\b'; |
94 | return ch; |
89 | return ch; |
95 | } |
90 | } |
96 | } |
91 | } |
97 | } |
92 | } |
98 | 93 | ||
99 | /** Process keyboard interrupt. */ |
94 | /** Process keyboard interrupt. */ |
100 | static void msim_irq_handler(irq_t *irq, void *arg, ...) |
95 | static void msim_irq_handler(irq_t *irq, void *arg, ...) |
101 | { |
96 | { |
102 | if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox)) |
97 | if ((irq->notif_cfg.notify) && (irq->notif_cfg.answerbox)) |
103 | ipc_irq_send_notif(irq); |
98 | ipc_irq_send_notif(irq); |
104 | else { |
99 | else { |
105 | char ch = 0; |
100 | char ch = 0; |
106 | 101 | ||
107 | ch = *((char *) MSIM_KBD_ADDRESS); |
102 | ch = *((char *) MSIM_KBD_ADDRESS); |
108 | if (ch =='\r') |
103 | if (ch =='\r') |
109 | ch = '\n'; |
104 | ch = '\n'; |
110 | if (ch == 0x7f) |
105 | if (ch == 0x7f) |
111 | ch = '\b'; |
106 | ch = '\b'; |
112 | chardev_push_character(&console, ch); |
107 | chardev_push_character(&console, ch); |
113 | } |
108 | } |
114 | } |
109 | } |
115 | 110 | ||
116 | static irq_ownership_t msim_claim(void) |
111 | static irq_ownership_t msim_claim(void) |
117 | { |
112 | { |
118 | return IRQ_ACCEPT; |
113 | return IRQ_ACCEPT; |
119 | } |
114 | } |
120 | 115 | ||
121 | void msim_kbd_grab(void) |
116 | void msim_kbd_grab(void) |
122 | { |
117 | { |
123 | ipl_t ipl = interrupts_disable(); |
118 | ipl_t ipl = interrupts_disable(); |
124 | spinlock_lock(&msim_irq.lock); |
119 | spinlock_lock(&msim_irq.lock); |
125 | msim_irq.notif_cfg.notify = false; |
120 | msim_irq.notif_cfg.notify = false; |
126 | spinlock_unlock(&msim_irq.lock); |
121 | spinlock_unlock(&msim_irq.lock); |
127 | interrupts_restore(ipl); |
122 | interrupts_restore(ipl); |
128 | } |
123 | } |
129 | 124 | ||
130 | void msim_kbd_release(void) |
125 | void msim_kbd_release(void) |
131 | { |
126 | { |
132 | ipl_t ipl = interrupts_disable(); |
127 | ipl_t ipl = interrupts_disable(); |
133 | spinlock_lock(&msim_irq.lock); |
128 | spinlock_lock(&msim_irq.lock); |
134 | if (msim_irq.notif_cfg.answerbox) |
129 | if (msim_irq.notif_cfg.answerbox) |
135 | msim_irq.notif_cfg.notify = true; |
130 | msim_irq.notif_cfg.notify = true; |
136 | spinlock_unlock(&msim_irq.lock); |
131 | spinlock_unlock(&msim_irq.lock); |
137 | interrupts_restore(ipl); |
132 | interrupts_restore(ipl); |
138 | } |
133 | } |
139 | 134 | ||
140 | 135 | ||
141 | /* Return console object representing msim console */ |
136 | /* Return console object representing msim console */ |
142 | void msim_console(devno_t devno) |
137 | void msim_console(devno_t devno) |
143 | { |
138 | { |
144 | chardev_initialize("msim_console", &console, &msim_ops); |
139 | chardev_initialize("msim_console", &console, &msim_ops); |
145 | stdin = &console; |
140 | stdin = &console; |
146 | stdout = &console; |
141 | stdout = &console; |
147 | 142 | ||
148 | irq_initialize(&msim_irq); |
143 | irq_initialize(&msim_irq); |
149 | msim_irq.devno = devno; |
144 | msim_irq.devno = devno; |
150 | msim_irq.inr = MSIM_KBD_IRQ; |
145 | msim_irq.inr = MSIM_KBD_IRQ; |
151 | msim_irq.claim = msim_claim; |
146 | msim_irq.claim = msim_claim; |
152 | msim_irq.handler = msim_irq_handler; |
147 | msim_irq.handler = msim_irq_handler; |
153 | irq_register(&msim_irq); |
148 | irq_register(&msim_irq); |
154 | 149 | ||
155 | cp0_unmask_int(MSIM_KBD_IRQ); |
150 | cp0_unmask_int(MSIM_KBD_IRQ); |
156 | 151 | ||
157 | sysinfo_set_item_val("kbd", NULL, true); |
152 | sysinfo_set_item_val("kbd", NULL, true); |
158 | sysinfo_set_item_val("kbd.devno", NULL, devno); |
153 | sysinfo_set_item_val("kbd.devno", NULL, devno); |
159 | sysinfo_set_item_val("kbd.inr", NULL, MSIM_KBD_IRQ); |
154 | sysinfo_set_item_val("kbd.inr", NULL, MSIM_KBD_IRQ); |
160 | sysinfo_set_item_val("kbd.address.virtual", NULL, MSIM_KBD_ADDRESS); |
155 | sysinfo_set_item_val("kbd.address.virtual", NULL, MSIM_KBD_ADDRESS); |
161 | } |
156 | } |
162 | 157 | ||
163 | /** @} |
158 | /** @} |
164 | */ |
159 | */ |
165 | 160 |