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1 | /* |
1 | /* |
2 | * Copyright (C) 2003-2004 Jakub Jermar |
2 | * Copyright (C) 2003-2004 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | #ifndef __mips32_TLB_H__ |
29 | #ifndef __mips32_TLB_H__ |
30 | #define __mips32_TLB_H__ |
30 | #define __mips32_TLB_H__ |
31 | 31 | ||
32 | #include <arch/exception.h> |
32 | #include <arch/exception.h> |
33 | 33 | ||
34 | #define TLB_SIZE 48 |
34 | #define TLB_SIZE 48 |
35 | 35 | ||
36 | #define TLB_WIRED 1 |
36 | #define TLB_WIRED 1 |
37 | #define TLB_KSTACK_WIRED_INDEX 0 |
37 | #define TLB_KSTACK_WIRED_INDEX 0 |
38 | 38 | ||
39 | #define TLB_PAGE_MASK_16K (0x3<<13) |
39 | #define TLB_PAGE_MASK_16K (0x3<<13) |
40 | 40 | ||
41 | #define PAGE_UNCACHED 2 |
41 | #define PAGE_UNCACHED 2 |
42 | #define PAGE_CACHEABLE_EXC_WRITE 5 |
42 | #define PAGE_CACHEABLE_EXC_WRITE 5 |
43 | 43 | ||
44 | union entry_lo { |
44 | union entry_lo { |
45 | struct { |
45 | struct { |
46 | unsigned g : 1; /* global bit */ |
46 | unsigned g : 1; /* global bit */ |
47 | unsigned v : 1; /* valid bit */ |
47 | unsigned v : 1; /* valid bit */ |
48 | unsigned d : 1; /* dirty/write-protect bit */ |
48 | unsigned d : 1; /* dirty/write-protect bit */ |
49 | unsigned c : 3; /* cache coherency attribute */ |
49 | unsigned c : 3; /* cache coherency attribute */ |
50 | unsigned pfn : 24; /* frame number */ |
50 | unsigned pfn : 24; /* frame number */ |
51 | unsigned zero: 2; /* zero */ |
51 | unsigned : 2; /* zero */ |
52 | } __attribute__ ((packed)); |
52 | } __attribute__ ((packed)); |
53 | __u32 value; |
53 | __u32 value; |
54 | }; |
54 | }; |
55 | 55 | ||
56 | struct pte { |
56 | struct pte { |
57 | unsigned g : 1; /* global bit */ |
57 | unsigned g : 1; /* global bit */ |
58 | unsigned v : 1; /* valid bit */ |
58 | unsigned v : 1; /* valid bit */ |
59 | unsigned d : 1; /* dirty/write-protect bit */ |
59 | unsigned d : 1; /* dirty/write-protect bit */ |
60 | unsigned c : 3; /* cache coherency attribute */ |
60 | unsigned c : 3; /* cache coherency attribute */ |
61 | unsigned pfn : 24; /* frame number */ |
61 | unsigned pfn : 24; /* frame number */ |
62 | unsigned w : 1; /* writable */ |
62 | unsigned w : 1; /* writable */ |
63 | unsigned a : 1; /* accessed */ |
63 | unsigned a : 1; /* accessed */ |
64 | } __attribute__ ((packed)); |
64 | } __attribute__ ((packed)); |
65 | 65 | ||
66 | union entry_hi { |
66 | union entry_hi { |
67 | struct { |
67 | struct { |
68 | unsigned asid : 8; |
68 | unsigned asid : 8; |
69 | unsigned : 5; |
69 | unsigned : 5; |
70 | unsigned vpn2 : 19; |
70 | unsigned vpn2 : 19; |
71 | } __attribute__ ((packed)); |
71 | } __attribute__ ((packed)); |
72 | __u32 value; |
72 | __u32 value; |
73 | }; |
73 | }; |
74 | 74 | ||
75 | union page_mask { |
75 | union page_mask { |
76 | struct { |
76 | struct { |
77 | unsigned : 13; |
77 | unsigned : 13; |
78 | unsigned mask : 12; |
78 | unsigned mask : 12; |
79 | unsigned : 7; |
79 | unsigned : 7; |
80 | } __attribute__ ((packed)); |
80 | } __attribute__ ((packed)); |
81 | __u32 value; |
81 | __u32 value; |
82 | }; |
82 | }; |
83 | 83 | ||
84 | union index { |
84 | union index { |
85 | struct { |
85 | struct { |
86 | unsigned index : 4; |
86 | unsigned index : 4; |
87 | unsigned : 27; |
87 | unsigned : 27; |
88 | unsigned p : 1; |
88 | unsigned p : 1; |
89 | } __attribute__ ((packed)); |
89 | } __attribute__ ((packed)); |
90 | __u32 value; |
90 | __u32 value; |
91 | }; |
91 | }; |
92 | 92 | ||
93 | typedef union entry_lo entry_lo_t; |
93 | typedef union entry_lo entry_lo_t; |
94 | typedef union entry_hi entry_hi_t; |
94 | typedef union entry_hi entry_hi_t; |
95 | typedef union page_mask page_mask_t; |
95 | typedef union page_mask page_mask_t; |
96 | typedef union index tlb_index_t; |
96 | typedef union index tlb_index_t; |
97 | 97 | ||
98 | /** Probe TLB for Matching Entry |
98 | /** Probe TLB for Matching Entry |
99 | * |
99 | * |
100 | * Probe TLB for Matching Entry. |
100 | * Probe TLB for Matching Entry. |
101 | */ |
101 | */ |
102 | static inline void tlbp(void) |
102 | static inline void tlbp(void) |
103 | { |
103 | { |
104 | __asm__ volatile ("tlbp\n\t"); |
104 | __asm__ volatile ("tlbp\n\t"); |
105 | } |
105 | } |
106 | 106 | ||
107 | 107 | ||
108 | /** Read Indexed TLB Entry |
108 | /** Read Indexed TLB Entry |
109 | * |
109 | * |
110 | * Read Indexed TLB Entry. |
110 | * Read Indexed TLB Entry. |
111 | */ |
111 | */ |
112 | static inline void tlbr(void) |
112 | static inline void tlbr(void) |
113 | { |
113 | { |
114 | __asm__ volatile ("tlbr\n\t"); |
114 | __asm__ volatile ("tlbr\n\t"); |
115 | } |
115 | } |
116 | 116 | ||
117 | /** Write Indexed TLB Entry |
117 | /** Write Indexed TLB Entry |
118 | * |
118 | * |
119 | * Write Indexed TLB Entry. |
119 | * Write Indexed TLB Entry. |
120 | */ |
120 | */ |
121 | static inline void tlbwi(void) |
121 | static inline void tlbwi(void) |
122 | { |
122 | { |
123 | __asm__ volatile ("tlbwi\n\t"); |
123 | __asm__ volatile ("tlbwi\n\t"); |
124 | } |
124 | } |
125 | 125 | ||
126 | /** Write Random TLB Entry |
126 | /** Write Random TLB Entry |
127 | * |
127 | * |
128 | * Write Random TLB Entry. |
128 | * Write Random TLB Entry. |
129 | */ |
129 | */ |
130 | static inline void tlbwr(void) |
130 | static inline void tlbwr(void) |
131 | { |
131 | { |
132 | __asm__ volatile ("tlbwr\n\t"); |
132 | __asm__ volatile ("tlbwr\n\t"); |
133 | } |
133 | } |
134 | 134 | ||
135 | extern void tlb_invalid(struct exception_regdump *pstate); |
135 | extern void tlb_invalid(struct exception_regdump *pstate); |
136 | extern void tlb_refill(struct exception_regdump *pstate); |
136 | extern void tlb_refill(struct exception_regdump *pstate); |
137 | extern void tlb_modified(struct exception_regdump *pstate); |
137 | extern void tlb_modified(struct exception_regdump *pstate); |
138 | 138 | ||
139 | #endif |
139 | #endif |
140 | 140 |