WebSVN – HelenOS – Diff – /trunk/kernel/arch/ia64/src/mm/page.c


/*
 * Copyright (c) 2006 Jakub Jermar
 * Copyright (c) 2006 Jakub Vana
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 *
 * - Redistributions of source code must retain the above copyright
 *   notice, this list of conditions and the following disclaimer.
 * - Redistributions in binary form must reproduce the above copyright
 *   notice, this list of conditions and the following disclaimer in the
 *   documentation and/or other materials provided with the distribution.
 * - The name of the author may not be used to endorse or promote products
 *   derived from this software without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
/** @addtogroup ia64mm
 * @{
 */
/** @file
 */
 
#include <arch/mm/page.h>
#include <genarch/mm/page_ht.h>
#include <mm/asid.h>
#include <arch/mm/asid.h>
#include <arch/mm/vhpt.h>
#include <arch/types.h>
#include <print.h>
#include <mm/page.h>
#include <mm/frame.h>
#include <config.h>
#include <panic.h>
#include <arch/asm.h>
#include <arch/barrier.h>
#include <memstr.h>
#include <align.h>
#include <ddi/ddi.h>
 
/** Physical memory area for devices. */
static parea_t dev_area;
 
static void set_environment(void);
 
/** Initialize ia64 virtual address translation subsystem. */
void page_arch_init(void)
{
    page_mapping_operations = &ht_mapping_operations;
    pk_disable();
    set_environment();
}
 
/** Initialize VHPT and region registers. */
void set_environment(void)
{
    region_register rr;
    pta_register pta;  
    int i;
#ifdef CONFIG_VHPT  
    uintptr_t vhpt_base;
#endif
 
    /*
     * First set up kernel region register.
     * This is redundant (see start.S) but we keep it here just for sure.
     */
    rr.word = rr_read(VRN_KERNEL);
    rr.map.ve = 0;                  /* disable VHPT walker */
    rr.map.ps = PAGE_WIDTH;
    rr.map.rid = ASID2RID(ASID_KERNEL, VRN_KERNEL);
    rr_write(VRN_KERNEL, rr.word);
    srlz_i();
    srlz_d();
 
    /*
     * And setup the rest of region register.
     */
    for(i = 0; i < REGION_REGISTERS; i++) {
        /* skip kernel rr */
        if (i == VRN_KERNEL)
            continue;
   
        rr.word = rr_read(i);
        rr.map.ve = 0;      /* disable VHPT walker */
        rr.map.rid = RID_KERNEL;
        rr.map.ps = PAGE_WIDTH;
        rr_write(i, rr.word);
        srlz_i();
        srlz_d();
    }
 
#ifdef CONFIG_VHPT  
    vhpt_base = vhpt_set_up();
#endif
    /*
     * Set up PTA register.
     */
    pta.word = pta_read();
#ifndef CONFIG_VHPT
    pta.map.ve = 0;                   /* disable VHPT walker */
    pta.map.base = 0 >> PTA_BASE_SHIFT;
#else
    pta.map.ve = 1;                   /* enable VHPT walker */
    pta.map.base = vhpt_base >> PTA_BASE_SHIFT;
#endif
    pta.map.vf = 1;                   /* large entry format */
    pta.map.size = VHPT_WIDTH;
    pta_write(pta.word);
    srlz_i();
    srlz_d();
}
 
/** Calculate address of collision chain from VPN and ASID.
 *
 * Interrupts must be disabled.
 *
 * @param page      Address of virtual page including VRN bits.
 * @param asid      Address space identifier.
 *
 * @return      VHPT entry address.
 */
vhpt_entry_t *vhpt_hash(uintptr_t page, asid_t asid)
{
    region_register rr_save, rr;
    index_t vrn;
    rid_t rid;
    vhpt_entry_t *v;
 
    vrn = page >> VRN_SHIFT;
    rid = ASID2RID(asid, vrn);
   
    rr_save.word = rr_read(vrn);
    if (rr_save.map.rid == rid) {
        /*
         * The RID is already in place, compute thash and return.
         */
        v = (vhpt_entry_t *) thash(page);
        return v;
    }
   
    /*
     * The RID must be written to some region register.
     * To speed things up, register indexed by vrn is used.
     */
    rr.word = rr_save.word;
    rr.map.rid = rid;
    rr_write(vrn, rr.word);
    srlz_i();
    v = (vhpt_entry_t *) thash(page);
    rr_write(vrn, rr_save.word);
    srlz_i();
    srlz_d();
 
    return v;
}
 
/** Compare ASID and VPN against PTE.
 *
 * Interrupts must be disabled.
 *
 * @param page      Address of virtual page including VRN bits.
 * @param asid      Address space identifier.
 *
 * @return      True if page and asid match the page and asid of t,
 *          false otherwise.
 */
bool vhpt_compare(uintptr_t page, asid_t asid, vhpt_entry_t *v)
{
    region_register rr_save, rr;   
    index_t vrn;
    rid_t rid;
    bool match;
 
    ASSERT(v);
 
    vrn = page >> VRN_SHIFT;
    rid = ASID2RID(asid, vrn);
   
    rr_save.word = rr_read(vrn);
    if (rr_save.map.rid == rid) {
        /*
         * The RID is already in place, compare ttag with t and return.
         */
        return ttag(page) == v->present.tag.tag_word;
    }
   
    /*
     * The RID must be written to some region register.
     * To speed things up, register indexed by vrn is used.
     */
    rr.word = rr_save.word;
    rr.map.rid = rid;
    rr_write(vrn, rr.word);
    srlz_i();
    match = (ttag(page) == v->present.tag.tag_word);
    rr_write(vrn, rr_save.word);
    srlz_i();
    srlz_d();
 
    return match;      
}
 
/** Set up one VHPT entry.
 *
 * @param v VHPT entry to be set up.
 * @param page      Virtual address of the page mapped by the entry.
 * @param asid      Address space identifier of the address space to which
 *          page belongs.
 * @param frame     Physical address of the frame to wich page is mapped.
 * @param flags     Different flags for the mapping.
 */
void
vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame,
    int flags)
{
    region_register rr_save, rr;   
    index_t vrn;
    rid_t rid;
    uint64_t tag;
 
    ASSERT(v);
 
    vrn = page >> VRN_SHIFT;
    rid = ASID2RID(asid, vrn);
   
    /*
     * Compute ttag.
     */
    rr_save.word = rr_read(vrn);
    rr.word = rr_save.word;
    rr.map.rid = rid;
    rr_write(vrn, rr.word);
    srlz_i();
    tag = ttag(page);
    rr_write(vrn, rr_save.word);
    srlz_i();
    srlz_d();
   
    /*
     * Clear the entry.
     */
    v->word[0] = 0;
    v->word[1] = 0;
    v->word[2] = 0;
    v->word[3] = 0;
   
    v->present.p = true;
    v->present.ma = (flags & PAGE_CACHEABLE) ?
        MA_WRITEBACK : MA_UNCACHEABLE;
    v->present.a = false;   /* not accessed */
    v->present.d = false;   /* not dirty */
    v->present.pl = (flags & PAGE_USER) ? PL_USER : PL_KERNEL;
    v->present.ar = (flags & PAGE_WRITE) ? AR_WRITE : AR_READ;
    v->present.ar |= (flags & PAGE_EXEC) ? AR_EXECUTE : 0;
    v->present.ppn = frame >> PPN_SHIFT;
    v->present.ed = false;  /* exception not deffered */
    v->present.ps = PAGE_WIDTH;
    v->present.key = 0;
    v->present.tag.tag_word = tag;
}
 
uintptr_t hw_map(uintptr_t physaddr, size_t size __attribute__ ((unused)))
{
    /* This is a dirty hack. */
    return PA2KA(physaddr);
}
 
void hw_area(void)
{
    dev_area.pbase = end_frame;
    dev_area.frames = SIZE2FRAMES(0x7fffffffffffffffUL - end_frame);
    ddi_parea_register(&dev_area);
}
 
/** @}
 */
 

Rev 3908	Rev 3940
1	/*	1	/*
2	* Copyright (c) 2006 Jakub Jermar	2	* Copyright (c) 2006 Jakub Jermar
3	* Copyright (c) 2006 Jakub Vana	3	* Copyright (c) 2006 Jakub Vana
4	* All rights reserved.	4	* All rights reserved.
5	*	5	*
6	* Redistribution and use in source and binary forms, with or without	6	* Redistribution and use in source and binary forms, with or without
7	* modification, are permitted provided that the following conditions	7	* modification, are permitted provided that the following conditions
8	* are met:	8	* are met:
9	*	9	*
10	* - Redistributions of source code must retain the above copyright	10	* - Redistributions of source code must retain the above copyright
11	* notice, this list of conditions and the following disclaimer.	11	* notice, this list of conditions and the following disclaimer.
12	* - Redistributions in binary form must reproduce the above copyright	12	* - Redistributions in binary form must reproduce the above copyright
13	* notice, this list of conditions and the following disclaimer in the	13	* notice, this list of conditions and the following disclaimer in the
14	* documentation and/or other materials provided with the distribution.	14	* documentation and/or other materials provided with the distribution.
15	* - The name of the author may not be used to endorse or promote products	15	* - The name of the author may not be used to endorse or promote products
16	* derived from this software without specific prior written permission.	16	* derived from this software without specific prior written permission.
17	*	17	*
18	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR	18	* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES	19	* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.	20	* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,	21	* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT	22	* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,	23	* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY	24	* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT	25	* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF	26	* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.	27	* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28	*/	28	*/
29		29
30	/** @addtogroup ia64mm	30	/** @addtogroup ia64mm
31	* @{	31	* @{
32	*/	32	*/
33	/** @file	33	/** @file
34	*/	34	*/
35		35
36	#include <arch/mm/page.h>	36	#include <arch/mm/page.h>
37	#include <genarch/mm/page_ht.h>	37	#include <genarch/mm/page_ht.h>
38	#include <mm/asid.h>	38	#include <mm/asid.h>
39	#include <arch/mm/asid.h>	39	#include <arch/mm/asid.h>
40	#include <arch/mm/vhpt.h>	40	#include <arch/mm/vhpt.h>
41	#include <arch/types.h>	41	#include <arch/types.h>
42	#include <print.h>	42	#include <print.h>
43	#include <mm/page.h>	43	#include <mm/page.h>
44	#include <mm/frame.h>	44	#include <mm/frame.h>
45	#include <config.h>	45	#include <config.h>
46	#include <panic.h>	46	#include <panic.h>
47	#include <arch/asm.h>	47	#include <arch/asm.h>
48	#include <arch/barrier.h>	48	#include <arch/barrier.h>
49	#include <memstr.h>	49	#include <memstr.h>
50	#include <align.h>	50	#include <align.h>
-		51	#include <ddi/ddi.h>
-		52
-		53	/** Physical memory area for devices. */
-		54	static parea_t dev_area;
51		55
52	static void set_environment(void);	56	static void set_environment(void);
53		57
54	/** Initialize ia64 virtual address translation subsystem. */	58	/** Initialize ia64 virtual address translation subsystem. */
55	void page_arch_init(void)	59	void page_arch_init(void)
56	{	60	{
57	page_mapping_operations = &ht_mapping_operations;	61	page_mapping_operations = &ht_mapping_operations;
58	pk_disable();	62	pk_disable();
59	set_environment();	63	set_environment();
60	}	64	}
61		65
62	/** Initialize VHPT and region registers. */	66	/** Initialize VHPT and region registers. */
63	void set_environment(void)	67	void set_environment(void)
64	{	68	{
65	region_register rr;	69	region_register rr;
66	pta_register pta;	70	pta_register pta;
67	int i;	71	int i;
68	#ifdef CONFIG_VHPT	72	#ifdef CONFIG_VHPT
69	uintptr_t vhpt_base;	73	uintptr_t vhpt_base;
70	#endif	74	#endif
71		75
72	/*	76	/*
73	* First set up kernel region register.	77	* First set up kernel region register.
74	* This is redundant (see start.S) but we keep it here just for sure.	78	* This is redundant (see start.S) but we keep it here just for sure.
75	*/	79	*/
76	rr.word = rr_read(VRN_KERNEL);	80	rr.word = rr_read(VRN_KERNEL);
77	rr.map.ve = 0; /* disable VHPT walker */	81	rr.map.ve = 0; /* disable VHPT walker */
78	rr.map.ps = PAGE_WIDTH;	82	rr.map.ps = PAGE_WIDTH;
79	rr.map.rid = ASID2RID(ASID_KERNEL, VRN_KERNEL);	83	rr.map.rid = ASID2RID(ASID_KERNEL, VRN_KERNEL);
80	rr_write(VRN_KERNEL, rr.word);	84	rr_write(VRN_KERNEL, rr.word);
81	srlz_i();	85	srlz_i();
82	srlz_d();	86	srlz_d();
83		87
84	/*	88	/*
85	* And setup the rest of region register.	89	* And setup the rest of region register.
86	*/	90	*/
87	for(i = 0; i < REGION_REGISTERS; i++) {	91	for(i = 0; i < REGION_REGISTERS; i++) {
88	/* skip kernel rr */	92	/* skip kernel rr */
89	if (i == VRN_KERNEL)	93	if (i == VRN_KERNEL)
90	continue;	94	continue;
91		95
92	rr.word = rr_read(i);	96	rr.word = rr_read(i);
93	rr.map.ve = 0; /* disable VHPT walker */	97	rr.map.ve = 0; /* disable VHPT walker */
94	rr.map.rid = RID_KERNEL;	98	rr.map.rid = RID_KERNEL;
95	rr.map.ps = PAGE_WIDTH;	99	rr.map.ps = PAGE_WIDTH;
96	rr_write(i, rr.word);	100	rr_write(i, rr.word);
97	srlz_i();	101	srlz_i();
98	srlz_d();	102	srlz_d();
99	}	103	}
100		104
101	#ifdef CONFIG_VHPT	105	#ifdef CONFIG_VHPT
102	vhpt_base = vhpt_set_up();	106	vhpt_base = vhpt_set_up();
103	#endif	107	#endif
104	/*	108	/*
105	* Set up PTA register.	109	* Set up PTA register.
106	*/	110	*/
107	pta.word = pta_read();	111	pta.word = pta_read();
108	#ifndef CONFIG_VHPT	112	#ifndef CONFIG_VHPT
109	pta.map.ve = 0; /* disable VHPT walker */	113	pta.map.ve = 0; /* disable VHPT walker */
110	pta.map.base = 0 >> PTA_BASE_SHIFT;	114	pta.map.base = 0 >> PTA_BASE_SHIFT;
111	#else	115	#else
112	pta.map.ve = 1; /* enable VHPT walker */	116	pta.map.ve = 1; /* enable VHPT walker */
113	pta.map.base = vhpt_base >> PTA_BASE_SHIFT;	117	pta.map.base = vhpt_base >> PTA_BASE_SHIFT;
114	#endif	118	#endif
115	pta.map.vf = 1; /* large entry format */	119	pta.map.vf = 1; /* large entry format */
116	pta.map.size = VHPT_WIDTH;	120	pta.map.size = VHPT_WIDTH;
117	pta_write(pta.word);	121	pta_write(pta.word);
118	srlz_i();	122	srlz_i();
119	srlz_d();	123	srlz_d();
120	}	124	}
121		125
122	/** Calculate address of collision chain from VPN and ASID.	126	/** Calculate address of collision chain from VPN and ASID.
123	*	127	*
124	* Interrupts must be disabled.	128	* Interrupts must be disabled.
125	*	129	*
126	* @param page Address of virtual page including VRN bits.	130	* @param page Address of virtual page including VRN bits.
127	* @param asid Address space identifier.	131	* @param asid Address space identifier.
128	*	132	*
129	* @return VHPT entry address.	133	* @return VHPT entry address.
130	*/	134	*/
131	vhpt_entry_t *vhpt_hash(uintptr_t page, asid_t asid)	135	vhpt_entry_t *vhpt_hash(uintptr_t page, asid_t asid)
132	{	136	{
133	region_register rr_save, rr;	137	region_register rr_save, rr;
134	index_t vrn;	138	index_t vrn;
135	rid_t rid;	139	rid_t rid;
136	vhpt_entry_t *v;	140	vhpt_entry_t *v;
137		141
138	vrn = page >> VRN_SHIFT;	142	vrn = page >> VRN_SHIFT;
139	rid = ASID2RID(asid, vrn);	143	rid = ASID2RID(asid, vrn);
140		144
141	rr_save.word = rr_read(vrn);	145	rr_save.word = rr_read(vrn);
142	if (rr_save.map.rid == rid) {	146	if (rr_save.map.rid == rid) {
143	/*	147	/*
144	* The RID is already in place, compute thash and return.	148	* The RID is already in place, compute thash and return.
145	*/	149	*/
146	v = (vhpt_entry_t *) thash(page);	150	v = (vhpt_entry_t *) thash(page);
147	return v;	151	return v;
148	}	152	}
149		153
150	/*	154	/*
151	* The RID must be written to some region register.	155	* The RID must be written to some region register.
152	* To speed things up, register indexed by vrn is used.	156	* To speed things up, register indexed by vrn is used.
153	*/	157	*/
154	rr.word = rr_save.word;	158	rr.word = rr_save.word;
155	rr.map.rid = rid;	159	rr.map.rid = rid;
156	rr_write(vrn, rr.word);	160	rr_write(vrn, rr.word);
157	srlz_i();	161	srlz_i();
158	v = (vhpt_entry_t *) thash(page);	162	v = (vhpt_entry_t *) thash(page);
159	rr_write(vrn, rr_save.word);	163	rr_write(vrn, rr_save.word);
160	srlz_i();	164	srlz_i();
161	srlz_d();	165	srlz_d();
162		166
163	return v;	167	return v;
164	}	168	}
165		169
166	/** Compare ASID and VPN against PTE.	170	/** Compare ASID and VPN against PTE.
167	*	171	*
168	* Interrupts must be disabled.	172	* Interrupts must be disabled.
169	*	173	*
170	* @param page Address of virtual page including VRN bits.	174	* @param page Address of virtual page including VRN bits.
171	* @param asid Address space identifier.	175	* @param asid Address space identifier.
172	*	176	*
173	* @return True if page and asid match the page and asid of t,	177	* @return True if page and asid match the page and asid of t,
174	* false otherwise.	178	* false otherwise.
175	*/	179	*/
176	bool vhpt_compare(uintptr_t page, asid_t asid, vhpt_entry_t *v)	180	bool vhpt_compare(uintptr_t page, asid_t asid, vhpt_entry_t *v)
177	{	181	{
178	region_register rr_save, rr;	182	region_register rr_save, rr;
179	index_t vrn;	183	index_t vrn;
180	rid_t rid;	184	rid_t rid;
181	bool match;	185	bool match;
182		186
183	ASSERT(v);	187	ASSERT(v);
184		188
185	vrn = page >> VRN_SHIFT;	189	vrn = page >> VRN_SHIFT;
186	rid = ASID2RID(asid, vrn);	190	rid = ASID2RID(asid, vrn);
187		191
188	rr_save.word = rr_read(vrn);	192	rr_save.word = rr_read(vrn);
189	if (rr_save.map.rid == rid) {	193	if (rr_save.map.rid == rid) {
190	/*	194	/*
191	* The RID is already in place, compare ttag with t and return.	195	* The RID is already in place, compare ttag with t and return.
192	*/	196	*/
193	return ttag(page) == v->present.tag.tag_word;	197	return ttag(page) == v->present.tag.tag_word;
194	}	198	}
195		199
196	/*	200	/*
197	* The RID must be written to some region register.	201	* The RID must be written to some region register.
198	* To speed things up, register indexed by vrn is used.	202	* To speed things up, register indexed by vrn is used.
199	*/	203	*/
200	rr.word = rr_save.word;	204	rr.word = rr_save.word;
201	rr.map.rid = rid;	205	rr.map.rid = rid;
202	rr_write(vrn, rr.word);	206	rr_write(vrn, rr.word);
203	srlz_i();	207	srlz_i();
204	match = (ttag(page) == v->present.tag.tag_word);	208	match = (ttag(page) == v->present.tag.tag_word);
205	rr_write(vrn, rr_save.word);	209	rr_write(vrn, rr_save.word);
206	srlz_i();	210	srlz_i();
207	srlz_d();	211	srlz_d();
208		212
209	return match;	213	return match;
210	}	214	}
211		215
212	/** Set up one VHPT entry.	216	/** Set up one VHPT entry.
213	*	217	*
214	* @param v VHPT entry to be set up.	218	* @param v VHPT entry to be set up.
215	* @param page Virtual address of the page mapped by the entry.	219	* @param page Virtual address of the page mapped by the entry.
216	* @param asid Address space identifier of the address space to which	220	* @param asid Address space identifier of the address space to which
217	* page belongs.	221	* page belongs.
218	* @param frame Physical address of the frame to wich page is mapped.	222	* @param frame Physical address of the frame to wich page is mapped.
219	* @param flags Different flags for the mapping.	223	* @param flags Different flags for the mapping.
220	*/	224	*/
221	void	225	void
222	vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame,	226	vhpt_set_record(vhpt_entry_t *v, uintptr_t page, asid_t asid, uintptr_t frame,
223	int flags)	227	int flags)
224	{	228	{
225	region_register rr_save, rr;	229	region_register rr_save, rr;
226	index_t vrn;	230	index_t vrn;
227	rid_t rid;	231	rid_t rid;
228	uint64_t tag;	232	uint64_t tag;
229		233
230	ASSERT(v);	234	ASSERT(v);
231		235
232	vrn = page >> VRN_SHIFT;	236	vrn = page >> VRN_SHIFT;
233	rid = ASID2RID(asid, vrn);	237	rid = ASID2RID(asid, vrn);
234		238
235	/*	239	/*
236	* Compute ttag.	240	* Compute ttag.
237	*/	241	*/
238	rr_save.word = rr_read(vrn);	242	rr_save.word = rr_read(vrn);
239	rr.word = rr_save.word;	243	rr.word = rr_save.word;
240	rr.map.rid = rid;	244	rr.map.rid = rid;
241	rr_write(vrn, rr.word);	245	rr_write(vrn, rr.word);
242	srlz_i();	246	srlz_i();
243	tag = ttag(page);	247	tag = ttag(page);
244	rr_write(vrn, rr_save.word);	248	rr_write(vrn, rr_save.word);
245	srlz_i();	249	srlz_i();
246	srlz_d();	250	srlz_d();
247		251
248	/*	252	/*
249	* Clear the entry.	253	* Clear the entry.
250	*/	254	*/
251	v->word[0] = 0;	255	v->word[0] = 0;
252	v->word[1] = 0;	256	v->word[1] = 0;
253	v->word[2] = 0;	257	v->word[2] = 0;
254	v->word[3] = 0;	258	v->word[3] = 0;
255		259
256	v->present.p = true;	260	v->present.p = true;
257	v->present.ma = (flags & PAGE_CACHEABLE) ?	261	v->present.ma = (flags & PAGE_CACHEABLE) ?
258	MA_WRITEBACK : MA_UNCACHEABLE;	262	MA_WRITEBACK : MA_UNCACHEABLE;
259	v->present.a = false; /* not accessed */	263	v->present.a = false; /* not accessed */
260	v->present.d = false; /* not dirty */	264	v->present.d = false; /* not dirty */
261	v->present.pl = (flags & PAGE_USER) ? PL_USER : PL_KERNEL;	265	v->present.pl = (flags & PAGE_USER) ? PL_USER : PL_KERNEL;
262	v->present.ar = (flags & PAGE_WRITE) ? AR_WRITE : AR_READ;	266	v->present.ar = (flags & PAGE_WRITE) ? AR_WRITE : AR_READ;
263	v->present.ar \|= (flags & PAGE_EXEC) ? AR_EXECUTE : 0;	267	v->present.ar \|= (flags & PAGE_EXEC) ? AR_EXECUTE : 0;
264	v->present.ppn = frame >> PPN_SHIFT;	268	v->present.ppn = frame >> PPN_SHIFT;
265	v->present.ed = false; /* exception not deffered */	269	v->present.ed = false; /* exception not deffered */
266	v->present.ps = PAGE_WIDTH;	270	v->present.ps = PAGE_WIDTH;
267	v->present.key = 0;	271	v->present.key = 0;
268	v->present.tag.tag_word = tag;	272	v->present.tag.tag_word = tag;
269	}	273	}
270		274
271	uintptr_t hw_map(uintptr_t physaddr, size_t size __attribute__ ((unused)))	275	uintptr_t hw_map(uintptr_t physaddr, size_t size __attribute__ ((unused)))
272	{	276	{
273	/* This is a dirty hack. */	277	/* This is a dirty hack. */
274	return PA2KA(physaddr);	278	return PA2KA(physaddr);
275	}	279	}
276		280
277	void hw_area(uintptr_t physaddr, pfn_t frames)	281	void hw_area(void)
278	{	282	{
279	*physaddr = end_frame;	283	dev_area.pbase = end_frame;
280	*frames = ADDR2PFN(0x7fffffffffffffffUL - end_frame);	284	dev_area.frames = SIZE2FRAMES(0x7fffffffffffffffUL - end_frame);
-		285	ddi_parea_register(&dev_area);
281	}	286	}
282		287
283	/** @}	288	/** @}
284	*/	289	*/
285		290

Subversion Repositories HelenOS

(root)/trunk/kernel/arch/ia64/src/mm/page.c @ 3819 – Rev 3908 → 3940