Rev 4114 | Rev 4148 | Go to most recent revision | Only display areas with differences | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
Rev 4114 | Rev 4122 | ||
---|---|---|---|
1 | /* |
1 | /* |
2 | * Copyright (c) 2005 Jakub Jermar |
2 | * Copyright (c) 2005 Jakub Jermar |
3 | * All rights reserved. |
3 | * All rights reserved. |
4 | * |
4 | * |
5 | * Redistribution and use in source and binary forms, with or without |
5 | * Redistribution and use in source and binary forms, with or without |
6 | * modification, are permitted provided that the following conditions |
6 | * modification, are permitted provided that the following conditions |
7 | * are met: |
7 | * are met: |
8 | * |
8 | * |
9 | * - Redistributions of source code must retain the above copyright |
9 | * - Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * - Redistributions in binary form must reproduce the above copyright |
11 | * - Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
13 | * documentation and/or other materials provided with the distribution. |
14 | * - The name of the author may not be used to endorse or promote products |
14 | * - The name of the author may not be used to endorse or promote products |
15 | * derived from this software without specific prior written permission. |
15 | * derived from this software without specific prior written permission. |
16 | * |
16 | * |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
17 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
18 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
19 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
20 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
21 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
22 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
23 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
24 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
25 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
26 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 | */ |
27 | */ |
28 | 28 | ||
29 | /** @addtogroup ia64 |
29 | /** @addtogroup ia64 |
30 | * @{ |
30 | * @{ |
31 | */ |
31 | */ |
32 | /** @file |
32 | /** @file |
33 | */ |
33 | */ |
34 | 34 | ||
35 | #include <arch.h> |
35 | #include <arch.h> |
36 | #include <arch/ski/ski.h> |
36 | #include <arch/ski/ski.h> |
37 | #include <arch/drivers/it.h> |
37 | #include <arch/drivers/it.h> |
38 | #include <arch/interrupt.h> |
38 | #include <arch/interrupt.h> |
39 | #include <arch/barrier.h> |
39 | #include <arch/barrier.h> |
40 | #include <arch/asm.h> |
40 | #include <arch/asm.h> |
41 | #include <arch/register.h> |
41 | #include <arch/register.h> |
42 | #include <arch/types.h> |
42 | #include <arch/types.h> |
43 | #include <arch/context.h> |
43 | #include <arch/context.h> |
44 | #include <arch/stack.h> |
44 | #include <arch/stack.h> |
45 | #include <arch/mm/page.h> |
45 | #include <arch/mm/page.h> |
46 | #include <mm/as.h> |
46 | #include <mm/as.h> |
47 | #include <config.h> |
47 | #include <config.h> |
48 | #include <userspace.h> |
48 | #include <userspace.h> |
49 | #include <console/console.h> |
49 | #include <console/console.h> |
50 | #include <proc/uarg.h> |
50 | #include <proc/uarg.h> |
51 | #include <syscall/syscall.h> |
51 | #include <syscall/syscall.h> |
52 | #include <ddi/irq.h> |
52 | #include <ddi/irq.h> |
53 | #include <ddi/device.h> |
53 | #include <ddi/device.h> |
54 | #include <arch/bootinfo.h> |
54 | #include <arch/bootinfo.h> |
55 | #include <genarch/drivers/legacy/ia32/io.h> |
55 | #include <genarch/drivers/legacy/ia32/io.h> |
56 | #include <genarch/drivers/ega/ega.h> |
56 | #include <genarch/drivers/ega/ega.h> |
57 | #include <genarch/kbrd/kbrd.h> |
57 | #include <genarch/kbrd/kbrd.h> |
58 | #include <genarch/srln/srln.h> |
58 | #include <genarch/srln/srln.h> |
59 | #include <genarch/drivers/i8042/i8042.h> |
59 | #include <genarch/drivers/i8042/i8042.h> |
60 | #include <genarch/drivers/ns16550/ns16550.h> |
60 | #include <genarch/drivers/ns16550/ns16550.h> |
61 | #include <arch/drivers/kbd.h> |
61 | #include <arch/drivers/kbd.h> |
62 | #include <smp/smp.h> |
62 | #include <smp/smp.h> |
63 | #include <smp/ipi.h> |
63 | #include <smp/ipi.h> |
64 | #include <arch/atomic.h> |
64 | #include <arch/atomic.h> |
65 | #include <panic.h> |
65 | #include <panic.h> |
66 | #include <print.h> |
66 | #include <print.h> |
67 | #include <sysinfo/sysinfo.h> |
67 | #include <sysinfo/sysinfo.h> |
68 | #include <string.h> |
68 | #include <string.h> |
69 | 69 | ||
70 | /* NS16550 as a COM 1 */ |
70 | /* NS16550 as a COM 1 */ |
71 | #define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE) |
71 | #define NS16550_IRQ (4 + LEGACY_INTERRUPT_BASE) |
72 | 72 | ||
73 | bootinfo_t *bootinfo; |
73 | bootinfo_t *bootinfo; |
74 | 74 | ||
75 | static uint64_t iosapic_base = 0xfec00000; |
75 | static uint64_t iosapic_base = 0xfec00000; |
76 | 76 | ||
77 | /** Performs ia64-specific initialization before main_bsp() is called. */ |
77 | /** Performs ia64-specific initialization before main_bsp() is called. */ |
78 | void arch_pre_main(void) |
78 | void arch_pre_main(void) |
79 | { |
79 | { |
80 | /* Setup usermode init tasks. */ |
80 | /* Setup usermode init tasks. */ |
81 | 81 | ||
82 | unsigned int i; |
82 | unsigned int i; |
83 | 83 | ||
84 | init.cnt = bootinfo->taskmap.count; |
84 | init.cnt = bootinfo->taskmap.count; |
85 | 85 | ||
86 | for (i = 0; i < init.cnt; i++) { |
86 | for (i = 0; i < init.cnt; i++) { |
87 | init.tasks[i].addr = |
87 | init.tasks[i].addr = |
88 | ((unsigned long) bootinfo->taskmap.tasks[i].addr) | |
88 | ((unsigned long) bootinfo->taskmap.tasks[i].addr) | |
89 | VRN_MASK; |
89 | VRN_MASK; |
90 | init.tasks[i].size = bootinfo->taskmap.tasks[i].size; |
90 | init.tasks[i].size = bootinfo->taskmap.tasks[i].size; |
91 | strncpy(init.tasks[i].name, bootinfo->taskmap.tasks[i].name, |
91 | strncpy(init.tasks[i].name, bootinfo->taskmap.tasks[i].name, |
92 | CONFIG_TASK_NAME_BUFLEN); |
92 | CONFIG_TASK_NAME_BUFLEN); |
93 | } |
93 | } |
94 | } |
94 | } |
95 | 95 | ||
96 | void arch_pre_mm_init(void) |
96 | void arch_pre_mm_init(void) |
97 | { |
97 | { |
98 | /* |
98 | /* |
99 | * Set Interruption Vector Address (i.e. location of interruption vector |
99 | * Set Interruption Vector Address (i.e. location of interruption vector |
100 | * table). |
100 | * table). |
101 | */ |
101 | */ |
102 | iva_write((uintptr_t) &ivt); |
102 | iva_write((uintptr_t) &ivt); |
103 | srlz_d(); |
103 | srlz_d(); |
104 | 104 | ||
105 | } |
105 | } |
106 | 106 | ||
107 | static void iosapic_init(void) |
107 | static void iosapic_init(void) |
108 | { |
108 | { |
109 | uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET; |
109 | uint64_t IOSAPIC = PA2KA((unative_t)(iosapic_base)) | FW_OFFSET; |
110 | int i; |
110 | int i; |
111 | 111 | ||
112 | int myid, myeid; |
112 | int myid, myeid; |
113 | 113 | ||
114 | myid = ia64_get_cpu_id(); |
114 | myid = ia64_get_cpu_id(); |
115 | myeid = ia64_get_cpu_eid(); |
115 | myeid = ia64_get_cpu_eid(); |
116 | 116 | ||
117 | for (i = 0; i < 16; i++) { |
117 | for (i = 0; i < 16; i++) { |
118 | if (i == 2) |
118 | if (i == 2) |
119 | continue; /* Disable Cascade interrupt */ |
119 | continue; /* Disable Cascade interrupt */ |
120 | ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i; |
120 | ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i; |
121 | srlz_d(); |
121 | srlz_d(); |
122 | ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i; |
122 | ((uint32_t *)(IOSAPIC + 0x10))[0] = LEGACY_INTERRUPT_BASE + i; |
123 | srlz_d(); |
123 | srlz_d(); |
124 | ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1; |
124 | ((uint32_t *)(IOSAPIC + 0x00))[0] = 0x10 + 2 * i + 1; |
125 | srlz_d(); |
125 | srlz_d(); |
126 | ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) | |
126 | ((uint32_t *)(IOSAPIC + 0x10))[0] = myid << (56 - 32) | |
127 | myeid << (48 - 32); |
127 | myeid << (48 - 32); |
128 | srlz_d(); |
128 | srlz_d(); |
129 | } |
129 | } |
130 | 130 | ||
131 | } |
131 | } |
132 | 132 | ||
133 | void arch_post_mm_init(void) |
133 | void arch_post_mm_init(void) |
134 | { |
134 | { |
135 | if (config.cpu_active == 1) { |
135 | if (config.cpu_active == 1) { |
136 | iosapic_init(); |
136 | iosapic_init(); |
137 | irq_init(INR_COUNT, INR_COUNT); |
137 | irq_init(INR_COUNT, INR_COUNT); |
138 | } |
138 | } |
139 | it_init(); |
139 | it_init(); |
140 | } |
140 | } |
141 | 141 | ||
142 | void arch_post_cpu_init(void) |
142 | void arch_post_cpu_init(void) |
143 | { |
143 | { |
144 | } |
144 | } |
145 | 145 | ||
146 | void arch_pre_smp_init(void) |
146 | void arch_pre_smp_init(void) |
147 | { |
147 | { |
148 | } |
148 | } |
149 | 149 | ||
150 | void arch_post_smp_init(void) |
150 | void arch_post_smp_init(void) |
151 | { |
151 | { |
152 | #ifdef SKI |
152 | #ifdef SKI |
153 | indev_t *in; |
153 | indev_t *in; |
154 | in = skiin_init(); |
154 | in = skiin_init(); |
155 | if (in) |
155 | if (in) |
156 | srln_init(in); |
156 | srln_init(in); |
157 | skiout_init(); |
157 | skiout_init(); |
158 | #endif |
158 | #endif |
159 | 159 | ||
160 | #ifdef I460GX |
- | |
161 | #ifdef CONFIG_EGA |
160 | #ifdef CONFIG_EGA |
162 | ega_init(EGA_BASE, EGA_VIDEORAM); |
161 | ega_init(EGA_BASE, EGA_VIDEORAM); |
163 | #endif |
162 | #endif |
164 | 163 | ||
165 | devno_t devno = device_assign_devno(); |
- | |
166 | inr_t inr; |
- | |
167 | - | ||
168 | #ifdef CONFIG_NS16550 |
164 | #ifdef CONFIG_NS16550 |
- | 165 | devno_t devno_ns16550 = device_assign_devno(); |
|
169 | inr = NS16550_IRQ; |
166 | indev_t *kbrdin_ns16550 |
170 | - | ||
171 | indev_t *kbrdin = ns16550_init((ns16550_t *) NS16550_BASE, devno, inr, NULL, NULL); |
167 | = ns16550_init((ns16550_t *) NS16550_BASE, devno_ns16550, NS16550_IRQ, NULL, NULL); |
172 | if (kbrdin) |
168 | if (kbrdin_ns16550) |
173 | srln_init(kbrdin); |
169 | srln_init(kbrdin_ns16550); |
174 | 170 | ||
- | 171 | sysinfo_set_item_val("kbd", NULL, true); |
|
- | 172 | sysinfo_set_item_val("kbd.devno", NULL, devno_ns16550); |
|
- | 173 | sysinfo_set_item_val("kbd.inr", NULL, NS16550_IRQ); |
|
175 | sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550); |
174 | sysinfo_set_item_val("kbd.type", NULL, KBD_NS16550); |
176 | sysinfo_set_item_val("kbd.address.physical", NULL, |
175 | sysinfo_set_item_val("kbd.address.physical", NULL, |
177 | (uintptr_t) NS16550_BASE); |
176 | (uintptr_t) NS16550_BASE); |
178 | sysinfo_set_item_val("kbd.address.kernel", NULL, |
177 | sysinfo_set_item_val("kbd.address.kernel", NULL, |
179 | (uintptr_t) NS16550_BASE); |
178 | (uintptr_t) NS16550_BASE); |
180 | #else |
179 | #endif |
181 | inr = IRQ_KBD; |
- | |
182 | /* |
180 | |
183 | * Initialize the i8042 controller. Then initialize the keyboard |
181 | #ifdef CONFIG_I8042 |
184 | * module and connect it to i8042. Enable keyboard interrupts. |
182 | devno_t devno_i8042 = device_assign_devno(); |
185 | */ |
- | |
186 | indev_t *kbrdin = i8042_init((i8042_t *) I8042_BASE, devno, irq); |
183 | indev_t *kbrdin_i8042 = i8042_init((i8042_t *) I8042_BASE, devno_i8042, IRQ_KBD); |
187 | if (kbrdin) { |
184 | if (kbrdin_i8042) |
188 | kbrd_init(kbrdin); |
185 | kbrd_init(kbrdin_i8042); |
189 | trap_virtual_enable_irqs(1 << inr); |
- | |
190 | } |
- | |
191 | 186 | ||
- | 187 | sysinfo_set_item_val("kbd", NULL, true); |
|
- | 188 | sysinfo_set_item_val("kbd.devno", NULL, devno_i8042); |
|
- | 189 | sysinfo_set_item_val("kbd.inr", NULL, IRQ_KBD); |
|
192 | sysinfo_set_item_val("kbd.type", NULL, KBD_LEGACY); |
190 | sysinfo_set_item_val("kbd.type", NULL, KBD_LEGACY); |
193 | sysinfo_set_item_val("kbd.address.physical", NULL, |
191 | sysinfo_set_item_val("kbd.address.physical", NULL, |
194 | (uintptr_t) I8042_BASE); |
192 | (uintptr_t) I8042_BASE); |
195 | sysinfo_set_item_val("kbd.address.kernel", NULL, |
193 | sysinfo_set_item_val("kbd.address.kernel", NULL, |
196 | (uintptr_t) I8042_BASE); |
194 | (uintptr_t) I8042_BASE); |
197 | #endif |
195 | #endif |
198 | sysinfo_set_item_val("kbd", NULL, true); |
- | |
199 | sysinfo_set_item_val("kbd.devno", NULL, devno); |
- | |
200 | sysinfo_set_item_val("kbd.inr", NULL, inr); |
- | |
201 | #endif |
- | |
202 | 196 | ||
203 | sysinfo_set_item_val("ia64_iospace", NULL, true); |
197 | sysinfo_set_item_val("ia64_iospace", NULL, true); |
204 | sysinfo_set_item_val("ia64_iospace.address", NULL, true); |
198 | sysinfo_set_item_val("ia64_iospace.address", NULL, true); |
205 | sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET); |
199 | sysinfo_set_item_val("ia64_iospace.address.virtual", NULL, IO_OFFSET); |
206 | } |
200 | } |
207 | 201 | ||
208 | 202 | ||
209 | /** Enter userspace and never return. */ |
203 | /** Enter userspace and never return. */ |
210 | void userspace(uspace_arg_t *kernel_uarg) |
204 | void userspace(uspace_arg_t *kernel_uarg) |
211 | { |
205 | { |
212 | psr_t psr; |
206 | psr_t psr; |
213 | rsc_t rsc; |
207 | rsc_t rsc; |
214 | 208 | ||
215 | psr.value = psr_read(); |
209 | psr.value = psr_read(); |
216 | psr.cpl = PL_USER; |
210 | psr.cpl = PL_USER; |
217 | psr.i = true; /* start with interrupts enabled */ |
211 | psr.i = true; /* start with interrupts enabled */ |
218 | psr.ic = true; |
212 | psr.ic = true; |
219 | psr.ri = 0; /* start with instruction #0 */ |
213 | psr.ri = 0; /* start with instruction #0 */ |
220 | psr.bn = 1; /* start in bank 0 */ |
214 | psr.bn = 1; /* start in bank 0 */ |
221 | 215 | ||
222 | asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value)); |
216 | asm volatile ("mov %0 = ar.rsc\n" : "=r" (rsc.value)); |
223 | rsc.loadrs = 0; |
217 | rsc.loadrs = 0; |
224 | rsc.be = false; |
218 | rsc.be = false; |
225 | rsc.pl = PL_USER; |
219 | rsc.pl = PL_USER; |
226 | rsc.mode = 3; /* eager mode */ |
220 | rsc.mode = 3; /* eager mode */ |
227 | 221 | ||
228 | switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry, |
222 | switch_to_userspace((uintptr_t) kernel_uarg->uspace_entry, |
229 | ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE - |
223 | ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE - |
230 | ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT), |
224 | ALIGN_UP(STACK_ITEM_SIZE, STACK_ALIGNMENT), |
231 | ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE, |
225 | ((uintptr_t) kernel_uarg->uspace_stack) + PAGE_SIZE, |
232 | (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value); |
226 | (uintptr_t) kernel_uarg->uspace_uarg, psr.value, rsc.value); |
233 | 227 | ||
234 | while (1) |
228 | while (1) |
235 | ; |
229 | ; |
236 | } |
230 | } |
237 | 231 | ||
238 | /** Set thread-local-storage pointer. |
232 | /** Set thread-local-storage pointer. |
239 | * |
233 | * |
240 | * We use r13 (a.k.a. tp) for this purpose. |
234 | * We use r13 (a.k.a. tp) for this purpose. |
241 | */ |
235 | */ |
242 | unative_t sys_tls_set(unative_t addr) |
236 | unative_t sys_tls_set(unative_t addr) |
243 | { |
237 | { |
244 | return 0; |
238 | return 0; |
245 | } |
239 | } |
246 | 240 | ||
247 | /** Acquire console back for kernel |
241 | /** Acquire console back for kernel |
248 | * |
242 | * |
249 | */ |
243 | */ |
250 | void arch_grab_console(void) |
244 | void arch_grab_console(void) |
251 | { |
245 | { |
252 | #ifdef SKI |
246 | #ifdef SKI |
253 | ski_kbd_grab(); |
247 | ski_kbd_grab(); |
254 | #endif |
248 | #endif |
255 | } |
249 | } |
256 | 250 | ||
257 | /** Return console to userspace |
251 | /** Return console to userspace |
258 | * |
252 | * |
259 | */ |
253 | */ |
260 | void arch_release_console(void) |
254 | void arch_release_console(void) |
261 | { |
255 | { |
262 | #ifdef SKI |
256 | #ifdef SKI |
263 | ski_kbd_release(); |
257 | ski_kbd_release(); |
264 | #endif |
258 | #endif |
265 | } |
259 | } |
266 | 260 | ||
267 | void arch_reboot(void) |
261 | void arch_reboot(void) |
268 | { |
262 | { |
269 | pio_write_8((ioport8_t *)0x64, 0xfe); |
263 | pio_write_8((ioport8_t *)0x64, 0xfe); |
270 | while (1) |
264 | while (1) |
271 | ; |
265 | ; |
272 | } |
266 | } |
273 | 267 | ||
274 | /** Construct function pointer |
268 | /** Construct function pointer |
275 | * |
269 | * |
276 | * @param fptr function pointer structure |
270 | * @param fptr function pointer structure |
277 | * @param addr function address |
271 | * @param addr function address |
278 | * @param caller calling function address |
272 | * @param caller calling function address |
279 | * |
273 | * |
280 | * @return address of the function pointer |
274 | * @return address of the function pointer |
281 | * |
275 | * |
282 | */ |
276 | */ |
283 | void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller) |
277 | void *arch_construct_function(fncptr_t *fptr, void *addr, void *caller) |
284 | { |
278 | { |
285 | fptr->fnc = (unative_t) addr; |
279 | fptr->fnc = (unative_t) addr; |
286 | fptr->gp = ((unative_t *) caller)[1]; |
280 | fptr->gp = ((unative_t *) caller)[1]; |
287 | 281 | ||
288 | return (void *) fptr; |
282 | return (void *) fptr; |
289 | } |
283 | } |
290 | 284 | ||
291 | /** @} |
285 | /** @} |
292 | */ |
286 | */ |
293 | 287 |